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review.blissroms.org / platform_bionic / 6a310f4ad6c06b6f513d6dd9784ce0377f94f9bd / . / libc / kernel / uapi / linux / v4l2-mediabus.h
blob: 84aa5d362994aed7aedefabe7c30b6150472a0d1 [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]1/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __LINUX_V4L2_MEDIABUS_H
20#define __LINUX_V4L2_MEDIABUS_H
21#include <linux/types.h>
22#include <linux/videodev2.h>
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24enum v4l2_mbus_pixelcode {
25 V4L2_MBUS_FMT_FIXED = 0x0001,
26 V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE = 0x1001,
27 V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE = 0x1002,
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29 V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE = 0x1003,
30 V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE = 0x1004,
31 V4L2_MBUS_FMT_BGR565_2X8_BE = 0x1005,
32 V4L2_MBUS_FMT_BGR565_2X8_LE = 0x1006,
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34 V4L2_MBUS_FMT_RGB565_2X8_BE = 0x1007,
35 V4L2_MBUS_FMT_RGB565_2X8_LE = 0x1008,
36 V4L2_MBUS_FMT_RGB666_1X18 = 0x1009,
37 V4L2_MBUS_FMT_RGB888_1X24 = 0x100a,
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39 V4L2_MBUS_FMT_RGB888_2X12_BE = 0x100b,
40 V4L2_MBUS_FMT_RGB888_2X12_LE = 0x100c,
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]41 V4L2_MBUS_FMT_ARGB8888_1X32 = 0x100d,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]42 V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]44 V4L2_MBUS_FMT_UV8_1X8 = 0x2015,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]45 V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002,
46 V4L2_MBUS_FMT_VYUY8_1_5X8 = 0x2003,
47 V4L2_MBUS_FMT_YUYV8_1_5X8 = 0x2004,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]49 V4L2_MBUS_FMT_YVYU8_1_5X8 = 0x2005,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]50 V4L2_MBUS_FMT_UYVY8_2X8 = 0x2006,
51 V4L2_MBUS_FMT_VYUY8_2X8 = 0x2007,
52 V4L2_MBUS_FMT_YUYV8_2X8 = 0x2008,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]54 V4L2_MBUS_FMT_YVYU8_2X8 = 0x2009,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]55 V4L2_MBUS_FMT_Y10_1X10 = 0x200a,
56 V4L2_MBUS_FMT_YUYV10_2X10 = 0x200b,
57 V4L2_MBUS_FMT_YVYU10_2X10 = 0x200c,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]59 V4L2_MBUS_FMT_Y12_1X12 = 0x2013,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]60 V4L2_MBUS_FMT_UYVY8_1X16 = 0x200f,
61 V4L2_MBUS_FMT_VYUY8_1X16 = 0x2010,
62 V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]64 V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]65 V4L2_MBUS_FMT_YDYUYDYV8_1X16 = 0x2014,
66 V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
67 V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]69 V4L2_MBUS_FMT_YUV10_1X30 = 0x2016,
70 V4L2_MBUS_FMT_AYUV8_1X32 = 0x2017,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]71 V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
72 V4L2_MBUS_FMT_SGBRG8_1X8 = 0x3013,
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]74 V4L2_MBUS_FMT_SGRBG8_1X8 = 0x3002,
75 V4L2_MBUS_FMT_SRGGB8_1X8 = 0x3014,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]76 V4L2_MBUS_FMT_SBGGR10_ALAW8_1X8 = 0x3015,
77 V4L2_MBUS_FMT_SGBRG10_ALAW8_1X8 = 0x3016,
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]79 V4L2_MBUS_FMT_SGRBG10_ALAW8_1X8 = 0x3017,
80 V4L2_MBUS_FMT_SRGGB10_ALAW8_1X8 = 0x3018,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]81 V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8 = 0x300b,
82 V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8 = 0x300c,
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]84 V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 = 0x3009,
85 V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8 = 0x300d,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]86 V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE = 0x3003,
87 V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE = 0x3004,
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]89 V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE = 0x3005,
90 V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE = 0x3006,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]91 V4L2_MBUS_FMT_SBGGR10_1X10 = 0x3007,
92 V4L2_MBUS_FMT_SGBRG10_1X10 = 0x300e,
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]94 V4L2_MBUS_FMT_SGRBG10_1X10 = 0x300a,
95 V4L2_MBUS_FMT_SRGGB10_1X10 = 0x300f,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]96 V4L2_MBUS_FMT_SBGGR12_1X12 = 0x3008,
97 V4L2_MBUS_FMT_SGBRG12_1X12 = 0x3010,
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]99 V4L2_MBUS_FMT_SGRBG12_1X12 = 0x3011,
100 V4L2_MBUS_FMT_SRGGB12_1X12 = 0x3012,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]101 V4L2_MBUS_FMT_JPEG_1X8 = 0x4001,
102 V4L2_MBUS_FMT_S5C_UYVY_JPEG_1X8 = 0x5001,
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104 V4L2_MBUS_FMT_AHSV8888_1X32 = 0x6001,
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]105};
106struct v4l2_mbus_framefmt {
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]107 __u32 width;
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]109 __u32 height;
110 __u32 code;
111 __u32 field;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]112 __u32 colorspace;
Christopher Ferris38062f92014-07-09 15:33:25 -0700[diff] [blame]113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]114 __u32 reserved[7];
115};
116#endif