Raghu Gandham | 82fa43f | 2012-03-27 11:37:17 -0700 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _ASM_WAR_H |
| 20 | #define _ASM_WAR_H |
| 21 | #include <war.h> |
| 22 | #define R4000_WAR 0 |
| 23 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 24 | #define R4400_WAR 0 |
| 25 | #define DADDI_WAR 0 |
| 26 | #ifndef R4600_V1_INDEX_ICACHEOP_WAR |
| 27 | #error Check setting of R4600_V1_INDEX_ICACHEOP_WAR for your platform |
| 28 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 29 | #endif |
| 30 | #ifndef R4600_V1_HIT_CACHEOP_WAR |
| 31 | #error Check setting of R4600_V1_HIT_CACHEOP_WAR for your platform |
| 32 | #endif |
| 33 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 34 | #ifndef R4600_V2_HIT_CACHEOP_WAR |
| 35 | #error Check setting of R4600_V2_HIT_CACHEOP_WAR for your platform |
| 36 | #endif |
| 37 | #ifndef R5432_CP0_INTERRUPT_WAR |
| 38 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 39 | #error Check setting of R5432_CP0_INTERRUPT_WAR for your platform |
| 40 | #endif |
| 41 | #ifndef BCM1250_M3_WAR |
| 42 | #error Check setting of BCM1250_M3_WAR for your platform |
| 43 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 44 | #endif |
| 45 | #ifndef SIBYTE_1956_WAR |
| 46 | #error Check setting of SIBYTE_1956_WAR for your platform |
| 47 | #endif |
| 48 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 49 | #ifndef MIPS4K_ICACHE_REFILL_WAR |
| 50 | #error Check setting of MIPS4K_ICACHE_REFILL_WAR for your platform |
| 51 | #endif |
| 52 | #ifndef MIPS_CACHE_SYNC_WAR |
| 53 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 54 | #error Check setting of MIPS_CACHE_SYNC_WAR for your platform |
| 55 | #endif |
| 56 | #ifndef TX49XX_ICACHE_INDEX_INV_WAR |
| 57 | #error Check setting of TX49XX_ICACHE_INDEX_INV_WAR for your platform |
| 58 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 59 | #endif |
| 60 | #ifndef RM9000_CDEX_SMP_WAR |
| 61 | #error Check setting of RM9000_CDEX_SMP_WAR for your platform |
| 62 | #endif |
| 63 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 64 | #ifndef ICACHE_REFILLS_WORKAROUND_WAR |
| 65 | #error Check setting of ICACHE_REFILLS_WORKAROUND_WAR for your platform |
| 66 | #endif |
| 67 | #ifndef R10000_LLSC_WAR |
| 68 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 69 | #error Check setting of R10000_LLSC_WAR for your platform |
| 70 | #endif |
| 71 | #ifndef MIPS34K_MISSED_ITLB_WAR |
| 72 | #error Check setting of MIPS34K_MISSED_ITLB_WAR for your platform |
| 73 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 74 | #endif |
| 75 | #endif |