| Tony SIM | 1d7a894 | 2010-01-28 17:04:55 +0900 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | **************************************************************************** |
| 11 | ****************************************************************************/ |
| 12 | #ifndef __ASM_SH_MAGICPANELR2_H |
| 13 | #define __ASM_SH_MAGICPANELR2_H |
| 14 | |
| 15 | #include <asm/gpio.h> |
| 16 | |
| 17 | #define __IO_PREFIX mpr2 |
| 18 | #include <asm/io_generic.h> |
| 19 | |
| 20 | #define SETBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) | mask, reg) |
| 21 | #define SETBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) | mask, reg) |
| 22 | #define SETBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) | mask, reg) |
| 23 | #define CLRBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) & ~mask, reg) |
| 24 | #define CLRBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) & ~mask, reg) |
| 25 | #define CLRBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) & ~mask, reg) |
| 26 | |
| 27 | #define PA_LED PORT_PADR |
| 28 | |
| 29 | #define CMNCR 0xA4FD0000UL |
| 30 | #define CS0BCR 0xA4FD0004UL |
| 31 | #define CS2BCR 0xA4FD0008UL |
| 32 | #define CS3BCR 0xA4FD000CUL |
| 33 | #define CS4BCR 0xA4FD0010UL |
| 34 | #define CS5ABCR 0xA4FD0014UL |
| 35 | #define CS5BBCR 0xA4FD0018UL |
| 36 | #define CS6ABCR 0xA4FD001CUL |
| 37 | #define CS6BBCR 0xA4FD0020UL |
| 38 | #define CS0WCR 0xA4FD0024UL |
| 39 | #define CS2WCR 0xA4FD0028UL |
| 40 | #define CS3WCR 0xA4FD002CUL |
| 41 | #define CS4WCR 0xA4FD0030UL |
| 42 | #define CS5AWCR 0xA4FD0034UL |
| 43 | #define CS5BWCR 0xA4FD0038UL |
| 44 | #define CS6AWCR 0xA4FD003CUL |
| 45 | #define CS6BWCR 0xA4FD0040UL |
| 46 | |
| 47 | #define PORT_UTRCTL 0xA405012CUL |
| 48 | #define PORT_UCLKCR_W 0xA40A0008UL |
| 49 | |
| 50 | #define INTC_ICR0 0xA414FEE0UL |
| 51 | #define INTC_ICR1 0xA4140010UL |
| 52 | #define INTC_ICR2 0xA4140012UL |
| 53 | |
| 54 | #define MPR2_MTD_BOOTLOADER_SIZE 0x00060000UL |
| 55 | #define MPR2_MTD_KERNEL_SIZE 0x00200000UL |
| 56 | |
| 57 | #endif |