| Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _UAPI_HDLCDRV_H |
| 20 | #define _UAPI_HDLCDRV_H |
| 21 | struct hdlcdrv_params { |
| 22 | int iobase; |
| 23 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 24 | int irq; |
| 25 | int dma; |
| 26 | int dma2; |
| 27 | int seriobase; |
| 28 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 29 | int pariobase; |
| 30 | int midiiobase; |
| 31 | }; |
| 32 | struct hdlcdrv_channel_params { |
| 33 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 34 | int tx_delay; |
| 35 | int tx_tail; |
| 36 | int slottime; |
| 37 | int ppersist; |
| 38 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 39 | int fulldup; |
| 40 | }; |
| 41 | struct hdlcdrv_old_channel_state { |
| 42 | int ptt; |
| 43 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 44 | int dcd; |
| 45 | int ptt_keyed; |
| 46 | }; |
| 47 | struct hdlcdrv_channel_state { |
| 48 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 49 | int ptt; |
| 50 | int dcd; |
| 51 | int ptt_keyed; |
| 52 | unsigned long tx_packets; |
| 53 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 54 | unsigned long tx_errors; |
| 55 | unsigned long rx_packets; |
| 56 | unsigned long rx_errors; |
| 57 | }; |
| 58 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 59 | struct hdlcdrv_ioctl { |
| 60 | int cmd; |
| 61 | union { |
| 62 | struct hdlcdrv_params mp; |
| 63 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 64 | struct hdlcdrv_channel_params cp; |
| 65 | struct hdlcdrv_channel_state cs; |
| 66 | struct hdlcdrv_old_channel_state ocs; |
| 67 | unsigned int calibrate; |
| 68 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 69 | unsigned char bits; |
| 70 | char modename[128]; |
| 71 | char drivername[32]; |
| 72 | } data; |
| 73 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 74 | }; |
| 75 | #define HDLCDRVCTL_GETMODEMPAR 0 |
| 76 | #define HDLCDRVCTL_SETMODEMPAR 1 |
| 77 | #define HDLCDRVCTL_MODEMPARMASK 2 |
| 78 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 79 | #define HDLCDRVCTL_GETCHANNELPAR 10 |
| 80 | #define HDLCDRVCTL_SETCHANNELPAR 11 |
| 81 | #define HDLCDRVCTL_OLDGETSTAT 20 |
| 82 | #define HDLCDRVCTL_CALIBRATE 21 |
| 83 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 84 | #define HDLCDRVCTL_GETSTAT 22 |
| 85 | #define HDLCDRVCTL_GETSAMPLES 30 |
| 86 | #define HDLCDRVCTL_GETBITS 31 |
| 87 | #define HDLCDRVCTL_GETMODE 40 |
| 88 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 89 | #define HDLCDRVCTL_SETMODE 41 |
| 90 | #define HDLCDRVCTL_MODELIST 42 |
| 91 | #define HDLCDRVCTL_DRIVERNAME 43 |
| 92 | #define HDLCDRV_PARMASK_IOBASE (1<<0) |
| 93 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 94 | #define HDLCDRV_PARMASK_IRQ (1<<1) |
| 95 | #define HDLCDRV_PARMASK_DMA (1<<2) |
| 96 | #define HDLCDRV_PARMASK_DMA2 (1<<3) |
| 97 | #define HDLCDRV_PARMASK_SERIOBASE (1<<4) |
| 98 | /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |
| 99 | #define HDLCDRV_PARMASK_PARIOBASE (1<<5) |
| 100 | #define HDLCDRV_PARMASK_MIDIIOBASE (1<<6) |
| 101 | #endif |