| Raghu Gandham | 405b802 | 2012-07-25 18:16:42 -0700 | [diff] [blame] | 1 | /* $OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com) |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS |
| 16 | * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 17 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 18 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY |
| 19 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 20 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 21 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 22 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 23 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 24 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 25 | * SUCH DAMAGE. |
| 26 | * |
| 27 | */ |
| 28 | |
| 29 | #ifndef _MIPS64_ENDIAN_H_ |
| 30 | #define _MIPS64_ENDIAN_H_ |
| 31 | |
| Raghu Gandham | 405b802 | 2012-07-25 18:16:42 -0700 | [diff] [blame] | 32 | #ifdef __GNUC__ |
| 33 | |
| 34 | #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) |
| 35 | #define __swap16md(x) ({ \ |
| 36 | register uint16_t _x = (x); \ |
| 37 | register uint16_t _r; \ |
| 38 | __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x)); \ |
| 39 | _r; \ |
| 40 | }) |
| 41 | |
| 42 | #define __swap32md(x) ({ \ |
| 43 | register uint32_t _x = (x); \ |
| 44 | register uint32_t _r; \ |
| 45 | __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \ |
| 46 | _r; \ |
| 47 | }) |
| 48 | |
| 49 | #define __swap64md(x) ({ \ |
| 50 | uint64_t _swap64md_x = (x); \ |
| 51 | (uint64_t) __swap32md(_swap64md_x >> 32) | \ |
| 52 | (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \ |
| 53 | }) |
| 54 | |
| 55 | /* Tell sys/endian.h we have MD variants of the swap macros. */ |
| 56 | #define MD_SWAP |
| 57 | |
| 58 | #endif /* __mips32r2__ */ |
| 59 | #endif /* __GNUC__ */ |
| 60 | |
| Elliott Hughes | b15c58b | 2012-11-27 14:18:04 -0800 | [diff] [blame^] | 61 | #if defined(__MIPSEB__) |
| 62 | #define _BYTE_ORDER _BIG_ENDIAN |
| 63 | #else |
| 64 | #define _BYTE_ORDER _LITTLE_ENDIAN |
| 65 | #endif |
| 66 | #define __STRICT_ALIGNMENT |
| 67 | #include <sys/types.h> |
| Raghu Gandham | 405b802 | 2012-07-25 18:16:42 -0700 | [diff] [blame] | 68 | #include <sys/endian.h> |
| 69 | |
| Raghu Gandham | 405b802 | 2012-07-25 18:16:42 -0700 | [diff] [blame] | 70 | #endif /* _MIPS64_ENDIAN_H_ */ |