Gitiles
Code Review Sign In
review.blissroms.org / platform_external_kernel-drivers / refs/heads/r / . / rtl8821ce / fw.h
blob: 39c905c1b1d85db7d4cb76832dd9c327dfec8dec [file] [log] [blame]
Jon West96501cc2021-04-06 13:09:18 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2/* Copyright(c) 2018-2019 Realtek Corporation
3 */
4
5#ifndef __RTW_FW_H_
6#define __RTW_FW_H_
7
8#define H2C_PKT_SIZE 32
9#define H2C_PKT_HDR_SIZE 8
10
11/* FW bin information */
12#define FW_HDR_SIZE 64
13#define FW_HDR_CHKSUM_SIZE 8
14
15#define FW_NLO_INFO_CHECK_SIZE 4
16
17#define FIFO_PAGE_SIZE_SHIFT 12
18#define FIFO_PAGE_SIZE 4096
19#define FIFO_DUMP_ADDR 0x8000
20
21#define DLFW_PAGE_SIZE_SHIFT_LEGACY 12
22#define DLFW_PAGE_SIZE_LEGACY 0x1000
23#define DLFW_BLK_SIZE_SHIFT_LEGACY 2
24#define DLFW_BLK_SIZE_LEGACY 4
25#define FW_START_ADDR_LEGACY 0x1000
26
27enum rtw_c2h_cmd_id {
28 C2H_CCX_TX_RPT = 0x03,
29 C2H_BT_INFO = 0x09,
30 C2H_BT_MP_INFO = 0x0b,
31 C2H_RA_RPT = 0x0c,
32 C2H_HW_FEATURE_REPORT = 0x19,
33 C2H_WLAN_INFO = 0x27,
34 C2H_WLAN_RFON = 0x32,
35 C2H_HW_FEATURE_DUMP = 0xfd,
36 C2H_HALMAC = 0xff,
37};
38
39enum rtw_c2h_cmd_id_ext {
40 C2H_CCX_RPT = 0x0f,
41};
42
43struct rtw_c2h_cmd {
44 u8 id;
45 u8 seq;
46 u8 payload[];
47} __packed;
48
49enum rtw_rsvd_packet_type {
50 RSVD_BEACON,
51 RSVD_DUMMY,
52 RSVD_PS_POLL,
53 RSVD_PROBE_RESP,
54 RSVD_NULL,
55 RSVD_QOS_NULL,
56 RSVD_LPS_PG_DPK,
57 RSVD_LPS_PG_INFO,
58 RSVD_PROBE_REQ,
59 RSVD_NLO_INFO,
60 RSVD_CH_INFO,
61};
62
63enum rtw_fw_rf_type {
64 FW_RF_1T2R = 0,
65 FW_RF_2T4R = 1,
66 FW_RF_2T2R = 2,
67 FW_RF_2T3R = 3,
68 FW_RF_1T1R = 4,
69 FW_RF_2T2R_GREEN = 5,
70 FW_RF_3T3R = 6,
71 FW_RF_3T4R = 7,
72 FW_RF_4T4R = 8,
73 FW_RF_MAX_TYPE = 0xF,
74};
75
76enum rtw_fw_feature {
77 FW_FEATURE_SIG = BIT(0),
78 FW_FEATURE_LPS_C2H = BIT(1),
79 FW_FEATURE_LCLK = BIT(2),
80 FW_FEATURE_PG = BIT(3),
81 FW_FEATURE_MAX = BIT(31),
82};
83
84struct rtw_coex_info_req {
85 u8 seq;
86 u8 op_code;
87 u8 para1;
88 u8 para2;
89 u8 para3;
90};
91
92struct rtw_iqk_para {
93 u8 clear;
94 u8 segment_iqk;
95};
96
97struct rtw_lps_pg_dpk_hdr {
98 u16 dpk_path_ok;
99 u8 dpk_txagc[2];
100 u16 dpk_gs[2];
101 u32 coef[2][20];
102 u8 dpk_ch;
103} __packed;
104
105struct rtw_lps_pg_info_hdr {
106 u8 macid;
107 u8 mbssid;
108 u8 pattern_count;
109 u8 mu_tab_group_id;
110 u8 sec_cam_count;
111 u8 tx_bu_page_count;
112 u16 rsvd;
113 u8 sec_cam[MAX_PG_CAM_BACKUP_NUM];
114} __packed;
115
116struct rtw_rsvd_page {
117 /* associated with each vif */
118 struct list_head vif_list;
119 struct rtw_vif *rtwvif;
120
121 /* associated when build rsvd page */
122 struct list_head build_list;
123
124 struct sk_buff *skb;
125 enum rtw_rsvd_packet_type type;
126 u8 page;
127 bool add_txdesc;
128 struct cfg80211_ssid *ssid;
129};
130
131enum rtw_keep_alive_pkt_type {
132 KEEP_ALIVE_NULL_PKT = 0,
133 KEEP_ALIVE_ARP_RSP = 1,
134};
135
136struct rtw_nlo_info_hdr {
137 u8 nlo_count;
138 u8 hidden_ap_count;
139 u8 rsvd1[2];
140 u8 pattern_check[FW_NLO_INFO_CHECK_SIZE];
141 u8 rsvd2[8];
142 u8 ssid_len[16];
143 u8 chiper[16];
144 u8 rsvd3[16];
145 u8 location[8];
146} __packed;
147
148enum rtw_packet_type {
149 RTW_PACKET_PROBE_REQ = 0x00,
150
151 RTW_PACKET_UNDEFINE = 0x7FFFFFFF,
152};
153
154struct rtw_fw_wow_keep_alive_para {
155 bool adopt;
156 u8 pkt_type;
157 u8 period; /* unit: sec */
158};
159
160struct rtw_fw_wow_disconnect_para {
161 bool adopt;
162 u8 period; /* unit: sec */
163 u8 retry_count;
164};
165
166struct rtw_ch_switch_option {
167 u8 periodic_option;
168 u32 tsf_high;
169 u32 tsf_low;
170 u8 dest_ch_en;
171 u8 absolute_time_en;
172 u8 dest_ch;
173 u8 normal_period;
174 u8 normal_period_sel;
175 u8 normal_cycle;
176 u8 slow_period;
177 u8 slow_period_sel;
178 u8 nlo_en;
179};
180
181struct rtw_fw_hdr {
182 __le16 signature;
183 u8 category;
184 u8 function;
185 __le16 version; /* 0x04 */
186 u8 subversion;
187 u8 subindex;
188 __le32 rsvd; /* 0x08 */
189 __le32 feature; /* 0x0C */
190 u8 month; /* 0x10 */
191 u8 day;
192 u8 hour;
193 u8 min;
194 __le16 year; /* 0x14 */
195 __le16 rsvd3;
196 u8 mem_usage; /* 0x18 */
197 u8 rsvd4[3];
198 __le16 h2c_fmt_ver; /* 0x1C */
199 __le16 rsvd5;
200 __le32 dmem_addr; /* 0x20 */
201 __le32 dmem_size;
202 __le32 rsvd6;
203 __le32 rsvd7;
204 __le32 imem_size; /* 0x30 */
205 __le32 emem_size;
206 __le32 emem_addr;
207 __le32 imem_addr;
208} __packed;
209
210struct rtw_fw_hdr_legacy {
211 __le16 signature;
212 u8 category;
213 u8 function;
214 __le16 version; /* 0x04 */
215 u8 subversion1;
216 u8 subversion2;
217 u8 month; /* 0x08 */
218 u8 day;
219 u8 hour;
220 u8 minute;
221 __le16 size;
222 __le16 rsvd2;
223 __le32 idx; /* 0x10 */
224 __le32 rsvd3;
225 __le32 rsvd4; /* 0x18 */
226 __le32 rsvd5;
227} __packed;
228
229/* C2H */
230#define GET_CCX_REPORT_SEQNUM_V0(c2h_payload) (c2h_payload[6] & 0xfc)
231#define GET_CCX_REPORT_STATUS_V0(c2h_payload) (c2h_payload[0] & 0xc0)
232#define GET_CCX_REPORT_SEQNUM_V1(c2h_payload) (c2h_payload[8] & 0xfc)
233#define GET_CCX_REPORT_STATUS_V1(c2h_payload) (c2h_payload[9] & 0xc0)
234
235#define GET_RA_REPORT_RATE(c2h_payload) (c2h_payload[0] & 0x7f)
236#define GET_RA_REPORT_SGI(c2h_payload) ((c2h_payload[0] & 0x80) >> 7)
237#define GET_RA_REPORT_BW(c2h_payload) (c2h_payload[6])
238#define GET_RA_REPORT_MACID(c2h_payload) (c2h_payload[1])
239
240/* PKT H2C */
241#define H2C_PKT_CMD_ID 0xFF
242#define H2C_PKT_CATEGORY 0x01
243
244#define H2C_PKT_GENERAL_INFO 0x0D
245#define H2C_PKT_PHYDM_INFO 0x11
246#define H2C_PKT_IQK 0x0E
247
248#define H2C_PKT_CH_SWITCH 0x02
249#define H2C_PKT_UPDATE_PKT 0x0C
250
251#define H2C_PKT_CH_SWITCH_LEN 0x20
252#define H2C_PKT_UPDATE_PKT_LEN 0x4
253
254#define SET_PKT_H2C_CATEGORY(h2c_pkt, value) \
255 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(6, 0))
256#define SET_PKT_H2C_CMD_ID(h2c_pkt, value) \
257 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
258#define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value) \
259 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 16))
260#define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value) \
261 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 0))
262
263static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id)
264{
265 SET_PKT_H2C_CATEGORY(h2c_pkt, H2C_PKT_CATEGORY);
266 SET_PKT_H2C_CMD_ID(h2c_pkt, H2C_PKT_CMD_ID);
267 SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, sub_id);
268}
269
270#define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \
271 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 16))
272#define GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, value) \
273 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
274
275#define PHYDM_INFO_SET_REF_TYPE(h2c_pkt, value) \
276 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(7, 0))
277#define PHYDM_INFO_SET_RF_TYPE(h2c_pkt, value) \
278 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8))
279#define PHYDM_INFO_SET_CUT_VER(h2c_pkt, value) \
280 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
281#define PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, value) \
282 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24))
283#define PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, value) \
284 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 28))
285#define IQK_SET_CLEAR(h2c_pkt, value) \
286 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0))
287#define IQK_SET_SEGMENT_IQK(h2c_pkt, value) \
288 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1))
289
290#define CHSW_INFO_SET_CH(pkt, value) \
291 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(7, 0))
292#define CHSW_INFO_SET_PRI_CH_IDX(pkt, value) \
293 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(11, 8))
294#define CHSW_INFO_SET_BW(pkt, value) \
295 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(15, 12))
296#define CHSW_INFO_SET_TIMEOUT(pkt, value) \
297 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(23, 16))
298#define CHSW_INFO_SET_ACTION_ID(pkt, value) \
299 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(30, 24))
300
301#define UPDATE_PKT_SET_SIZE(h2c_pkt, value) \
302 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 0))
303#define UPDATE_PKT_SET_PKT_ID(h2c_pkt, value) \
304 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
305#define UPDATE_PKT_SET_LOCATION(h2c_pkt, value) \
306 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 24))
307
308#define CH_SWITCH_SET_START(h2c_pkt, value) \
309 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0))
310#define CH_SWITCH_SET_DEST_CH_EN(h2c_pkt, value) \
311 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1))
312#define CH_SWITCH_SET_ABSOLUTE_TIME(h2c_pkt, value) \
313 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2))
314#define CH_SWITCH_SET_PERIODIC_OPT(h2c_pkt, value) \
315 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(4, 3))
316#define CH_SWITCH_SET_INFO_LOC(h2c_pkt, value) \
317 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8))
318#define CH_SWITCH_SET_CH_NUM(h2c_pkt, value) \
319 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
320#define CH_SWITCH_SET_PRI_CH_IDX(h2c_pkt, value) \
321 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24))
322#define CH_SWITCH_SET_DEST_CH(h2c_pkt, value) \
323 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0))
324#define CH_SWITCH_SET_NORMAL_PERIOD(h2c_pkt, value) \
325 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(13, 8))
326#define CH_SWITCH_SET_NORMAL_PERIOD_SEL(h2c_pkt, value) \
327 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(15, 14))
328#define CH_SWITCH_SET_SLOW_PERIOD(h2c_pkt, value) \
329 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(21, 16))
330#define CH_SWITCH_SET_SLOW_PERIOD_SEL(h2c_pkt, value) \
331 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(23, 22))
332#define CH_SWITCH_SET_NORMAL_CYCLE(h2c_pkt, value) \
333 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(31, 24))
334#define CH_SWITCH_SET_TSF_HIGH(h2c_pkt, value) \
335 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(31, 0))
336#define CH_SWITCH_SET_TSF_LOW(h2c_pkt, value) \
337 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(31, 0))
338#define CH_SWITCH_SET_INFO_SIZE(h2c_pkt, value) \
339 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x06, value, GENMASK(15, 0))
340
341/* Command H2C */
342#define H2C_CMD_RSVD_PAGE 0x0
343#define H2C_CMD_MEDIA_STATUS_RPT 0x01
344#define H2C_CMD_SET_PWR_MODE 0x20
345#define H2C_CMD_LPS_PG_INFO 0x2b
346#define H2C_CMD_RA_INFO 0x40
347#define H2C_CMD_RSSI_MONITOR 0x42
348
349#define H2C_CMD_COEX_TDMA_TYPE 0x60
350#define H2C_CMD_QUERY_BT_INFO 0x61
351#define H2C_CMD_FORCE_BT_TX_POWER 0x62
352#define H2C_CMD_IGNORE_WLAN_ACTION 0x63
353#define H2C_CMD_WL_CH_INFO 0x66
354#define H2C_CMD_QUERY_BT_MP_INFO 0x67
355#define H2C_CMD_BT_WIFI_CONTROL 0x69
356
357#define H2C_CMD_KEEP_ALIVE 0x03
358#define H2C_CMD_DISCONNECT_DECISION 0x04
359#define H2C_CMD_WOWLAN 0x80
360#define H2C_CMD_REMOTE_WAKE_CTRL 0x81
361#define H2C_CMD_AOAC_GLOBAL_INFO 0x82
362#define H2C_CMD_NLO_INFO 0x8C
363
364#define SET_H2C_CMD_ID_CLASS(h2c_pkt, value) \
365 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0))
366
367#define MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, value) \
368 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
369#define MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, value) \
370 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
371
372#define SET_PWR_MODE_SET_MODE(h2c_pkt, value) \
373 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(14, 8))
374#define SET_PWR_MODE_SET_RLBM(h2c_pkt, value) \
375 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(19, 16))
376#define SET_PWR_MODE_SET_SMART_PS(h2c_pkt, value) \
377 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 20))
378#define SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, value) \
379 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
380#define SET_PWR_MODE_SET_PORT_ID(h2c_pkt, value) \
381 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 5))
382#define SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, value) \
383 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
384#define LPS_PG_INFO_LOC(h2c_pkt, value) \
385 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
386#define LPS_PG_DPK_LOC(h2c_pkt, value) \
387 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
388#define LPS_PG_SEC_CAM_EN(h2c_pkt, value) \
389 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
390#define LPS_PG_PATTERN_CAM_EN(h2c_pkt, value) \
391 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
392#define SET_RSSI_INFO_MACID(h2c_pkt, value) \
393 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
394#define SET_RSSI_INFO_RSSI(h2c_pkt, value) \
395 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
396#define SET_RSSI_INFO_STBC(h2c_pkt, value) \
397 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, BIT(1))
398#define SET_RA_INFO_MACID(h2c_pkt, value) \
399 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
400#define SET_RA_INFO_RATE_ID(h2c_pkt, value) \
401 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 16))
402#define SET_RA_INFO_INIT_RA_LVL(h2c_pkt, value) \
403 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(22, 21))
404#define SET_RA_INFO_SGI_EN(h2c_pkt, value) \
405 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(23))
406#define SET_RA_INFO_BW_MODE(h2c_pkt, value) \
407 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(25, 24))
408#define SET_RA_INFO_LDPC(h2c_pkt, value) \
409 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(26))
410#define SET_RA_INFO_NO_UPDATE(h2c_pkt, value) \
411 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(27))
412#define SET_RA_INFO_VHT_EN(h2c_pkt, value) \
413 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(29, 28))
414#define SET_RA_INFO_DIS_PT(h2c_pkt, value) \
415 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(30))
416#define SET_RA_INFO_RA_MASK0(h2c_pkt, value) \
417 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
418#define SET_RA_INFO_RA_MASK1(h2c_pkt, value) \
419 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
420#define SET_RA_INFO_RA_MASK2(h2c_pkt, value) \
421 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16))
422#define SET_RA_INFO_RA_MASK3(h2c_pkt, value) \
423 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 24))
424#define SET_QUERY_BT_INFO(h2c_pkt, value) \
425 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
426#define SET_WL_CH_INFO_LINK(h2c_pkt, value) \
427 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
428#define SET_WL_CH_INFO_CHNL(h2c_pkt, value) \
429 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
430#define SET_WL_CH_INFO_BW(h2c_pkt, value) \
431 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
432#define SET_BT_MP_INFO_SEQ(h2c_pkt, value) \
433 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12))
434#define SET_BT_MP_INFO_OP_CODE(h2c_pkt, value) \
435 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
436#define SET_BT_MP_INFO_PARA1(h2c_pkt, value) \
437 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
438#define SET_BT_MP_INFO_PARA2(h2c_pkt, value) \
439 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
440#define SET_BT_MP_INFO_PARA3(h2c_pkt, value) \
441 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
442#define SET_BT_TX_POWER_INDEX(h2c_pkt, value) \
443 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
444#define SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, value) \
445 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
446#define SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, value) \
447 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
448#define SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, value) \
449 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
450#define SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, value) \
451 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
452#define SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, value) \
453 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
454#define SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, value) \
455 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
456#define SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, value) \
457 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
458#define SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, value) \
459 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
460#define SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, value) \
461 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
462#define SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, value) \
463 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
464#define SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, value) \
465 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
466#define SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, value) \
467 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16))
468
469#define SET_KEEP_ALIVE_ENABLE(h2c_pkt, value) \
470 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
471#define SET_KEEP_ALIVE_ADOPT(h2c_pkt, value) \
472 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
473#define SET_KEEP_ALIVE_PKT_TYPE(h2c_pkt, value) \
474 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
475#define SET_KEEP_ALIVE_CHECK_PERIOD(h2c_pkt, value) \
476 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
477
478#define SET_DISCONNECT_DECISION_ENABLE(h2c_pkt, value) \
479 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
480#define SET_DISCONNECT_DECISION_ADOPT(h2c_pkt, value) \
481 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
482#define SET_DISCONNECT_DECISION_CHECK_PERIOD(h2c_pkt, value) \
483 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
484#define SET_DISCONNECT_DECISION_TRY_PKT_NUM(h2c_pkt, value) \
485 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
486
487#define SET_WOWLAN_FUNC_ENABLE(h2c_pkt, value) \
488 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
489#define SET_WOWLAN_PATTERN_MATCH_ENABLE(h2c_pkt, value) \
490 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
491#define SET_WOWLAN_MAGIC_PKT_ENABLE(h2c_pkt, value) \
492 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
493#define SET_WOWLAN_UNICAST_PKT_ENABLE(h2c_pkt, value) \
494 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(11))
495#define SET_WOWLAN_REKEY_WAKEUP_ENABLE(h2c_pkt, value) \
496 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(14))
497#define SET_WOWLAN_DEAUTH_WAKEUP_ENABLE(h2c_pkt, value) \
498 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(15))
499
500#define SET_REMOTE_WAKECTRL_ENABLE(h2c_pkt, value) \
501 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
502#define SET_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(h2c_pkt, value) \
503 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(12))
504
505#define SET_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(h2c_pkt, value) \
506 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
507#define SET_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(h2c_pkt, value) \
508 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
509
510#define SET_NLO_FUN_EN(h2c_pkt, value) \
511 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
512#define SET_NLO_PS_32K(h2c_pkt, value) \
513 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
514#define SET_NLO_IGNORE_SECURITY(h2c_pkt, value) \
515 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
516#define SET_NLO_LOC_NLO_INFO(h2c_pkt, value) \
517 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
518
519#define GET_FW_DUMP_LEN(_header) \
520 le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(15, 0))
521#define GET_FW_DUMP_SEQ(_header) \
522 le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(22, 16))
523#define GET_FW_DUMP_MORE(_header) \
524 le32_get_bits(*((__le32 *)(_header) + 0x00), BIT(23))
525#define GET_FW_DUMP_VERSION(_header) \
526 le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(31, 24))
527#define GET_FW_DUMP_TLV_TYPE(_header) \
528 le32_get_bits(*((__le32 *)(_header) + 0x01), GENMASK(15, 0))
529#define GET_FW_DUMP_TLV_LEN(_header) \
530 le32_get_bits(*((__le32 *)(_header) + 0x01), GENMASK(31, 16))
531#define GET_FW_DUMP_TLV_VAL(_header) \
532 le32_get_bits(*((__le32 *)(_header) + 0x02), GENMASK(31, 0))
533static inline struct rtw_c2h_cmd *get_c2h_from_skb(struct sk_buff *skb)
534{
535 u32 pkt_offset;
536
537 pkt_offset = *((u32 *)skb->cb);
538 return (struct rtw_c2h_cmd *)(skb->data + pkt_offset);
539}
540
541void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset,
542 struct sk_buff *skb);
543void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb);
544void rtw_fw_send_general_info(struct rtw_dev *rtwdev);
545void rtw_fw_send_phydm_info(struct rtw_dev *rtwdev);
546
547void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para);
548void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev);
549void rtw_fw_set_pg_info(struct rtw_dev *rtwdev);
550void rtw_fw_query_bt_info(struct rtw_dev *rtwdev);
551void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw);
552void rtw_fw_query_bt_mp_info(struct rtw_dev *rtwdev,
553 struct rtw_coex_info_req *req);
554void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl);
555void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable);
556void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev,
557 u8 para1, u8 para2, u8 para3, u8 para4, u8 para5);
558void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data);
559void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si);
560void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si);
561void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool conn);
562int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr,
563 u8 *buf, u32 size);
564void rtw_remove_rsvd_page(struct rtw_dev *rtwdev,
565 struct rtw_vif *rtwvif);
566void rtw_add_rsvd_page_bcn(struct rtw_dev *rtwdev,
567 struct rtw_vif *rtwvif);
568void rtw_add_rsvd_page_pno(struct rtw_dev *rtwdev,
569 struct rtw_vif *rtwvif);
570void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev,
571 struct rtw_vif *rtwvif);
572int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev);
573void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev);
574int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev,
575 u32 offset, u32 size, u32 *buf);
576void rtw_fw_set_remote_wake_ctrl_cmd(struct rtw_dev *rtwdev, bool enable);
577void rtw_fw_set_wowlan_ctrl_cmd(struct rtw_dev *rtwdev, bool enable);
578void rtw_fw_set_keep_alive_cmd(struct rtw_dev *rtwdev, bool enable);
579void rtw_fw_set_disconnect_decision_cmd(struct rtw_dev *rtwdev, bool enable);
580void rtw_fw_set_aoac_global_info_cmd(struct rtw_dev *rtwdev,
581 u8 pairwise_key_enc,
582 u8 group_key_enc);
583
584void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable);
585void rtw_fw_update_pkt_probe_req(struct rtw_dev *rtwdev,
586 struct cfg80211_ssid *ssid);
587void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable);
588void rtw_fw_h2c_cmd_dbg(struct rtw_dev *rtwdev, u8 *h2c);
589void rtw_fw_c2h_cmd_isr(struct rtw_dev *rtwdev);
590int rtw_fw_dump_fifo(struct rtw_dev *rtwdev, u8 fifo_sel, u32 addr, u32 size,
591 u32 *buffer);
592
593#endif