| commit | 70e99b3383a4c7760d077cb7e6c8443cbeb2bcd8 | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@intel.com> | Thu Sep 06 23:55:36 2018 +0000 |
| committer | Craig Topper <craig.topper@intel.com> | Thu Sep 06 23:55:36 2018 +0000 |
| tree | 3e7ae4da5d56d3767874f13e0ce3cae4995a665b | |
| parent | 68e835e9f0298f240716bcb6df0ea8c24e1497d3 [diff] |
[X86] Add RMW ADC patterns with load in operand 1. ADC is commutable and the load could be in either operand, but we were only checking operand 0. Ideally we'd mark X86adc_flag as commutable and tablegen would automatically do this, but the EFLAGS register mention is preventing it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341606 91177308-0d34-0410-b5e6-96231b3b80d8