blob: 184f72e9856e007d8f5a437ae727900197d1f007 [file] [log] [blame]
Nadav Rotem3c98ce22012-06-10 18:42:51 +00001; RUN: llvm-as < %s | llvm-dis | FileCheck %s
Duncan P. N. Exon Smith13f5c582014-08-19 21:08:27 +00002; RUN: verify-uselistorder < %s
Craig Topperbe3f63f2017-06-04 08:21:58 +00003; REQUIRES: x86-registered-target
Nadav Rotem3c98ce22012-06-10 18:42:51 +00004
5define i32 @foo(<4 x float> %bar) nounwind {
6entry:
7; CHECK: call i32 @llvm.x86.sse41.ptestc(<2 x i64>
8 %res1 = call i32 @llvm.x86.sse41.ptestc(<4 x float> %bar, <4 x float> %bar)
9; CHECK: call i32 @llvm.x86.sse41.ptestz(<2 x i64>
10 %res2 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %bar, <4 x float> %bar)
11; CHECK: call i32 @llvm.x86.sse41.ptestnzc(<2 x i64>
12 %res3 = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %bar, <4 x float> %bar)
13 %add1 = add i32 %res1, %res2
14 %add2 = add i32 %add1, %res2
15 ret i32 %add2
16}
17
Bill Wendling7ab6c762013-02-20 07:21:42 +000018; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) #1
19; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) #1
20; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) #1
Nadav Rotem3c98ce22012-06-10 18:42:51 +000021
22declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone
23declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone
24declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone
Bill Wendling7ab6c762013-02-20 07:21:42 +000025
26; CHECK: attributes #0 = { nounwind }
27; CHECK: attributes #1 = { nounwind readnone }