Nadav Rotem | 3c98ce2 | 2012-06-10 18:42:51 +0000 | [diff] [blame] | 1 | ; RUN: llvm-as < %s | llvm-dis | FileCheck %s |
Duncan P. N. Exon Smith | 13f5c58 | 2014-08-19 21:08:27 +0000 | [diff] [blame] | 2 | ; RUN: verify-uselistorder < %s |
Craig Topper | be3f63f | 2017-06-04 08:21:58 +0000 | [diff] [blame] | 3 | ; REQUIRES: x86-registered-target |
Nadav Rotem | 3c98ce2 | 2012-06-10 18:42:51 +0000 | [diff] [blame] | 4 | |
| 5 | define i32 @foo(<4 x float> %bar) nounwind { |
| 6 | entry: |
| 7 | ; CHECK: call i32 @llvm.x86.sse41.ptestc(<2 x i64> |
| 8 | %res1 = call i32 @llvm.x86.sse41.ptestc(<4 x float> %bar, <4 x float> %bar) |
| 9 | ; CHECK: call i32 @llvm.x86.sse41.ptestz(<2 x i64> |
| 10 | %res2 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %bar, <4 x float> %bar) |
| 11 | ; CHECK: call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> |
| 12 | %res3 = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %bar, <4 x float> %bar) |
| 13 | %add1 = add i32 %res1, %res2 |
| 14 | %add2 = add i32 %add1, %res2 |
| 15 | ret i32 %add2 |
| 16 | } |
| 17 | |
Bill Wendling | 7ab6c76 | 2013-02-20 07:21:42 +0000 | [diff] [blame] | 18 | ; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) #1 |
| 19 | ; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) #1 |
| 20 | ; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) #1 |
Nadav Rotem | 3c98ce2 | 2012-06-10 18:42:51 +0000 | [diff] [blame] | 21 | |
| 22 | declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone |
| 23 | declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone |
| 24 | declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone |
Bill Wendling | 7ab6c76 | 2013-02-20 07:21:42 +0000 | [diff] [blame] | 25 | |
| 26 | ; CHECK: attributes #0 = { nounwind } |
| 27 | ; CHECK: attributes #1 = { nounwind readnone } |