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Andrea Di Biagio29b29cc2018-03-08 13:05:02 +00001//===-- llvm-mca.cpp - Machine Code Analyzer -------------------*- C++ -* -===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This utility is a simple driver that allows static performance analysis on
11// machine code similarly to how IACA (Intel Architecture Code Analyzer) works.
12//
13// llvm-mca [options] <file-name>
14// -march <type>
15// -mcpu <cpu>
16// -o <file>
17//
18// The target defaults to the host target.
Andrea Di Biagioe5080422018-04-25 10:18:25 +000019// The cpu defaults to the 'native' host cpu.
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000020// The output defaults to standard output.
21//
22//===----------------------------------------------------------------------===//
23
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +000024#include "CodeRegion.h"
Matt Davis1969d262018-11-07 19:20:04 +000025#include "CodeRegionGenerator.h"
Matt Davisd8c387b2018-06-25 16:53:00 +000026#include "PipelinePrinter.h"
Matt Davis444bd812018-08-24 20:24:53 +000027#include "Views/DispatchStatistics.h"
28#include "Views/InstructionInfoView.h"
29#include "Views/RegisterFileStatistics.h"
30#include "Views/ResourcePressureView.h"
31#include "Views/RetireControlUnitStatistics.h"
32#include "Views/SchedulerStatistics.h"
33#include "Views/SummaryView.h"
34#include "Views/TimelineView.h"
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000035#include "llvm/MC/MCAsmInfo.h"
36#include "llvm/MC/MCContext.h"
37#include "llvm/MC/MCObjectFileInfo.h"
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000038#include "llvm/MC/MCRegisterInfo.h"
Clement Courbet8178ac82018-12-17 08:08:31 +000039#include "llvm/MCA/Context.h"
40#include "llvm/MCA/Pipeline.h"
41#include "llvm/MCA/Stages/EntryStage.h"
42#include "llvm/MCA/Stages/InstructionTables.h"
43#include "llvm/MCA/Support.h"
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000044#include "llvm/Support/CommandLine.h"
Matt Davisfd195ce2018-08-13 18:11:48 +000045#include "llvm/Support/ErrorHandling.h"
Andrea Di Biagio6b07e2f2018-03-08 16:08:43 +000046#include "llvm/Support/ErrorOr.h"
47#include "llvm/Support/FileSystem.h"
Andrea Di Biagiob7acab12018-04-25 10:27:30 +000048#include "llvm/Support/Host.h"
Rui Ueyama0b9d56a2018-04-13 18:26:06 +000049#include "llvm/Support/InitLLVM.h"
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000050#include "llvm/Support/MemoryBuffer.h"
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000051#include "llvm/Support/SourceMgr.h"
52#include "llvm/Support/TargetRegistry.h"
53#include "llvm/Support/TargetSelect.h"
Andrea Di Biagio6b07e2f2018-03-08 16:08:43 +000054#include "llvm/Support/ToolOutputFile.h"
Jonas Devlieghereef2e5c92018-04-18 15:26:51 +000055#include "llvm/Support/WithColor.h"
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000056
57using namespace llvm;
58
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +000059static cl::OptionCategory ToolOptions("Tool Options");
60static cl::OptionCategory ViewOptions("View Options");
Andrea Di Biagioa2dfca12018-04-25 11:33:14 +000061
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +000062static cl::opt<std::string> InputFilename(cl::Positional,
63 cl::desc("<input file>"),
64 cl::cat(ToolOptions), cl::init("-"));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000065
66static cl::opt<std::string> OutputFilename("o", cl::desc("Output filename"),
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +000067 cl::init("-"), cl::cat(ToolOptions),
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000068 cl::value_desc("filename"));
69
70static cl::opt<std::string>
Matt Davisec248eb2018-10-31 17:47:25 +000071 ArchName("march", cl::desc("Target architecture. "
72 "See -version for available targets"),
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +000073 cl::cat(ToolOptions));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000074
75static cl::opt<std::string>
Andrea Di Biagio2ec32392018-10-22 15:36:15 +000076 TripleName("mtriple",
Matt Davisec248eb2018-10-31 17:47:25 +000077 cl::desc("Target triple. See -version for available targets"),
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +000078 cl::cat(ToolOptions));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000079
80static cl::opt<std::string>
81 MCPU("mcpu",
82 cl::desc("Target a specific cpu type (-mcpu=help for details)"),
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +000083 cl::value_desc("cpu-name"), cl::cat(ToolOptions), cl::init("native"));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000084
Andrea Di Biagio98308432018-04-24 16:19:08 +000085static cl::opt<int>
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000086 OutputAsmVariant("output-asm-variant",
Andrea Di Biagio98308432018-04-24 16:19:08 +000087 cl::desc("Syntax variant to use for output printing"),
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +000088 cl::cat(ToolOptions), cl::init(-1));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000089
90static cl::opt<unsigned> Iterations("iterations",
91 cl::desc("Number of iterations to run"),
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +000092 cl::cat(ToolOptions), cl::init(0));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000093
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +000094static cl::opt<unsigned>
95 DispatchWidth("dispatch", cl::desc("Override the processor dispatch width"),
96 cl::cat(ToolOptions), cl::init(0));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000097
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +000098static cl::opt<unsigned>
99 RegisterFileSize("register-file-size",
Matt Davis99802f32018-07-31 20:05:08 +0000100 cl::desc("Maximum number of physical registers which can "
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000101 "be used for register mappings"),
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +0000102 cl::cat(ToolOptions), cl::init(0));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000103
Andrea Di Biagio10ba8182018-03-23 11:33:09 +0000104static cl::opt<bool>
Andrea Di Biagio6ea791d2018-04-03 16:46:23 +0000105 PrintRegisterFileStats("register-file-stats",
106 cl::desc("Print register file statistics"),
Andrea Di Biagiod6075d02018-05-05 15:36:47 +0000107 cl::cat(ViewOptions), cl::init(false));
Andrea Di Biagio6ea791d2018-04-03 16:46:23 +0000108
Andrea Di Biagiob7acab12018-04-25 10:27:30 +0000109static cl::opt<bool> PrintDispatchStats("dispatch-stats",
110 cl::desc("Print dispatch statistics"),
Andrea Di Biagiod6075d02018-05-05 15:36:47 +0000111 cl::cat(ViewOptions), cl::init(false));
Andrea Di Biagio955aba42018-04-10 14:55:14 +0000112
Roman Lebedev6fe55f42018-06-15 14:01:43 +0000113static cl::opt<bool>
114 PrintSummaryView("summary-view", cl::Hidden,
115 cl::desc("Print summary view (enabled by default)"),
116 cl::cat(ViewOptions), cl::init(true));
117
Andrea Di Biagiob7acab12018-04-25 10:27:30 +0000118static cl::opt<bool> PrintSchedulerStats("scheduler-stats",
119 cl::desc("Print scheduler statistics"),
Andrea Di Biagiod6075d02018-05-05 15:36:47 +0000120 cl::cat(ViewOptions), cl::init(false));
Andrea Di Biagio2d438c02018-04-11 11:37:46 +0000121
122static cl::opt<bool>
Andrea Di Biagio900cf752018-04-11 12:12:53 +0000123 PrintRetireStats("retire-stats",
Andrea Di Biagiob7acab12018-04-25 10:27:30 +0000124 cl::desc("Print retire control unit statistics"),
Andrea Di Biagiod6075d02018-05-05 15:36:47 +0000125 cl::cat(ViewOptions), cl::init(false));
Andrea Di Biagio900cf752018-04-11 12:12:53 +0000126
Andrea Di Biagiod6075d02018-05-05 15:36:47 +0000127static cl::opt<bool> PrintResourcePressureView(
128 "resource-pressure",
129 cl::desc("Print the resource pressure view (enabled by default)"),
130 cl::cat(ViewOptions), cl::init(true));
Andrea Di Biagio10ba8182018-03-23 11:33:09 +0000131
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000132static cl::opt<bool> PrintTimelineView("timeline",
133 cl::desc("Print the timeline view"),
Andrea Di Biagiod6075d02018-05-05 15:36:47 +0000134 cl::cat(ViewOptions), cl::init(false));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000135
136static cl::opt<unsigned> TimelineMaxIterations(
137 "timeline-max-iterations",
138 cl::desc("Maximum number of iterations to print in timeline view"),
Andrea Di Biagiod6075d02018-05-05 15:36:47 +0000139 cl::cat(ViewOptions), cl::init(0));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000140
141static cl::opt<unsigned> TimelineMaxCycles(
142 "timeline-max-cycles",
143 cl::desc(
144 "Maximum number of cycles in the timeline view. Defaults to 80 cycles"),
Andrea Di Biagiod6075d02018-05-05 15:36:47 +0000145 cl::cat(ViewOptions), cl::init(80));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000146
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +0000147static cl::opt<bool>
148 AssumeNoAlias("noalias",
149 cl::desc("If set, assume that loads and stores do not alias"),
150 cl::cat(ToolOptions), cl::init(true));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000151
Matt Davis6bad72c2018-12-19 18:27:05 +0000152static cl::opt<unsigned> LoadQueueSize("lqueue",
153 cl::desc("Size of the load queue"),
154 cl::cat(ToolOptions), cl::init(0));
Andrea Di Biagio181ce9f2018-03-26 12:04:53 +0000155
Matt Davis6bad72c2018-12-19 18:27:05 +0000156static cl::opt<unsigned> StoreQueueSize("squeue",
157 cl::desc("Size of the store queue"),
158 cl::cat(ToolOptions), cl::init(0));
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000159
Andrea Di Biagio181ce9f2018-03-26 12:04:53 +0000160static cl::opt<bool>
161 PrintInstructionTables("instruction-tables",
162 cl::desc("Print instruction tables"),
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +0000163 cl::cat(ToolOptions), cl::init(false));
Andrea Di Biagio181ce9f2018-03-26 12:04:53 +0000164
Andrea Di Biagiod6075d02018-05-05 15:36:47 +0000165static cl::opt<bool> PrintInstructionInfoView(
166 "instruction-info",
167 cl::desc("Print the instruction info view (enabled by default)"),
168 cl::cat(ViewOptions), cl::init(true));
Andrea Di Biagiofafdf4a2018-03-26 13:44:54 +0000169
Andrea Di Biagioacf3f6e2018-05-17 12:27:03 +0000170static cl::opt<bool> EnableAllStats("all-stats",
171 cl::desc("Print all hardware statistics"),
172 cl::cat(ViewOptions), cl::init(false));
173
174static cl::opt<bool>
175 EnableAllViews("all-views",
176 cl::desc("Print all views including hardware statistics"),
177 cl::cat(ViewOptions), cl::init(false));
178
Andrea Di Biagio27855762018-04-08 15:10:19 +0000179namespace {
180
181const Target *getTarget(const char *ProgName) {
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000182 if (TripleName.empty())
183 TripleName = Triple::normalize(sys::getDefaultTargetTriple());
184 Triple TheTriple(TripleName);
185
186 // Get the target specific parser.
187 std::string Error;
188 const Target *TheTarget =
189 TargetRegistry::lookupTarget(ArchName, TheTriple, Error);
190 if (!TheTarget) {
191 errs() << ProgName << ": " << Error;
192 return nullptr;
193 }
194
195 // Return the found target.
196 return TheTarget;
197}
198
Andrea Di Biagio27855762018-04-08 15:10:19 +0000199ErrorOr<std::unique_ptr<ToolOutputFile>> getOutputStream() {
Andrea Di Biagio6b07e2f2018-03-08 16:08:43 +0000200 if (OutputFilename == "")
201 OutputFilename = "-";
202 std::error_code EC;
Matt Davis09aba6b2018-11-08 18:08:43 +0000203 auto Out =
204 llvm::make_unique<ToolOutputFile>(OutputFilename, EC, sys::fs::F_None);
Andrea Di Biagio6b07e2f2018-03-08 16:08:43 +0000205 if (!EC)
206 return std::move(Out);
207 return EC;
208}
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000209} // end of anonymous namespace
210
Andrea Di Biagioacf3f6e2018-05-17 12:27:03 +0000211static void processOptionImpl(cl::opt<bool> &O, const cl::opt<bool> &Default) {
212 if (!O.getNumOccurrences() || O.getPosition() < Default.getPosition())
213 O = Default.getValue();
214}
215
216static void processViewOptions() {
217 if (!EnableAllViews.getNumOccurrences() &&
218 !EnableAllStats.getNumOccurrences())
219 return;
220
221 if (EnableAllViews.getNumOccurrences()) {
Roman Lebedev6fe55f42018-06-15 14:01:43 +0000222 processOptionImpl(PrintSummaryView, EnableAllViews);
Andrea Di Biagioacf3f6e2018-05-17 12:27:03 +0000223 processOptionImpl(PrintResourcePressureView, EnableAllViews);
224 processOptionImpl(PrintTimelineView, EnableAllViews);
225 processOptionImpl(PrintInstructionInfoView, EnableAllViews);
226 }
227
228 const cl::opt<bool> &Default =
229 EnableAllViews.getPosition() < EnableAllStats.getPosition()
230 ? EnableAllStats
231 : EnableAllViews;
232 processOptionImpl(PrintRegisterFileStats, Default);
233 processOptionImpl(PrintDispatchStats, Default);
234 processOptionImpl(PrintSchedulerStats, Default);
235 processOptionImpl(PrintRetireStats, Default);
236}
237
Andrea Di Biagio8f55d092018-10-24 10:56:47 +0000238// Returns true on success.
Andrea Di Biagioee5a5142018-10-29 13:29:22 +0000239static bool runPipeline(mca::Pipeline &P) {
Andrea Di Biagio8f55d092018-10-24 10:56:47 +0000240 // Handle pipeline errors here.
Andrea Di Biagio3d1a12c2018-11-28 19:31:19 +0000241 Expected<unsigned> Cycles = P.run();
242 if (!Cycles) {
243 WithColor::error() << toString(Cycles.takeError());
Andrea Di Biagio8f55d092018-10-24 10:56:47 +0000244 return false;
245 }
Andrea Di Biagio8f55d092018-10-24 10:56:47 +0000246 return true;
247}
248
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000249int main(int argc, char **argv) {
Rui Ueyama0b9d56a2018-04-13 18:26:06 +0000250 InitLLVM X(argc, argv);
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000251
252 // Initialize targets and assembly parsers.
Matt Davisc6216b02018-11-08 17:32:45 +0000253 InitializeAllTargetInfos();
254 InitializeAllTargetMCs();
255 InitializeAllAsmParsers();
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000256
257 // Enable printing of available targets when flag --version is specified.
258 cl::AddExtraVersionPrinter(TargetRegistry::printRegisteredTargetsForVersion);
259
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +0000260 cl::HideUnrelatedOptions({&ToolOptions, &ViewOptions});
261
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000262 // Parse flags and initialize target options.
263 cl::ParseCommandLineOptions(argc, argv,
264 "llvm machine code performance analyzer.\n");
Andrea Di Biagioeb1647b2018-05-17 15:35:14 +0000265
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000266 // Get the target from the triple. If a triple is not specified, then select
267 // the default triple for the host. If the triple doesn't correspond to any
268 // registered target, then exit with an error message.
269 const char *ProgName = argv[0];
270 const Target *TheTarget = getTarget(ProgName);
271 if (!TheTarget)
272 return 1;
273
274 // GetTarget() may replaced TripleName with a default triple.
275 // For safety, reconstruct the Triple object.
276 Triple TheTriple(TripleName);
277
278 ErrorOr<std::unique_ptr<MemoryBuffer>> BufferPtr =
279 MemoryBuffer::getFileOrSTDIN(InputFilename);
280 if (std::error_code EC = BufferPtr.getError()) {
Jonas Devlieghereef2e5c92018-04-18 15:26:51 +0000281 WithColor::error() << InputFilename << ": " << EC.message() << '\n';
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000282 return 1;
283 }
284
Andrea Di Biagioacf3f6e2018-05-17 12:27:03 +0000285 // Apply overrides to llvm-mca specific options.
286 processViewOptions();
287
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000288 SourceMgr SrcMgr;
289
290 // Tell SrcMgr about this buffer, which is what the parser will pick up.
291 SrcMgr.AddNewSourceBuffer(std::move(*BufferPtr), SMLoc());
292
293 std::unique_ptr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TripleName));
294 assert(MRI && "Unable to create target register info!");
295
296 std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
297 assert(MAI && "Unable to create target asm info!");
298
299 MCObjectFileInfo MOFI;
300 MCContext Ctx(MAI.get(), MRI.get(), &MOFI, &SrcMgr);
301 MOFI.InitMCObjectFileInfo(TheTriple, /* PIC= */ false, Ctx);
302
303 std::unique_ptr<buffer_ostream> BOS;
Andrea Di Biagio181ce9f2018-03-26 12:04:53 +0000304
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000305 std::unique_ptr<MCInstrInfo> MCII(TheTarget->createMCInstrInfo());
Andrea Di Biagioe5080422018-04-25 10:18:25 +0000306
Andrea Di Biagio9fc96b82018-06-20 10:08:11 +0000307 std::unique_ptr<MCInstrAnalysis> MCIA(
308 TheTarget->createMCInstrAnalysis(MCII.get()));
309
Andrea Di Biagioe5080422018-04-25 10:18:25 +0000310 if (!MCPU.compare("native"))
Matt Davis09aba6b2018-11-08 18:08:43 +0000311 MCPU = llvm::sys::getHostCPUName();
Andrea Di Biagioe5080422018-04-25 10:18:25 +0000312
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000313 std::unique_ptr<MCSubtargetInfo> STI(
314 TheTarget->createMCSubtargetInfo(TripleName, MCPU, /* FeaturesStr */ ""));
315 if (!STI->isCPUStringValid(MCPU))
316 return 1;
317
Andrea Di Biagio0110ab12018-04-30 12:05:34 +0000318 if (!PrintInstructionTables && !STI->getSchedModel().isOutOfOrder()) {
Jonas Devlieghereef2e5c92018-04-18 15:26:51 +0000319 WithColor::error() << "please specify an out-of-order cpu. '" << MCPU
320 << "' is an in-order cpu.\n";
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000321 return 1;
322 }
323
324 if (!STI->getSchedModel().hasInstrSchedModel()) {
Jonas Devlieghereef2e5c92018-04-18 15:26:51 +0000325 WithColor::error()
326 << "unable to find instruction-level scheduling information for"
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000327 << " target triple '" << TheTriple.normalize() << "' and cpu '" << MCPU
328 << "'.\n";
329
330 if (STI->getSchedModel().InstrItineraries)
Jonas Devlieghereef2e5c92018-04-18 15:26:51 +0000331 WithColor::note()
332 << "cpu '" << MCPU << "' provides itineraries. However, "
333 << "instruction itineraries are currently unsupported.\n";
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000334 return 1;
335 }
336
Matt Davis1969d262018-11-07 19:20:04 +0000337 // Parse the input and create CodeRegions that llvm-mca can analyze.
338 mca::AsmCodeRegionGenerator CRG(*TheTarget, SrcMgr, Ctx, *MAI, *STI, *MCII);
339 Expected<const mca::CodeRegions &> RegionsOrErr = CRG.parseCodeRegions();
Matt Davis6bad72c2018-12-19 18:27:05 +0000340 if (!RegionsOrErr) {
341 if (auto Err =
Matt Davis4b7ed4f2018-12-19 18:57:43 +0000342 handleErrors(RegionsOrErr.takeError(), [](const StringError &E) {
343 WithColor::error() << E.getMessage() << '\n';
Matt Davis6bad72c2018-12-19 18:27:05 +0000344 })) {
345 // Default case.
346 WithColor::error() << toString(std::move(Err)) << '\n';
347 }
Andrea Di Biagio27855762018-04-08 15:10:19 +0000348 return 1;
Matt Davis1969d262018-11-07 19:20:04 +0000349 }
350 const mca::CodeRegions &Regions = *RegionsOrErr;
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000351 if (Regions.empty()) {
Jonas Devlieghereef2e5c92018-04-18 15:26:51 +0000352 WithColor::error() << "no assembly instructions found.\n";
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000353 return 1;
354 }
355
Andrea Di Biagio6b07e2f2018-03-08 16:08:43 +0000356 // Now initialize the output file.
357 auto OF = getOutputStream();
358 if (std::error_code EC = OF.getError()) {
Jonas Devlieghereef2e5c92018-04-18 15:26:51 +0000359 WithColor::error() << EC.message() << '\n';
Andrea Di Biagio6b07e2f2018-03-08 16:08:43 +0000360 return 1;
361 }
362
Matt Davis1969d262018-11-07 19:20:04 +0000363 unsigned AssemblerDialect = CRG.getAssemblerDialect();
Andrea Di Biagio98308432018-04-24 16:19:08 +0000364 if (OutputAsmVariant >= 0)
365 AssemblerDialect = static_cast<unsigned>(OutputAsmVariant);
366 std::unique_ptr<MCInstPrinter> IP(TheTarget->createMCInstPrinter(
367 Triple(TripleName), AssemblerDialect, *MAI, *MCII, *MRI));
368 if (!IP) {
369 WithColor::error()
370 << "unable to create instruction printer for target triple '"
371 << TheTriple.normalize() << "' with assembly variant "
372 << AssemblerDialect << ".\n";
373 return 1;
374 }
375
Matt Davisc6216b02018-11-08 17:32:45 +0000376 std::unique_ptr<ToolOutputFile> TOF = std::move(*OF);
Andrea Di Biagio6b07e2f2018-03-08 16:08:43 +0000377
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000378 const MCSchedModel &SM = STI->getSchedModel();
379
380 unsigned Width = SM.IssueWidth;
381 if (DispatchWidth)
382 Width = DispatchWidth;
383
Andrea Di Biagio8a639412018-03-23 11:50:43 +0000384 // Create an instruction builder.
Andrea Di Biagio4ed822d2018-12-17 14:00:37 +0000385 mca::InstrBuilder IB(*STI, *MCII, *MRI, MCIA.get());
Andrea Di Biagio8a639412018-03-23 11:50:43 +0000386
Matt Davis73b3f8b2018-07-06 18:03:14 +0000387 // Create a context to control ownership of the pipeline hardware.
388 mca::Context MCA(*MRI, *STI);
389
390 mca::PipelineOptions PO(Width, RegisterFileSize, LoadQueueSize,
391 StoreQueueSize, AssumeNoAlias);
392
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000393 // Number each region in the sequence.
394 unsigned RegionIdx = 0;
Andrea Di Biagio390074b2018-10-26 10:48:04 +0000395
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000396 for (const std::unique_ptr<mca::CodeRegion> &Region : Regions) {
397 // Skip empty code regions.
398 if (Region->empty())
399 continue;
Andrea Di Biagiofafdf4a2018-03-26 13:44:54 +0000400
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000401 // Don't print the header of this region if it is the default region, and
402 // it doesn't have an end location.
403 if (Region->startLoc().isValid() || Region->endLoc().isValid()) {
404 TOF->os() << "\n[" << RegionIdx++ << "] Code Region";
405 StringRef Desc = Region->getDescription();
406 if (!Desc.empty())
407 TOF->os() << " - " << Desc;
408 TOF->os() << "\n\n";
Andrea Di Biagiofafdf4a2018-03-26 13:44:54 +0000409 }
410
Andrea Di Biagioee5a5142018-10-29 13:29:22 +0000411 // Lower the MCInst sequence into an mca::Instruction sequence.
Andrea Di Biagio390074b2018-10-26 10:48:04 +0000412 ArrayRef<MCInst> Insts = Region->getInstructions();
Andrea Di Biagioee5a5142018-10-29 13:29:22 +0000413 std::vector<std::unique_ptr<mca::Instruction>> LoweredSequence;
414 for (const MCInst &MCI : Insts) {
Matt Davisc6216b02018-11-08 17:32:45 +0000415 Expected<std::unique_ptr<mca::Instruction>> Inst =
Matt Davisec248eb2018-10-31 17:47:25 +0000416 IB.createInstruction(MCI);
Andrea Di Biagioee5a5142018-10-29 13:29:22 +0000417 if (!Inst) {
Matt Davisec248eb2018-10-31 17:47:25 +0000418 if (auto NewE = handleErrors(
419 Inst.takeError(),
420 [&IP, &STI](const mca::InstructionError<MCInst> &IE) {
421 std::string InstructionStr;
422 raw_string_ostream SS(InstructionStr);
423 WithColor::error() << IE.Message << '\n';
424 IP->printInst(&IE.Inst, SS, "", *STI);
425 SS.flush();
426 WithColor::note() << "instruction: " << InstructionStr
427 << '\n';
428 })) {
Andrea Di Biagioee5a5142018-10-29 13:29:22 +0000429 // Default case.
430 WithColor::error() << toString(std::move(NewE));
431 }
432 return 1;
433 }
434
435 LoweredSequence.emplace_back(std::move(Inst.get()));
436 }
437
Matt Davisec248eb2018-10-31 17:47:25 +0000438 mca::SourceMgr S(LoweredSequence, PrintInstructionTables ? 1 : Iterations);
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000439
440 if (PrintInstructionTables) {
Matt Davis37ac9392018-07-14 23:52:50 +0000441 // Create a pipeline, stages, and a printer.
Matt Davis09aba6b2018-11-08 18:08:43 +0000442 auto P = llvm::make_unique<mca::Pipeline>();
443 P->appendStage(llvm::make_unique<mca::EntryStage>(S));
444 P->appendStage(llvm::make_unique<mca::InstructionTables>(SM));
Matt Davis37ac9392018-07-14 23:52:50 +0000445 mca::PipelinePrinter Printer(*P);
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000446
Matt Davis37ac9392018-07-14 23:52:50 +0000447 // Create the views for this pipeline, execute, and emit a report.
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000448 if (PrintInstructionInfoView) {
Matt Davis09aba6b2018-11-08 18:08:43 +0000449 Printer.addView(llvm::make_unique<mca::InstructionInfoView>(
450 *STI, *MCII, Insts, *IP));
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000451 }
Matt Davis09aba6b2018-11-08 18:08:43 +0000452 Printer.addView(
453 llvm::make_unique<mca::ResourcePressureView>(*STI, *IP, Insts));
Andrea Di Biagio8f55d092018-10-24 10:56:47 +0000454
Andrea Di Biagioee5a5142018-10-29 13:29:22 +0000455 if (!runPipeline(*P))
Andrea Di Biagio8f55d092018-10-24 10:56:47 +0000456 return 1;
457
Matt Davis37ac9392018-07-14 23:52:50 +0000458 Printer.printReport(TOF->os());
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000459 continue;
460 }
461
Matt Davis73b3f8b2018-07-06 18:03:14 +0000462 // Create a basic pipeline simulating an out-of-order backend.
463 auto P = MCA.createDefaultPipeline(PO, IB, S);
Matt Davisd8c387b2018-06-25 16:53:00 +0000464 mca::PipelinePrinter Printer(*P);
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000465
Roman Lebedev6fe55f42018-06-15 14:01:43 +0000466 if (PrintSummaryView)
Matt Davis09aba6b2018-11-08 18:08:43 +0000467 Printer.addView(llvm::make_unique<mca::SummaryView>(SM, Insts, Width));
Roman Lebedev6fe55f42018-06-15 14:01:43 +0000468
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000469 if (PrintInstructionInfoView)
470 Printer.addView(
Matt Davis09aba6b2018-11-08 18:08:43 +0000471 llvm::make_unique<mca::InstructionInfoView>(*STI, *MCII, Insts, *IP));
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000472
Andrea Di Biagio955aba42018-04-10 14:55:14 +0000473 if (PrintDispatchStats)
Matt Davis09aba6b2018-11-08 18:08:43 +0000474 Printer.addView(llvm::make_unique<mca::DispatchStatistics>());
Andrea Di Biagio955aba42018-04-10 14:55:14 +0000475
Andrea Di Biagio900cf752018-04-11 12:12:53 +0000476 if (PrintSchedulerStats)
Matt Davis09aba6b2018-11-08 18:08:43 +0000477 Printer.addView(llvm::make_unique<mca::SchedulerStatistics>(*STI));
Andrea Di Biagio2d438c02018-04-11 11:37:46 +0000478
Andrea Di Biagio900cf752018-04-11 12:12:53 +0000479 if (PrintRetireStats)
Andrea Di Biagio848dcbd2018-11-23 12:12:57 +0000480 Printer.addView(llvm::make_unique<mca::RetireControlUnitStatistics>(SM));
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000481
482 if (PrintRegisterFileStats)
Matt Davis09aba6b2018-11-08 18:08:43 +0000483 Printer.addView(llvm::make_unique<mca::RegisterFileStatistics>(*STI));
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000484
485 if (PrintResourcePressureView)
Matt Davis09aba6b2018-11-08 18:08:43 +0000486 Printer.addView(
487 llvm::make_unique<mca::ResourcePressureView>(*STI, *IP, Insts));
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000488
489 if (PrintTimelineView) {
Andrea Di Biagio390074b2018-10-26 10:48:04 +0000490 unsigned TimelineIterations =
491 TimelineMaxIterations ? TimelineMaxIterations : 10;
Matt Davis09aba6b2018-11-08 18:08:43 +0000492 Printer.addView(llvm::make_unique<mca::TimelineView>(
Andrea Di Biagio390074b2018-10-26 10:48:04 +0000493 *STI, *IP, Insts, std::min(TimelineIterations, S.getNumIterations()),
494 TimelineMaxCycles));
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000495 }
496
Andrea Di Biagioee5a5142018-10-29 13:29:22 +0000497 if (!runPipeline(*P))
Andrea Di Biagio8f55d092018-10-24 10:56:47 +0000498 return 1;
499
Andrea Di Biagioaae4cd32018-04-09 16:39:52 +0000500 Printer.printReport(TOF->os());
Andrea Di Biagio8636bd72018-07-02 20:39:57 +0000501
502 // Clear the InstrBuilder internal state in preparation for another round.
503 IB.clear();
Andrea Di Biagio181ce9f2018-03-26 12:04:53 +0000504 }
505
Andrea Di Biagio6b07e2f2018-03-08 16:08:43 +0000506 TOF->keep();
Andrea Di Biagio29b29cc2018-03-08 13:05:02 +0000507 return 0;
508}