blob: 6e0744525ec07700f8a355fd80642cba04e19333 [file] [log] [blame]
Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
2* Copyright (c) 2017, The Linux Foundation. All rights reserved.
3*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
13* * Neither the name of The Linux Foundation nor the names of its
14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070041
42namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080043
44typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
45
Saurabh Shah66c941b2016-07-06 17:34:05 -070046/*
47 * Drm Atomic Operation Codes
48 */
49enum struct DRMOps {
50 /*
51 * Op: Sets plane source crop
52 * Arg: uint32_t - Plane ID
53 * DRMRect - Source Rectangle
54 */
55 PLANE_SET_SRC_RECT,
56 /*
57 * Op: Sets plane destination rect
58 * Arg: uint32_t - Plane ID
59 * DRMRect - Dst Rectangle
60 */
61 PLANE_SET_DST_RECT,
62 /*
63 * Op: Sets plane zorder
64 * Arg: uint32_t - Plane ID
65 * uint32_t - zorder
66 */
67 PLANE_SET_ZORDER,
68 /*
69 * Op: Sets plane rotation flags
70 * Arg: uint32_t - Plane ID
71 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
72 */
73 PLANE_SET_ROTATION,
74 /*
75 * Op: Sets plane alpha
76 * Arg: uint32_t - Plane ID
77 * uint32_t - alpha value
78 */
79 PLANE_SET_ALPHA,
80 /*
81 * Op: Sets the blend type
82 * Arg: uint32_t - Plane ID
83 * uint32_t - blend type (see DRMBlendType)
84 */
85 PLANE_SET_BLEND_TYPE,
86 /*
87 * Op: Sets horizontal decimation
88 * Arg: uint32_t - Plane ID
89 * uint32_t - decimation factor
90 */
91 PLANE_SET_H_DECIMATION,
92 /*
93 * Op: Sets vertical decimation
94 * Arg: uint32_t - Plane ID
95 * uint32_t - decimation factor
96 */
97 PLANE_SET_V_DECIMATION,
98 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -080099 * Op: Sets source config flags
100 * Arg: uint32_t - Plane ID
101 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
102 */
103 PLANE_SET_SRC_CONFIG,
104 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700105 * Op: Sets frame buffer ID for plane. Set together with CRTC.
106 * Arg: uint32_t - Plane ID
107 * uint32_t - Framebuffer ID
108 */
109 PLANE_SET_FB_ID,
110 /*
111 * Op: Sets the crtc for this plane. Set together with FB_ID.
112 * Arg: uint32_t - Plane ID
113 * uint32_t - CRTC ID
114 */
115 PLANE_SET_CRTC,
116 /*
117 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
118 * Arg: uint32_t - Plane ID
119 * uint32_t - Input fence
120 */
121 PLANE_SET_INPUT_FENCE,
122 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800123 * Op: Sets scaler config on this plane.
124 * Arg: uint32_t - Plane ID
125 * uint64_t - Address of the scaler config object (version based)
126 */
127 PLANE_SET_SCALER_CONFIG,
128 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800129 * Op: Sets plane rotation destination rect
130 * Arg: uint32_t - Plane ID
131 * DRMRect - rotator dst Rectangle
132 */
133 PLANE_SET_ROTATION_DST_RECT,
134 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700135 * Op: Sets FB Secure mode for this plane.
136 * Arg: uint32_t - Plane ID
137 * uint32_t - Value of the FB Secure mode.
138 */
139 PLANE_SET_FB_SECURE_MODE,
140 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700141 * Op: Activate or deactivate a CRTC
142 * Arg: uint32_t - CRTC ID
143 * uint32_t - 1 to enable, 0 to disable
144 */
145 CRTC_SET_ACTIVE,
146 /*
147 * Op: Sets display mode
148 * Arg: uint32_t - CRTC ID
149 * drmModeModeInfo* - Pointer to display mode
150 */
151 CRTC_SET_MODE,
152 /*
153 * Op: Sets an offset indicating when a release fence should be signalled.
154 * Arg: uint32_t - offset
155 * 0: non-speculative, default
156 * 1: speculative
157 */
158 CRTC_SET_OUTPUT_FENCE_OFFSET,
159 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800160 * Op: Sets overall SDE core clock
161 * Arg: uint32_t - CRTC ID
162 * uint32_t - core_clk
163 */
164 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700165 /*
166 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800167 * Arg: uint32_t - CRTC ID
168 * uint32_t - core_ab
169 */
170 CRTC_SET_CORE_AB,
171 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700172 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800173 * Arg: uint32_t - CRTC ID
174 * uint32_t - core_ib
175 */
176 CRTC_SET_CORE_IB,
177 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700178 * Op: Sets LLCC Bus average bandwidth
179 * Arg: uint32_t - CRTC ID
180 * uint32_t - llcc_ab
181 */
182 CRTC_SET_LLCC_AB,
183 /*
184 * Op: Sets LLCC Bus instantaneous bandwidth
185 * Arg: uint32_t - CRTC ID
186 * uint32_t - llcc_ib
187 */
188 CRTC_SET_LLCC_IB,
189 /*
190 * Op: Sets DRAM bus average bandwidth
191 * Arg: uint32_t - CRTC ID
192 * uint32_t - dram_ab
193 */
194 CRTC_SET_DRAM_AB,
195 /*
196 * Op: Sets DRAM bus instantaneous bandwidth
197 * Arg: uint32_t - CRTC ID
198 * uint32_t - dram_ib
199 */
200 CRTC_SET_DRAM_IB,
201 /*
202 * Op: Sets rotator clock for inline rotation
203 * Arg: uint32_t - CRTC ID
204 * uint32_t - rot_clk
205 */
206 CRTC_SET_ROT_CLK, /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700207 * Op: Returns release fence for this frame. Should be called after Commit() on
208 * DRMAtomicReqInterface.
209 * Arg: uint32_t - CRTC ID
210 * int * - Pointer to an integer that will hold the returned fence
211 */
212 CRTC_GET_RELEASE_FENCE,
213 /*
Ping Li281f48d2017-01-16 12:45:40 -0800214 * Op: Sets PP feature
215 * Arg: uint32_t - CRTC ID
216 * DRMPPFeatureInfo * - PP feature data pointer
217 */
218 CRTC_SET_POST_PROC,
219 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800220 * Op: Sets CRTC ROIs.
221 * Arg: uint32_t - CRTC ID
222 * uint32_t - number of ROIs
223 * DRMRect * - Array of CRTC ROIs
224 */
225 CRTC_SET_ROI,
226 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700227 * Op: Sets Security level for CRTC.
228 * Arg: uint32_t - CRTC ID
229 * uint32_t - Security level
230 */
231 CRTC_SET_SECURITY_LEVEL,
232 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700233 * Op: sets solid fill stages
234 * Arg: uint32_t - CRTC ID
235 * Vector of DRMSolidfillStage
236 */
237 CRTC_SET_SOLIDFILL_STAGES,
238 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700239 * Op: Returns retire fence for this commit. Should be called after Commit() on
240 * DRMAtomicReqInterface.
241 * Arg: uint32_t - Connector ID
242 * int * - Pointer to an integer that will hold the returned fence
243 */
244 CONNECTOR_GET_RETIRE_FENCE,
245 /*
246 * Op: Sets writeback connector destination rect
247 * Arg: uint32_t - Connector ID
248 * DRMRect - Dst Rectangle
249 */
250 CONNECTOR_SET_OUTPUT_RECT,
251 /*
252 * Op: Sets frame buffer ID for writeback connector.
253 * Arg: uint32_t - Connector ID
254 * uint32_t - Framebuffer ID
255 */
256 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700257 /*
258 * Op: Sets power mode for connector.
259 * Arg: uint32_t - Connector ID
260 * uint32_t - Power Mode
261 */
262 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800263 /*
264 * Op: Sets panel ROIs.
265 * Arg: uint32_t - Connector ID
266 * uint32_t - number of ROIs
267 * DRMRect * - Array of Connector ROIs
268 */
269 CONNECTOR_SET_ROI,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700270};
271
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700272enum struct DRMRotation {
273 FLIP_H = 0x1,
274 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700275 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700276 ROT_90 = 0x4,
277};
278
Sushil Chauhan3396e202017-04-14 18:34:22 -0700279enum struct DRMPowerMode {
280 ON,
281 DOZE,
282 DOZE_SUSPEND,
283 OFF,
284};
285
Saurabh Shah66c941b2016-07-06 17:34:05 -0700286enum struct DRMBlendType {
287 UNDEFINED = 0,
288 OPAQUE = 1,
289 PREMULTIPLIED = 2,
290 COVERAGE = 3,
291};
292
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800293enum struct DRMSrcConfig {
294 DEINTERLACE = 0,
295};
296
Saurabh Shah66c941b2016-07-06 17:34:05 -0700297/* Display type to identify a suitable connector */
298enum struct DRMDisplayType {
299 PERIPHERAL,
300 TV,
301 VIRTUAL,
302};
303
304struct DRMRect {
305 uint32_t left; // Left-most pixel coordinate.
306 uint32_t top; // Top-most pixel coordinate.
307 uint32_t right; // Right-most pixel coordinate.
308 uint32_t bottom; // Bottom-most pixel coordinate.
309};
310
311//------------------------------------------------------------------------
312// DRM Info Query Types
313//------------------------------------------------------------------------
314
315enum struct QSEEDVersion {
316 V1,
317 V2,
318 V3,
319};
320
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700321enum struct SmartDMARevision {
322 V1,
323 V2,
324};
325
Saurabh Shah66c941b2016-07-06 17:34:05 -0700326/* Per CRTC Resource Info*/
327struct DRMCrtcInfo {
328 bool has_src_split;
329 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700330 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700331 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700332 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800333 float ib_fudge_factor;
334 float clk_fudge_factor;
335 uint32_t dest_scale_prefill_lines;
336 uint32_t undersized_prefill_lines;
337 uint32_t macrotile_prefill_lines;
338 uint32_t nv12_prefill_lines;
339 uint32_t linear_prefill_lines;
340 uint32_t downscale_prefill_lines;
341 uint32_t extra_prefill_lines;
342 uint32_t amortized_threshold;
343 uint64_t max_bandwidth_low;
344 uint64_t max_bandwidth_high;
345 uint32_t max_sde_clk;
346 CompRatioMap comp_ratio_rt_map;
347 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700348 uint32_t hw_version;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700349};
350
351enum struct DRMPlaneType {
352 // Has CSC and scaling capability
353 VIG = 0,
354 // Has scaling capability but no CSC
355 RGB,
356 // No scaling support
357 DMA,
358 // Supports a small dimension and doesn't use a CRTC stage
359 CURSOR,
360 MAX,
361};
362
363struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700364 DRMPlaneType type;
365 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700366 // FourCC format enum and modifier
367 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
368 uint32_t max_linewidth;
369 uint32_t max_upscale;
370 uint32_t max_downscale;
371 uint32_t max_horizontal_deci;
372 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800373 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800374 uint32_t cache_size; // cache size in bytes for inline rotation support.
Saurabh Shah66c941b2016-07-06 17:34:05 -0700375};
376
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700377// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
378typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700379
380enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700381 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700382 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700383 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700384 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700385 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700386 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700387 DUAL_LM_MERGE_DSC,
388 DUAL_LM_DSCMERGE,
389 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700390};
391
392enum struct DRMPanelMode {
393 VIDEO,
394 COMMAND,
395};
396
397/* Per Connector Info*/
398struct DRMConnectorInfo {
399 uint32_t mmWidth;
400 uint32_t mmHeight;
401 uint32_t type;
402 uint32_t num_modes;
403 drmModeModeInfo *modes;
404 DRMTopology topology;
405 std::string panel_name;
406 DRMPanelMode panel_mode;
407 bool is_primary;
408 // Valid only if DRMPanelMode is VIDEO
409 bool dynamic_fps;
410 // FourCC format enum and modifier
411 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
412 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
413 uint32_t max_linewidth;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800414 // Valid only if mode is command
415 int num_roi;
416 int xstart;
417 int ystart;
418 int walign;
419 int halign;
420 int wmin;
421 int hmin;
422 bool roi_merge;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700423 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700424 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700425 uint32_t transfer_time_us;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700426};
427
428/* Identifier token for a display */
429struct DRMDisplayToken {
430 uint32_t conn_id;
431 uint32_t crtc_id;
432};
433
Ping Li281f48d2017-01-16 12:45:40 -0800434enum DRMPPFeatureID {
435 kFeaturePcc,
436 kFeatureIgc,
437 kFeaturePgc,
438 kFeatureMixerGc,
439 kFeaturePaV2,
440 kFeatureDither,
441 kFeatureGamut,
442 kFeaturePADither,
443 kPPFeaturesMax,
444};
445
446enum DRMPPPropType {
447 kPropEnum,
448 kPropRange,
449 kPropBlob,
450 kPropTypeMax,
451};
452
453struct DRMPPFeatureInfo {
454 DRMPPFeatureID id;
455 DRMPPPropType type;
456 uint32_t version;
457 uint32_t payload_size;
458 void *payload;
459};
460
Saurabh Shah0ffee302016-11-22 10:42:11 -0800461struct DRMScalerLUTInfo {
462 uint32_t dir_lut_size = 0;
463 uint32_t cir_lut_size = 0;
464 uint32_t sep_lut_size = 0;
465 uint64_t dir_lut = 0;
466 uint64_t cir_lut = 0;
467 uint64_t sep_lut = 0;
468};
469
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700470enum struct DRMSecureMode {
471 NON_SECURE,
472 SECURE,
473 NON_SECURE_DIR_TRANSLATION,
474 SECURE_DIR_TRANSLATION,
475};
476
477enum struct DRMSecurityLevel {
478 SECURE_NON_SECURE,
479 SECURE_ONLY,
480};
481
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700482struct DRMSolidfillStage {
483 DRMRect bounding_rect {};
484 bool is_exclusion_rect = false;
485 uint32_t color = 0xff000000; // in 8bit argb
486 uint32_t z_order = 0;
487 uint32_t plane_alpha = 0xff;
488};
489
Saurabh Shah66c941b2016-07-06 17:34:05 -0700490/* DRM Atomic Request Property Set.
491 *
492 * Helper class to create and populate atomic properties of DRM components
493 * when rendered in DRM atomic mode */
494class DRMAtomicReqInterface {
495 public:
496 virtual ~DRMAtomicReqInterface() {}
497 /* Perform request operation.
498 *
499 * [input]: opcode: operation code from DRMOps list.
500 * var_arg: arguments for DRMOps's can differ in number and
501 * data type. Refer above DRMOps to details.
502 * [return]: Error code if the API fails, 0 on success.
503 */
504 virtual int Perform(DRMOps opcode, ...) = 0;
505
506 /*
507 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
508 * called every frame.
509 * [input]: synchronous: Determines if the call should block until a h/w flip
510 * [return]: Error code if the API fails, 0 on success.
511 */
512 virtual int Commit(bool synchronous) = 0;
513 /*
514 * Validate the params set via Perform().
515 * [return]: Error code if the API fails, 0 on success.
516 */
517 virtual int Validate() = 0;
518};
519
520class DRMManagerInterface;
521
522/* Populates a singleton instance of DRMManager */
523typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
524
525/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800526typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700527
528/*
529 * DRM Manager Interface - Any class which plans to implement helper function for vendor
530 * specific DRM driver implementation must implement the below interface routines to work
531 * with SDM.
532 */
533
534class DRMManagerInterface {
535 public:
536 virtual ~DRMManagerInterface() {}
537
538 /*
539 * Since SDM completely manages the planes. GetPlanesInfo will provide all
540 * the plane information.
541 * [output]: DRMPlanesInfo: Resource Info for planes.
542 */
543 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
544
545 /*
546 * Will provide all the information of a selected crtc.
547 * [input]: Use crtc id 0 to obtain system wide info
548 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
549 */
550 virtual void GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
551
552 /*
553 * Will provide all the information of a selected connector.
554 * [output]: DRMConnectorInfo: Resource Info for the given connector id
555 */
556 virtual void GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
557
558 /*
Ping Li281f48d2017-01-16 12:45:40 -0800559 * Will query post propcessing feature info of a CRTC.
560 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
561 */
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800562 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo &info) = 0;
Ping Li281f48d2017-01-16 12:45:40 -0800563 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700564 * Register a logical display to receive a token.
565 * Each display pipeline in DRM is identified by its CRTC and Connector(s).
566 * On display connect(bootup or hotplug), clients should invoke this interface to
567 * establish the pipeline for the display and should get a DisplayToken
568 * populated with crtc and connnector(s) id's. Here onwards, Client should
569 * use this token to represent the display for any Perform operations if
570 * needed.
571 *
572 * [input]: disp_type - Peripheral / TV / Virtual
573 * [output]: DRMDisplayToken - CRTC and Connector id's for the display
574 * [return]: 0 on success, a negative error value otherwise
575 */
576 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
577
578 /* Client should invoke this interface on display disconnect.
579 * [input]: DRMDisplayToken - identifier for the display.
580 */
581 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
582
583 /*
584 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
585 * returned as part of RegisterDisplay API. Needs to be called per display.
586 * [input]: DRMDisplayToken that identifies a display pipeline
587 * [output]: Pointer to an instance of DRMAtomicReqInterface.
588 * [return]: Error code if the API fails, 0 on success.
589 */
590 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
591
592 /*
593 * Destroys the instance of DRMAtomicReqInterface
594 * [input]: Pointer to a DRMAtomicReqInterface
595 * [return]: Error code if the API fails, 0 on success.
596 */
597 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Saurabh Shah0ffee302016-11-22 10:42:11 -0800598 /*
599 * Sets the global scaler LUT
600 * [input]: LUT Info
601 * [return]: Error code if the API fails, 0 on success.
602 */
603 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700604};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800605
Saurabh Shah66c941b2016-07-06 17:34:05 -0700606} // namespace sde_drm
607#endif // __DRM_INTERFACE_H__