blob: fe86018cd34a1f84e503a801b50be91fead40b47 [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Arun Kumar K.R6c85f052014-01-21 21:47:41 -08002 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070040
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080041#ifdef VENUS_COLOR_FORMAT
42#include <media/msm_media_info.h>
43#else
44#define VENUS_Y_STRIDE(args...) 0
45#define VENUS_Y_SCANLINES(args...) 0
46#define VENUS_BUFFER_SIZE(args...) 0
47#endif
48
Naseer Ahmed63326f42013-12-18 02:45:48 -050049#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050050
Iliyan Malchev202a77d2012-06-11 14:41:12 -070051using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070052using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070053
Naomi Luisa44100c2013-02-08 12:42:03 -080054ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
55
Sushil Chauhan65e26302015-01-14 10:48:57 -080056static void getUBwcWidthAndHeight(int, int, int, int&, int&);
57static unsigned int getUBwcSize(int, int, int, const int, const int);
58
Iliyan Malchev202a77d2012-06-11 14:41:12 -070059//Common functions
Naseer Ahmed29a26812012-06-14 00:56:20 -070060static bool canFallback(int usage, bool triedSystem)
Iliyan Malchev202a77d2012-06-11 14:41:12 -070061{
62 // Fallback to system heap when alloc fails unless
63 // 1. Composition type is MDP
64 // 2. Alloc from system heap was already tried
65 // 3. The heap type is requsted explicitly
66 // 4. The heap type is protected
67 // 5. The buffer is meant for external display only
68
Naseer Ahmeda87da602012-07-01 23:54:19 -070069 if(QCCompositionType::getInstance().getCompositionType() &
70 COMPOSITION_TYPE_MDP)
Iliyan Malchev202a77d2012-06-11 14:41:12 -070071 return false;
72 if(triedSystem)
73 return false;
Sushil Chauhan7651a802013-01-08 16:08:09 -080074 if(usage & (GRALLOC_HEAP_MASK | GRALLOC_USAGE_PROTECTED))
Iliyan Malchev202a77d2012-06-11 14:41:12 -070075 return false;
Naseer Ahmed4c588a22012-07-31 19:12:17 -070076 if(usage & (GRALLOC_HEAP_MASK | GRALLOC_USAGE_PRIVATE_EXTERNAL_ONLY))
Iliyan Malchev202a77d2012-06-11 14:41:12 -070077 return false;
78 //Return true by default
79 return true;
80}
81
Saurabh Shah1adcafe2014-12-19 10:05:41 -080082/* The default policy is to return cached buffers unless the client explicity
83 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
84 * read or written in software. Any combination with a _RARELY_ flag will be
85 * treated as uncached. */
86static bool useUncached(const int& usage) {
87 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
88 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
89 GRALLOC_USAGE_SW_WRITE_RARELY) or
90 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
91 GRALLOC_USAGE_SW_READ_RARELY))
92 return true;
93
94 return false;
95}
96
Naomi Luisa44100c2013-02-08 12:42:03 -080097//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080098AdrenoMemInfo::AdrenoMemInfo()
99{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800100 LINK_adreno_compute_aligned_width_and_height = NULL;
101 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700102 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800103 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800104
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800105 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
106 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800107 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700108 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
109 *(void **)&LINK_adreno_compute_padding =
110 ::dlsym(libadreno_utils, "compute_surface_padding");
111 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
112 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800113 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
114 ::dlsym(libadreno_utils,
115 "compute_compressedfmt_aligned_width_and_height");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800116 }
117}
118
119AdrenoMemInfo::~AdrenoMemInfo()
120{
121 if (libadreno_utils) {
122 ::dlclose(libadreno_utils);
123 }
124}
125
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700126int AdrenoMemInfo::isMacroTilingSupportedByGPU()
127{
128 if ((libadreno_utils)) {
129 if(LINK_adreno_isMacroTilingSupportedByGpu) {
130 return LINK_adreno_isMacroTilingSupportedByGpu();
131 }
132 }
133 return 0;
134}
135
136
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800137void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800138 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800139{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800140
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800141 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700142 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800143 int tileEnabled = isMacroTileEnabled(format, usage);
144 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
145 height, format, tileEnabled, aligned_w, aligned_h);
146 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800147 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800148
149 if (isUBwcEnabled(format, usage)) {
150 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
151 return;
152 }
153
154 aligned_w = width;
155 aligned_h = height;
156 switch (format)
157 {
158 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
159 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
160 case HAL_PIXEL_FORMAT_RAW_SENSOR:
161 aligned_w = ALIGN(width, 32);
162 break;
163 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
164 aligned_w = ALIGN(width, 128);
165 break;
166 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
167 case HAL_PIXEL_FORMAT_YV12:
168 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
169 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
170 case HAL_PIXEL_FORMAT_YCbCr_422_I:
171 case HAL_PIXEL_FORMAT_YCrCb_422_I:
172 aligned_w = ALIGN(width, 16);
173 break;
174 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
175 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
176 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
177 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
178 break;
179 case HAL_PIXEL_FORMAT_BLOB:
180 break;
181 case HAL_PIXEL_FORMAT_NV21_ZSL:
182 aligned_w = ALIGN(width, 64);
183 aligned_h = ALIGN(height, 64);
184 break;
185 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
186 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
187 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
188 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
189 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
190 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
191 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
192 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
196 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
197 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
198 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
199 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
200 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
201 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
202 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
203 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
204 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
205 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
206 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
207 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
208 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
209 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
210 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
211 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
212 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
213 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
214 int bytesPerPixel = 0;
215 int raster_mode = 0; //Adreno unknown raster mode.
216 int padding_threshold = 512; //Threshold for padding
217 //surfaces.
218
219 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
220 width, height, format, 0,raster_mode, padding_threshold,
221 &aligned_w, &aligned_h, &bytesPerPixel);
222 } else {
223 ALOGW("%s: Warning!! Symbols" \
224 " compute_compressedfmt_aligned_width_and_height" \
225 " not found", __FUNCTION__);
226 }
227 break;
228 default: break;
229 }
230}
231
232void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
233 int tile_enabled, int& aligned_w, int& aligned_h)
234{
235 aligned_w = ALIGN(width, 32);
236 aligned_h = ALIGN(height, 32);
237
238 // Don't add any additional padding if debug.gralloc.map_fb_memory
239 // is enabled
240 char property[PROPERTY_VALUE_MAX];
241 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
242 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
243 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
244 return;
245 }
246
247 int bpp = 4;
248 switch(format)
249 {
250 case HAL_PIXEL_FORMAT_RGB_888:
251 bpp = 3;
252 break;
253 case HAL_PIXEL_FORMAT_RGB_565:
254 case HAL_PIXEL_FORMAT_RGBA_5551:
255 case HAL_PIXEL_FORMAT_RGBA_4444:
256 bpp = 2;
257 break;
258 default: break;
259 }
260
261 if (libadreno_utils) {
262 int raster_mode = 0; // Adreno unknown raster mode.
263 int padding_threshold = 512; // Threshold for padding surfaces.
264 // the function below computes aligned width and aligned height
265 // based on linear or macro tile mode selected.
266 if(LINK_adreno_compute_aligned_width_and_height) {
267 LINK_adreno_compute_aligned_width_and_height(width,
268 height, bpp, tile_enabled,
269 raster_mode, padding_threshold,
270 &aligned_w, &aligned_h);
271
272 } else if(LINK_adreno_compute_padding) {
273 int surface_tile_height = 1; // Linear surface
274 aligned_w = LINK_adreno_compute_padding(width, bpp,
275 surface_tile_height, raster_mode,
276 padding_threshold);
277 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
278 __FUNCTION__);
279 } else {
280 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
281 "compute_aligned_width_and_height not found", __FUNCTION__);
282 }
283 }
284}
285
286int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
287{
288 // TODO: Convert HAL pixel format to corresponding Adreno format,
289 // then query GPU with Adreno format.
290 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800291}
292
293//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700294IAllocController* IAllocController::sController = NULL;
295IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700296{
297 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700298 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700299 }
300 return sController;
301}
302
303
304//-------------- IonController-----------------------//
305IonController::IonController()
306{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530307 allocateIonMem();
308}
309
310void IonController::allocateIonMem()
311{
312 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700313}
314
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700315int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700316{
317 int ionFlags = 0;
318 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700319
320 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700321 data.allocType = 0;
322
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500323 if(usage & GRALLOC_USAGE_PRIVATE_SYSTEM_HEAP)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700324 ionFlags |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700325
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500326 if(usage & GRALLOC_USAGE_PRIVATE_IOMMU_HEAP)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700327 ionFlags |= ION_HEAP(ION_IOMMU_HEAP_ID);
328
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530329 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530330 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500331 ionFlags |= ION_HEAP(ION_CP_MM_HEAP_ID);
332 ionFlags |= ION_SECURE;
Shalaj Jain13cdf812014-12-02 16:20:54 -0800333#ifdef ION_FLAG_ALLOW_NON_CONTIG
334 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
335 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
336 }
337#endif
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530338 } else {
339 // for targets/OEMs which do not need HW level protection
340 // do not set ion secure flag & MM heap. Fallback to IOMMU heap.
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500341 ionFlags |= ION_HEAP(ION_IOMMU_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530342 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500343 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530344 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
345 //MM Heap is exclusively a secure heap.
346 //If it is used for non secure cases, fallback to IOMMU heap
347 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
348 cannot be used as an insecure heap!\
349 trying to use IOMMU instead !!");
350 ionFlags |= ION_HEAP(ION_IOMMU_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500351 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700352
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700353 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
354 ionFlags |= ION_HEAP(ION_CAMERA_HEAP_ID);
355
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700356 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
357 ionFlags |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700358
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530359 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500360 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700361
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700362 // if no flags are set, default to
363 // SF + IOMMU heaps, so that bypass can work
364 // we can fall back to system heap if
365 // we run out.
366 if(!ionFlags)
367 ionFlags = ION_HEAP(ION_SF_HEAP_ID) | ION_HEAP(ION_IOMMU_HEAP_ID);
368
369 data.flags = ionFlags;
370 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700371
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700372 // Fallback
Naseer Ahmed29a26812012-06-14 00:56:20 -0700373 if(ret < 0 && canFallback(usage,
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700374 (ionFlags & ION_SYSTEM_HEAP_ID)))
375 {
376 ALOGW("Falling back to system heap");
377 data.flags = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700378 ret = mIonAlloc->alloc_buffer(data);
379 }
380
381 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700382 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700383 }
384
385 return ret;
386}
387
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700388IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700389{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700390 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700391 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
392 memalloc = mIonAlloc;
393 } else {
394 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
395 }
396
397 return memalloc;
398}
399
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700400bool isMacroTileEnabled(int format, int usage)
401{
402 bool tileEnabled = false;
403
404 // Check whether GPU & MDSS supports MacroTiling feature
405 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
406 qdutils::MDPVersion::getInstance().supportsMacroTile())
407 {
408 // check the format
409 switch(format)
410 {
411 case HAL_PIXEL_FORMAT_RGBA_8888:
412 case HAL_PIXEL_FORMAT_RGBX_8888:
413 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800414 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700415 {
416 tileEnabled = true;
417 // check the usage flags
418 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
419 GRALLOC_USAGE_SW_WRITE_MASK)) {
420 // Application intends to use CPU for rendering
421 tileEnabled = false;
422 }
423 break;
424 }
425 default:
426 break;
427 }
428 }
429 return tileEnabled;
430}
431
432// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800433unsigned int getSize(int format, int width, int height, int usage,
434 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700435
Sushil Chauhan65e26302015-01-14 10:48:57 -0800436 if (isUBwcEnabled(format, usage)) {
437 return getUBwcSize(width, height, format, alignedw, alignedh);
438 }
439
440 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700441 switch (format) {
442 case HAL_PIXEL_FORMAT_RGBA_8888:
443 case HAL_PIXEL_FORMAT_RGBX_8888:
444 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700445 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700446 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700447 size = alignedw * alignedh * 4;
448 break;
449 case HAL_PIXEL_FORMAT_RGB_888:
450 size = alignedw * alignedh * 3;
451 break;
452 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700453 case HAL_PIXEL_FORMAT_RGBA_5551:
454 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400455 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700456 size = alignedw * alignedh * 2;
457 break;
458
459 // adreno formats
460 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
461 size = ALIGN(alignedw*alignedh, 4096);
462 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
463 break;
464 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
465 // The chroma plane is subsampled,
466 // but the pitch in bytes is unchanged
467 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700468 size = ALIGN( alignedw * alignedh, 8192);
469 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
470 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700471 case HAL_PIXEL_FORMAT_YV12:
472 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
473 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800474 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700475 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400476 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700477 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700478 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700479 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800480 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
481 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400482 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800483 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700484 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
485 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700486 case HAL_PIXEL_FORMAT_YCbCr_422_I:
487 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700488 if(width & 1) {
489 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800490 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700491 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700492 size = ALIGN(alignedw * alignedh * 2, 4096);
493 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700494 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400495 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700496 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700497 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400498 case HAL_PIXEL_FORMAT_BLOB:
499 if(height != 1) {
500 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
501 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800502 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400503 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400504 size = width;
505 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700506 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700507 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
508 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500509 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
510 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
511 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
512 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
513 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
514 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
515 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
516 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
517 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
518 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
519 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
520 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
521 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
522 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
523 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
524 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
525 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
526 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
527 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
528 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
529 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
530 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
531 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
532 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
533 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
534 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
535 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800536 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500537 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
538 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700539 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800540 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800541 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700542 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700543 return size;
544}
545
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700546unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700547 int& alignedw, int &alignedh)
548{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700549 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700550
551 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
552 height,
553 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800554 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700555 alignedw,
556 alignedh);
557
Sushil Chauhan65e26302015-01-14 10:48:57 -0800558 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700559
560 return size;
561}
562
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700563
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700564unsigned int getBufferSizeAndDimensions(int width, int height, int format,
565 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700566{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700567 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700568
569 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
570 height,
571 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800572 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700573 alignedw,
574 alignedh);
575
Sushil Chauhan65e26302015-01-14 10:48:57 -0800576 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700577
578 return size;
579}
580
581
582void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700583 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700584{
585 tileEnabled = isMacroTileEnabled(format, usage);
586
587 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
588 height,
589 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800590 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700591 alignedw,
592 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800593 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700594}
595
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400596int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
597{
598 int err = 0;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700599 unsigned int ystride, cstride;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400600 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
601
602 // Get the chroma offsets from the handle width/height. We take advantage
603 // of the fact the width _is_ the stride
604 switch (hnd->format) {
605 //Semiplanar
606 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
607 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
608 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
609 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Naseer Ahmeda28d31c2014-05-29 15:41:34 -0400610 ystride = cstride = hnd->width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400611 ycbcr->y = (void*)hnd->base;
612 ycbcr->cb = (void*)(hnd->base + ystride * hnd->height);
613 ycbcr->cr = (void*)(hnd->base + ystride * hnd->height + 1);
614 ycbcr->ystride = ystride;
615 ycbcr->cstride = cstride;
616 ycbcr->chroma_step = 2;
617 break;
618
619 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
620 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
621 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
622 case HAL_PIXEL_FORMAT_NV21_ZSL:
623 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Naseer Ahmeda28d31c2014-05-29 15:41:34 -0400624 ystride = cstride = hnd->width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400625 ycbcr->y = (void*)hnd->base;
626 ycbcr->cr = (void*)(hnd->base + ystride * hnd->height);
627 ycbcr->cb = (void*)(hnd->base + ystride * hnd->height + 1);
628 ycbcr->ystride = ystride;
629 ycbcr->cstride = cstride;
630 ycbcr->chroma_step = 2;
631 break;
632
633 //Planar
634 case HAL_PIXEL_FORMAT_YV12:
635 ystride = hnd->width;
Arun Kumar K.R6e332482014-08-21 10:57:37 -0700636 cstride = ALIGN(hnd->width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400637 ycbcr->y = (void*)hnd->base;
638 ycbcr->cr = (void*)(hnd->base + ystride * hnd->height);
639 ycbcr->cb = (void*)(hnd->base + ystride * hnd->height +
640 cstride * hnd->height/2);
641 ycbcr->ystride = ystride;
642 ycbcr->cstride = cstride;
643 ycbcr->chroma_step = 1;
644
645 break;
646 //Unsupported formats
647 case HAL_PIXEL_FORMAT_YCbCr_422_I:
648 case HAL_PIXEL_FORMAT_YCrCb_422_I:
649 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
650 default:
651 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
652 hnd->format);
653 err = -EINVAL;
654 }
655 return err;
656
657}
658
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700659
660
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700661// Allocate buffer from width, height and format into a
662// private_handle_t. It is the responsibility of the caller
663// to free the buffer using the free_buffer function
664int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
665{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700666 alloc_data data;
667 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700668 gralloc::IAllocController* sAlloc =
669 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700670 data.base = 0;
671 data.fd = -1;
672 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700673 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
674 alignedh);
675
Naseer Ahmed29a26812012-06-14 00:56:20 -0700676 data.align = getpagesize();
677 data.uncached = useUncached(usage);
678 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700679
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700680 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700681 if (0 != err) {
682 ALOGE("%s: allocate failed", __FUNCTION__);
683 return -ENOMEM;
684 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700685
Naseer Ahmed29a26812012-06-14 00:56:20 -0700686 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700687 data.allocType, 0, format,
688 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700689 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700690 hnd->offset = data.offset;
691 hnd->gpuaddr = 0;
692 *pHnd = hnd;
693 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700694}
695
696void free_buffer(private_handle_t *hnd)
697{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700698 gralloc::IAllocController* sAlloc =
699 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700700 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700701 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700702 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
703 }
704 if(hnd)
705 delete hnd;
706
707}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800708
709// UBWC helper functions
710static bool isUBwcFormat(int format)
711{
712 // Explicitly defined UBWC formats
713 switch(format)
714 {
715 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
716 return true;
717 default:
718 return false;
719 }
720}
721
722static bool isUBwcSupported(int format)
723{
724 // Existing HAL formats with UBWC support
725 switch(format)
726 {
727 case HAL_PIXEL_FORMAT_RGB_565:
728 case HAL_PIXEL_FORMAT_RGBA_8888:
729 case HAL_PIXEL_FORMAT_sRGB_A_8888:
730 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
731 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
732 return true;
733 default:
734 return false;
735 }
736}
737
738bool isUBwcEnabled(int format, int usage)
739{
740 if (isUBwcFormat(format) ||
741 ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format)))
742 {
743 // Allow UBWC, only if GPU supports it and CPU usage flags are not set
744 if (AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format) &&
745 !(usage & (GRALLOC_USAGE_SW_READ_MASK |
746 GRALLOC_USAGE_SW_WRITE_MASK))) {
747 return true;
748 }
749 }
750 return false;
751}
752
753static void getUBwcWidthAndHeight(int width, int height, int format,
754 int& aligned_w, int& aligned_h)
755{
756 switch (format)
757 {
758 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
759 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
760 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
761 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
762 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
763 break;
764 default:
765 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
766 aligned_w = 0;
767 aligned_h = 0;
768 break;
769 }
770}
771
772static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
773{
774 block_width = 0;
775 block_height = 0;
776
777 switch(bpp)
778 {
779 case 2:
780 case 4:
781 block_width = 16;
782 block_height = 4;
783 break;
784 case 8:
785 block_width = 8;
786 block_height = 4;
787 break;
788 case 16:
789 block_width = 4;
790 block_height = 4;
791 break;
792 default:
793 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
794 break;
795 }
796}
797
798static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
799{
800 unsigned int size = 0;
801 int meta_width, meta_height;
802 int block_width, block_height;
803
804 getUBwcBlockSize(bpp, block_width, block_height);
805
806 if (!block_width || !block_height) {
807 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
808 return size;
809 }
810
811 // Align meta buffer height to 16 blocks
812 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
813
814 // Align meta buffer width to 64 blocks
815 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
816
817 // Align meta buffer size to 4K
818 size = ((meta_width * meta_height), 4096);
819 return size;
820}
821
822static unsigned int getUBwcSize(int width, int height, int format,
823 const int alignedw, const int alignedh) {
824
825 unsigned int size = 0;
826 switch (format) {
827 case HAL_PIXEL_FORMAT_RGB_565:
828 size = alignedw * alignedh * 2;
829 size += getUBwcMetaBufferSize(width, height, 2);
830 break;
831 case HAL_PIXEL_FORMAT_RGBA_8888:
832 case HAL_PIXEL_FORMAT_sRGB_A_8888:
833 size = alignedw * alignedh * 4;
834 size += getUBwcMetaBufferSize(width, height, 4);
835 break;
836 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
837 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
838 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
839 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
840 break;
841 default:
842 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
843 break;
844 }
845 return size;
846}