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codeworkx62f02ba2012-05-20 12:00:36 +02001/*
2 *
3 * (C) COPYRIGHT 2010-2011 ARM Limited. All rights reserved.
4 *
5 * This program is free software and is provided to you under the terms of the GNU General Public License version 2
6 * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
7 *
8 * A copy of the licence is included with the program, and can also be obtained from Free Software
9 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
10 *
11 */
12
13
14
15/**
16 * @file ump_common.h
17 *
18 * This file contains some common enum values used both in both the user and kernel space side of UMP.
19 */
20
21#ifndef _UMP_COMMON_H_
22#define _UMP_COMMON_H_
23
24#ifdef __cplusplus
25extern "C"
26{
27#endif
28
29#ifdef __KERNEL__
30#include <linux/types.h>
31#else
32#include <stdint.h>
33#endif
34
35/**
36 * Values to identify major and minor version of UMP
37 */
38#define UMP_VERSION_MAJOR 2
39#define UMP_VERSION_MINOR 0
40
41/**
42 * Typedef for a secure ID, a system wide identifier for UMP memory buffers.
43 */
44typedef uint32_t ump_secure_id;
45
46/**
47 * Value to indicate an invalid secure Id.
48 */
49#define UMP_INVALID_SECURE_ID ((ump_secure_id)-1)
50
51/**
52 * UMP error codes.
53 */
54typedef enum
55{
56 UMP_OK = 0, /**< indicates success */
57 UMP_ERROR = 1 /**< indicates failure */
58} ump_result;
59
60/**
61 * Allocation flag bits.
62 *
63 * ump_allocate accepts zero or more flags to specify the type of memory to allocate and how to expose it to devices.
64 *
65 * For each supported device there are 4 flags to control access permissions and give usage characteristic hints to optimize the allocation/mapping.
66 * They are;
67 * @li @a UMP_PROT_<device>_RD read permission
68 * @li @a UMP_PROT_<device>_WR write permission
69 * @li @a UMP_HINT_<device>_RD read often
70 * @li @a UMP_HINT_<device>_WR written often
71 *
72 * 5 devices are currently supported, with a device being the CPU itself.
73 * The other 4 devices will be mapped to real devices per SoC design.
74 * They are just named W,X,Y,Z by UMP as it has no knowledge of their real names/identifiers.
75 * As an example device W could be a camera device while device Z could be an ARM GPU device, leaving X and Y unused.
76 *
77 * 2 additional flags control the allocation;
78 * @li @a UMP_CONSTRAINT_PHYSICALLY_LINEAR the allocation must be physical linear. Typical for devices without an MMU and no IOMMU to help it.
79 * @li @a UMP_PROT_SHAREABLE the allocation can be shared with other processes on the system. Without this flag the returned allocation won't be resolvable in other processes.
80 *
81 * All UMP allocation are growable unless they're @a UMP_PROT_SHAREABLE.
82 * The hint bits should be used to indicate the access pattern so the driver can select the most optimal memory type and cache settings based on the what the system supports.
83 */
84typedef enum
85{
86 /* Generic helpers */
87 UMP_PROT_DEVICE_RD = (1u << 0),
88 UMP_PROT_DEVICE_WR = (1u << 1),
89 UMP_HINT_DEVICE_RD = (1u << 2),
90 UMP_HINT_DEVICE_WR = (1u << 3),
91 UMP_DEVICE_MASK = 0xF,
92 UMP_DEVICE_CPU_SHIFT = 0,
93 UMP_DEVICE_W_SHIFT = 4,
94 UMP_DEVICE_X_SHIFT = 8,
95 UMP_DEVICE_Y_SHIFT = 12,
96 UMP_DEVICE_Z_SHIFT = 16,
97
98 /* CPU protection and hints. */
99 UMP_PROT_CPU_RD = (1u << 0),
100 UMP_PROT_CPU_WR = (1u << 1),
101 UMP_HINT_CPU_RD = (1u << 2),
102 UMP_HINT_CPU_WR = (1u << 3),
103
104 /* device W */
105 UMP_PROT_W_RD = (1u << 4),
106 UMP_PROT_W_WR = (1u << 5),
107 UMP_HINT_W_RD = (1u << 6),
108 UMP_HINT_W_WR = (1u << 7),
109
110 /* device X */
111 UMP_PROT_X_RD = (1u << 8),
112 UMP_PROT_X_WR = (1u << 9),
113 UMP_HINT_X_RD = (1u << 10),
114 UMP_HINT_X_WR = (1u << 11),
115
116 /* device Y */
117 UMP_PROT_Y_RD = (1u << 12),
118 UMP_PROT_Y_WR = (1u << 13),
119 UMP_HINT_Y_RD = (1u << 14),
120 UMP_HINT_Y_WR = (1u << 15),
121
122 /* device Z */
123 UMP_PROT_Z_RD = (1u << 16),
124 UMP_PROT_Z_WR = (1u << 17),
125 UMP_HINT_Z_RD = (1u << 18),
126 UMP_HINT_Z_WR = (1u << 19),
127
128 /* 20-26 reserved for future use */
129 UMPP_ALLOCBITS_UNUSED = (0x7Fu << 20),
130 /** Allocations marked as @ UMP_CONSTRAINT_UNCACHED won't be mapped as cached by the cpu */
131 UMP_CONSTRAINT_UNCACHED = (1u << 27),
132 /** Require 32-bit physically addressable memory */
133 UMP_CONSTRAINT_32BIT_ADDRESSABLE = (1u << 28),
134 /** For devices without an MMU and with no IOMMU assistance. */
135 UMP_CONSTRAINT_PHYSICALLY_LINEAR = (1u << 29),
136 /** Shareable must be set to allow the allocation to be used by other processes, the default is non-shared */
137 UMP_PROT_SHAREABLE = (1u << 30)
138 /* (1u << 31) should not be used to ensure compiler portability */
139} ump_allocation_bits;
140
141/**
142 * ump_allocation_bits combination argument type.
143 *
144 * Type used to pass zero or more bits from the @ref ump_allocation_bits enum
145 */
146typedef uint32_t ump_alloc_flags;
147
148
149/**
150 * Default allocation flags for UMP v1 compatible allocations.
151 */
152#define UMP_V1_API_DEFAULT_ALLOCATION_FLAGS UMP_PROT_CPU_RD | UMP_PROT_CPU_WR | \
153 UMP_PROT_W_RD | UMP_PROT_W_WR | \
154 UMP_PROT_X_RD | UMP_PROT_X_WR | \
155 UMP_PROT_Y_RD | UMP_PROT_Y_WR | \
156 UMP_PROT_Z_RD | UMP_PROT_Z_WR | \
157 UMP_PROT_SHAREABLE | \
158 UMP_CONSTRAINT_32BIT_ADDRESSABLE
159
160/**
161 * CPU cache sync operations.
162 *
163 * Cache synchronization operations to pass to @ref ump_cpu_msync_now
164 */
165enum
166{
167 /**
168 * Cleans any dirty cache lines to main memory, but the data will still be available in the cache.
169 * After a clean the contents of memory is considered to be "owned" by the device.
170 * */
171 UMP_MSYNC_CLEAN = 1,
172
173 /** Cleans any dirty cache lines to main memory and Ejects all lines from the cache.
174 * After an clean&invalidate the contents of memory is considered to be "owned" by the CPU.
175 * Any subsequent access will fetch data from main memory.
176 *
177 * @note Due to CPUs doing speculative prefetching a UMP_MSYNC_CLEAN_AND_INVALIDATE must be done before and after interacting with hardware.
178 * */
179 UMP_MSYNC_CLEAN_AND_INVALIDATE
180
181};
182
183typedef u32 ump_cpu_msync_op;
184
185/**
186 * Memory import types supported.
187 * If new import types are added they will appear here.
188 * They must be added before UMPP_EXTERNAL_MEM_COUNT and
189 * must be assigned an explicit sequantial number.
190 *
191 * @li UMP_EXTERNAL_MEM_TYPE_ION - Import an ION allocation
192 * Takes a int* (pointer to a file descriptor)
193 * Another ION reference is taken which is released on the final ump_release
194 */
195enum ump_external_memory_type
196{
197 UMPP_EXTERNAL_MEM_TYPE_UNUSED = 0, /* reserve type 0 */
198 UMP_EXTERNAL_MEM_TYPE_ION = 1,
199 UMPP_EXTERNAL_MEM_COUNT
200};
201
202/** @name UMP v1 API
203 *
204 *@{
205 */
206
207/**
208 * Allocation constraints.
209 *
210 * Allocation flags to pass @ref ump_ref_drv_allocate
211 *
212 * UMP v1 API only.
213 */
214typedef enum
215{
216 /** the allocation is mapped as noncached. */
217 UMP_REF_DRV_CONSTRAINT_NONE = 0,
218 /** not supported. */
219 UMP_REF_DRV_CONSTRAINT_PHYSICALLY_LINEAR = 1,
220 /** the allocation is mapped as cached by the cpu. */
221 UMP_REF_DRV_CONSTRAINT_USE_CACHE = 4
222} ump_alloc_constraints;
223
224/* @} */
225
226
227#ifdef __cplusplus
228}
229#endif
230
231
232#endif /* _UMP_COMMON_H_ */