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review.blissroms.org / platform_art / 937b73eea7a473395f3572e0db1fdc9c6a094db5 / . / src / compiler / Dataflow.cc
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buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "Dalvik.h"
18#include "Dataflow.h"
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]19
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]20namespace art {
21
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]22/*
23 * Main table containing data flow attributes for each bytecode. The
24 * first kNumPackedOpcodes entries are for Dalvik bytecode
25 * instructions, where extended opcode at the MIR level are appended
26 * afterwards.
27 *
28 * TODO - many optimization flags are incomplete - they will only limit the
29 * scope of optimizations but will not cause mis-optimizations.
30 */
buzbeeba938cb2012-02-03 14:47:55 -0800[diff] [blame]31const int oatDataFlowAttributes[kMirOpLast] = {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]32 // 00 NOP
33 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]34
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]35 // 01 MOVE vA, vB
36 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]37
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]38 // 02 MOVE_FROM16 vAA, vBBBB
39 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]40
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]41 // 03 MOVE_16 vAAAA, vBBBB
42 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]43
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]44 // 04 MOVE_WIDE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]45 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]46
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]47 // 05 MOVE_WIDE_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]48 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]49
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]50 // 06 MOVE_WIDE_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]51 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]52
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]53 // 07 MOVE_OBJECT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]54 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]55
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]56 // 08 MOVE_OBJECT_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]57 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]58
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]59 // 09 MOVE_OBJECT_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]60 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]61
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]62 // 0A MOVE_RESULT vAA
63 DF_DA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]64
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]65 // 0B MOVE_RESULT_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]66 DF_DA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]67
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]68 // 0C MOVE_RESULT_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]69 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]70
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]71 // 0D MOVE_EXCEPTION vAA
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]72 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]73
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]74 // 0E RETURN_VOID
75 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]76
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]77 // 0F RETURN vAA
78 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]79
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]80 // 10 RETURN_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]81 DF_UA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]82
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]83 // 11 RETURN_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]84 DF_UA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]85
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]86 // 12 CONST_4 vA, #+B
87 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]88
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]89 // 13 CONST_16 vAA, #+BBBB
90 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]91
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]92 // 14 CONST vAA, #+BBBBBBBB
93 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]94
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]95 // 15 CONST_HIGH16 VAA, #+BBBB0000
96 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]97
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]98 // 16 CONST_WIDE_16 vAA, #+BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]99 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]100
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]101 // 17 CONST_WIDE_32 vAA, #+BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]102 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]103
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]104 // 18 CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]105 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]106
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]107 // 19 CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]108 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]109
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]110 // 1A CONST_STRING vAA, string@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]111 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]112
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]113 // 1B CONST_STRING_JUMBO vAA, string@BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]114 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]115
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]116 // 1C CONST_CLASS vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]117 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]118
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]119 // 1D MONITOR_ENTER vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]120 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]121
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]122 // 1E MONITOR_EXIT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]123 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]124
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]125 // 1F CHK_CAST vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]126 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]127
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]128 // 20 INSTANCE_OF vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]129 DF_DA | DF_UB | DF_CORE_A | DF_REF_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]130
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]131 // 21 ARRAY_LENGTH vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]132 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_CORE_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]133
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]134 // 22 NEW_INSTANCE vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]135 DF_DA | DF_NON_NULL_DST | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]136
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]137 // 23 NEW_ARRAY vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]138 DF_DA | DF_UB | DF_NON_NULL_DST | DF_REF_A | DF_CORE_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]139
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]140 // 24 FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
141 DF_FORMAT_35C | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]142
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]143 // 25 FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
144 DF_FORMAT_3RC | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]145
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]146 // 26 FILL_ARRAY_DATA vAA, +BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]147 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]148
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]149 // 27 THROW vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]150 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]151
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]152 // 28 GOTO
153 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]154
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]155 // 29 GOTO_16
156 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]157
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]158 // 2A GOTO_32
159 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]160
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]161 // 2B PACKED_SWITCH vAA, +BBBBBBBB
162 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]163
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]164 // 2C SPARSE_SWITCH vAA, +BBBBBBBB
165 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]166
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]167 // 2D CMPL_FLOAT vAA, vBB, vCC
168 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]169
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]170 // 2E CMPG_FLOAT vAA, vBB, vCC
171 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]172
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]173 // 2F CMPL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]174 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]175
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]176 // 30 CMPG_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]177 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]178
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]179 // 31 CMP_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]180 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]181
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]182 // 32 IF_EQ vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]183 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]184
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]185 // 33 IF_NE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]186 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]187
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]188 // 34 IF_LT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]189 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]190
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]191 // 35 IF_GE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]192 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]193
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]194 // 36 IF_GT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]195 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]196
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]197 // 37 IF_LE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]198 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]199
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]200 // 38 IF_EQZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]201 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]202
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]203 // 39 IF_NEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]204 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]205
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]206 // 3A IF_LTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]207 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]208
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]209 // 3B IF_GEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]210 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]211
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]212 // 3C IF_GTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]213 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]214
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]215 // 3D IF_LEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]216 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]217
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]218 // 3E UNUSED_3E
219 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]220
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]221 // 3F UNUSED_3F
222 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]223
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]224 // 40 UNUSED_40
225 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]226
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]227 // 41 UNUSED_41
228 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]229
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]230 // 42 UNUSED_42
231 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]232
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]233 // 43 UNUSED_43
234 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]235
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]236 // 44 AGET vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]237 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]238
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]239 // 45 AGET_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]240 DF_DA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]241
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]242 // 46 AGET_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]243 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]244
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]245 // 47 AGET_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]246 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]247
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]248 // 48 AGET_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]249 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]250
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]251 // 49 AGET_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]252 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]253
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]254 // 4A AGET_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]255 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]256
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]257 // 4B APUT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]258 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]259
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]260 // 4C APUT_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]261 DF_UA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_2 | DF_RANGE_CHK_3 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]262
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]263 // 4D APUT_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]264 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]265
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]266 // 4E APUT_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]267 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]268
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]269 // 4F APUT_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]270 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]271
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]272 // 50 APUT_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]273 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]274
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]275 // 51 APUT_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]276 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]277
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]278 // 52 IGET vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]279 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]280
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]281 // 53 IGET_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]282 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]283
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]284 // 54 IGET_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]285 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]286
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]287 // 55 IGET_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]288 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]289
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]290 // 56 IGET_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]291 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]292
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]293 // 57 IGET_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]294 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]295
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]296 // 58 IGET_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]297 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]298
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]299 // 59 IPUT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]300 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]301
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]302 // 5A IPUT_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]303 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]304
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]305 // 5B IPUT_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]306 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]307
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]308 // 5C IPUT_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]309 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]310
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]311 // 5D IPUT_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]312 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]313
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]314 // 5E IPUT_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]315 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]316
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]317 // 5F IPUT_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]318 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]319
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]320 // 60 SGET vAA, field@BBBB
321 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]322
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]323 // 61 SGET_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]324 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]325
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]326 // 62 SGET_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]327 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]328
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]329 // 63 SGET_BOOLEAN vAA, field@BBBB
330 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]331
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]332 // 64 SGET_BYTE vAA, field@BBBB
333 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]334
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]335 // 65 SGET_CHAR vAA, field@BBBB
336 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]337
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]338 // 66 SGET_SHORT vAA, field@BBBB
339 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]340
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]341 // 67 SPUT vAA, field@BBBB
342 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]343
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]344 // 68 SPUT_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]345 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]346
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]347 // 69 SPUT_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]348 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]349
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]350 // 6A SPUT_BOOLEAN vAA, field@BBBB
351 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]352
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]353 // 6B SPUT_BYTE vAA, field@BBBB
354 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]355
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]356 // 6C SPUT_CHAR vAA, field@BBBB
357 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]358
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]359 // 6D SPUT_SHORT vAA, field@BBBB
360 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]361
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]362 // 6E INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
363 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]364
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]365 // 6F INVOKE_SUPER {vD, vE, vF, vG, vA}
366 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]367
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]368 // 70 INVOKE_DIRECT {vD, vE, vF, vG, vA}
369 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]370
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]371 // 71 INVOKE_STATIC {vD, vE, vF, vG, vA}
372 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]373
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]374 // 72 INVOKE_INTERFACE {vD, vE, vF, vG, vA}
375 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]376
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]377 // 73 UNUSED_73
378 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]379
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]380 // 74 INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
381 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]382
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]383 // 75 INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
384 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]385
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]386 // 76 INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
387 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]388
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]389 // 77 INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
390 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]391
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]392 // 78 INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
393 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]394
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]395 // 79 UNUSED_79
396 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]397
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]398 // 7A UNUSED_7A
399 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]400
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]401 // 7B NEG_INT vA, vB
402 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]403
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]404 // 7C NOT_INT vA, vB
405 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]406
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]407 // 7D NEG_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]408 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]409
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]410 // 7E NOT_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]411 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]412
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]413 // 7F NEG_FLOAT vA, vB
414 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]415
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]416 // 80 NEG_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]417 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]418
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]419 // 81 INT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]420 DF_DA | DF_A_WIDE | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]421
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]422 // 82 INT_TO_FLOAT vA, vB
423 DF_DA | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]424
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]425 // 83 INT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]426 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]427
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]428 // 84 LONG_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]429 DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]430
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]431 // 85 LONG_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]432 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]433
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]434 // 86 LONG_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]435 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]436
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]437 // 87 FLOAT_TO_INT vA, vB
438 DF_DA | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]439
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]440 // 88 FLOAT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]441 DF_DA | DF_A_WIDE | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]442
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]443 // 89 FLOAT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]444 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]445
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]446 // 8A DOUBLE_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]447 DF_DA | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]448
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]449 // 8B DOUBLE_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]450 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]451
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]452 // 8C DOUBLE_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]453 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]454
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]455 // 8D INT_TO_BYTE vA, vB
456 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]457
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]458 // 8E INT_TO_CHAR vA, vB
459 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]460
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]461 // 8F INT_TO_SHORT vA, vB
462 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]463
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]464 // 90 ADD_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]465 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]466
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]467 // 91 SUB_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]468 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]469
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]470 // 92 MUL_INT vAA, vBB, vCC
471 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]472
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]473 // 93 DIV_INT vAA, vBB, vCC
474 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]475
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]476 // 94 REM_INT vAA, vBB, vCC
477 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]478
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]479 // 95 AND_INT vAA, vBB, vCC
480 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]481
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]482 // 96 OR_INT vAA, vBB, vCC
483 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]484
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]485 // 97 XOR_INT vAA, vBB, vCC
486 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]487
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]488 // 98 SHL_INT vAA, vBB, vCC
489 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]490
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]491 // 99 SHR_INT vAA, vBB, vCC
492 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]493
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]494 // 9A USHR_INT vAA, vBB, vCC
495 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]496
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]497 // 9B ADD_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]498 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]499
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]500 // 9C SUB_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]501 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]502
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]503 // 9D MUL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]504 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]505
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]506 // 9E DIV_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]507 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]508
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]509 // 9F REM_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]510 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]511
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]512 // A0 AND_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]513 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]514
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]515 // A1 OR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]516 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]517
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]518 // A2 XOR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]519 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]520
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]521 // A3 SHL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]522 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]523
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]524 // A4 SHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]525 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]526
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]527 // A5 USHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]528 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]529
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]530 // A6 ADD_FLOAT vAA, vBB, vCC
531 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]532
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]533 // A7 SUB_FLOAT vAA, vBB, vCC
534 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]535
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]536 // A8 MUL_FLOAT vAA, vBB, vCC
537 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]538
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]539 // A9 DIV_FLOAT vAA, vBB, vCC
540 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]541
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]542 // AA REM_FLOAT vAA, vBB, vCC
543 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]544
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]545 // AB ADD_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]546 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]547
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]548 // AC SUB_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]549 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]550
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]551 // AD MUL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]552 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]553
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]554 // AE DIV_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]555 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]556
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]557 // AF REM_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]558 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]559
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]560 // B0 ADD_INT_2ADDR vA, vB
561 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]562
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]563 // B1 SUB_INT_2ADDR vA, vB
564 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]565
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]566 // B2 MUL_INT_2ADDR vA, vB
567 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]568
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]569 // B3 DIV_INT_2ADDR vA, vB
570 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]571
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]572 // B4 REM_INT_2ADDR vA, vB
573 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]574
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]575 // B5 AND_INT_2ADDR vA, vB
576 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]577
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]578 // B6 OR_INT_2ADDR vA, vB
579 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]580
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]581 // B7 XOR_INT_2ADDR vA, vB
582 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]583
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]584 // B8 SHL_INT_2ADDR vA, vB
585 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]586
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]587 // B9 SHR_INT_2ADDR vA, vB
588 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]589
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]590 // BA USHR_INT_2ADDR vA, vB
591 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]592
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]593 // BB ADD_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]594 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]595
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]596 // BC SUB_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]597 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]598
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]599 // BD MUL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]600 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]601
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]602 // BE DIV_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]603 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]604
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]605 // BF REM_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]606 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]607
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]608 // C0 AND_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]609 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]610
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]611 // C1 OR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]612 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]613
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]614 // C2 XOR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]615 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]616
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]617 // C3 SHL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]618 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]619
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]620 // C4 SHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]621 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]622
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]623 // C5 USHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]624 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]625
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]626 // C6 ADD_FLOAT_2ADDR vA, vB
627 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]628
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]629 // C7 SUB_FLOAT_2ADDR vA, vB
630 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]631
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]632 // C8 MUL_FLOAT_2ADDR vA, vB
633 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]634
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]635 // C9 DIV_FLOAT_2ADDR vA, vB
636 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]637
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]638 // CA REM_FLOAT_2ADDR vA, vB
639 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]640
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]641 // CB ADD_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]642 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]643
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]644 // CC SUB_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]645 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]646
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]647 // CD MUL_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]648 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]649
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]650 // CE DIV_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]651 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]652
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]653 // CF REM_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]654 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]655
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]656 // D0 ADD_INT_LIT16 vA, vB, #+CCCC
657 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]658
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]659 // D1 RSUB_INT vA, vB, #+CCCC
660 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]661
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]662 // D2 MUL_INT_LIT16 vA, vB, #+CCCC
663 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]664
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]665 // D3 DIV_INT_LIT16 vA, vB, #+CCCC
666 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]667
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]668 // D4 REM_INT_LIT16 vA, vB, #+CCCC
669 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]670
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]671 // D5 AND_INT_LIT16 vA, vB, #+CCCC
672 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]673
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]674 // D6 OR_INT_LIT16 vA, vB, #+CCCC
675 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]676
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]677 // D7 XOR_INT_LIT16 vA, vB, #+CCCC
678 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]679
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]680 // D8 ADD_INT_LIT8 vAA, vBB, #+CC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]681 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]682
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]683 // D9 RSUB_INT_LIT8 vAA, vBB, #+CC
684 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]685
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]686 // DA MUL_INT_LIT8 vAA, vBB, #+CC
687 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]688
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]689 // DB DIV_INT_LIT8 vAA, vBB, #+CC
690 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]691
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]692 // DC REM_INT_LIT8 vAA, vBB, #+CC
693 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]694
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]695 // DD AND_INT_LIT8 vAA, vBB, #+CC
696 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]697
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]698 // DE OR_INT_LIT8 vAA, vBB, #+CC
699 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]700
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]701 // DF XOR_INT_LIT8 vAA, vBB, #+CC
702 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]703
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]704 // E0 SHL_INT_LIT8 vAA, vBB, #+CC
705 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]706
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]707 // E1 SHR_INT_LIT8 vAA, vBB, #+CC
708 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]709
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]710 // E2 USHR_INT_LIT8 vAA, vBB, #+CC
711 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]712
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]713 // E3 IGET_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]714 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]715
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]716 // E4 IPUT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]717 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]718
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]719 // E5 SGET_VOLATILE
720 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]721
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]722 // E6 SPUT_VOLATILE
723 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]724
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]725 // E7 IGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]726 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]727
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]728 // E8 IGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]729 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]730
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]731 // E9 IPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]732 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]733
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]734 // EA SGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]735 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]736
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]737 // EB SPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]738 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]739
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]740 // EC BREAKPOINT
741 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]742
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]743 // ED THROW_VERIFICATION_ERROR
744 DF_NOP | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]745
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]746 // EE EXECUTE_INLINE
747 DF_FORMAT_35C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]748
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]749 // EF EXECUTE_INLINE_RANGE
750 DF_FORMAT_3RC,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]751
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]752 // F0 INVOKE_OBJECT_INIT_RANGE
753 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]754
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]755 // F1 RETURN_VOID_BARRIER
756 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]757
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]758 // F2 IGET_QUICK
759 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]760
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]761 // F3 IGET_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]762 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]763
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]764 // F4 IGET_OBJECT_QUICK
765 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]766
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]767 // F5 IPUT_QUICK
768 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]769
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]770 // F6 IPUT_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]771 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]772
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]773 // F7 IPUT_OBJECT_QUICK
774 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]775
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]776 // F8 INVOKE_VIRTUAL_QUICK
777 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]778
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]779 // F9 INVOKE_VIRTUAL_QUICK_RANGE
780 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]781
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]782 // FA INVOKE_SUPER_QUICK
783 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]784
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]785 // FB INVOKE_SUPER_QUICK_RANGE
786 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]787
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]788 // FC IPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]789 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]790
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]791 // FD SGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]792 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]793
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]794 // FE SPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]795 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]796
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]797 // FF UNUSED_FF
798 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]799
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]800 // Beginning of extended MIR opcodes
801 // 100 MIR_PHI
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]802 DF_DA | DF_NULL_TRANSFER_N,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]803
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]804 // 101 MIR_COPY
805 DF_DA | DF_UB | DF_IS_MOVE,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]806
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]807 // 102 MIR_FUSED_CMPL_FLOAT
808 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]809
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]810 // 103 MIR_FUSED_CMPG_FLOAT
811 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]812
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]813 // 104 MIR_FUSED_CMPL_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]814 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]815
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]816 // 105 MIR_FUSED_CMPG_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]817 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]818
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]819 // 106 MIR_FUSED_CMP_LONG
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]820 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]821
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]822 // 107 MIR_NOP
823 DF_NOP,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]824
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]825 // 108 MIR_NULL_RANGE_UP_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]826 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]827
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]828 // 109 MIR_NULL_RANGE_DOWN_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]829 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]830
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]831 // 110 MIR_LOWER_BOUND
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]832 0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]833};
834
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]835/* Return the base virtual register for a SSA name */
836int SRegToVReg(const CompilationUnit* cUnit, int ssaReg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]837{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]838 DCHECK_LT(ssaReg, (int)cUnit->ssaBaseVRegs->numUsed);
839 return GET_ELEM_N(cUnit->ssaBaseVRegs, int, ssaReg);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]840}
841
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]842int SRegToSubscript(const CompilationUnit* cUnit, int ssaReg)
843{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]844 DCHECK(ssaReg < (int)cUnit->ssaSubscripts->numUsed);
845 return GET_ELEM_N(cUnit->ssaSubscripts, int, ssaReg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]846}
847
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]848int getSSAUseCount(CompilationUnit* cUnit, int sReg)
849{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]850 DCHECK(sReg < (int)cUnit->rawUseCounts.numUsed);
851 return cUnit->rawUseCounts.elemList[sReg];
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]852}
853
854
buzbeeba938cb2012-02-03 14:47:55 -0800[diff] [blame]855char* oatGetDalvikDisassembly(CompilationUnit* cUnit,
Elliott Hughesadb8c672012-03-06 16:49:32 -0800[diff] [blame]856 const DecodedInstruction& insn, const char* note)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]857{
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]858 char buffer[256];
859 Instruction::Code opcode = insn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]860 int dfAttributes = oatDataFlowAttributes[opcode];
861 int flags;
862 char* ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]863
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]864 buffer[0] = 0;
865 if ((int)opcode >= (int)kMirOpFirst) {
866 if ((int)opcode == (int)kMirOpPhi) {
867 strcpy(buffer, "PHI");
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]868 } else {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]869 sprintf(buffer, "Opcode %#x", opcode);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]870 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]871 flags = 0;
872 } else {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]873 strcpy(buffer, Instruction::Name(opcode));
874 flags = Instruction::Flags(opcode);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]875 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]876
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]877 if (note)
878 strcat(buffer, note);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]879
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]880 /* For branches, decode the instructions to print out the branch targets */
881 if (flags & Instruction::kBranch) {
882 Instruction::Format dalvikFormat = Instruction::FormatOf(insn.opcode);
883 int offset = 0;
884 switch (dalvikFormat) {
885 case Instruction::k21t:
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]886 snprintf(buffer + strlen(buffer), 256, " v%d,", insn.vA);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]887 offset = (int) insn.vB;
888 break;
889 case Instruction::k22t:
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]890 snprintf(buffer + strlen(buffer), 256, " v%d, v%d,", insn.vA, insn.vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]891 offset = (int) insn.vC;
892 break;
893 case Instruction::k10t:
894 case Instruction::k20t:
895 case Instruction::k30t:
896 offset = (int) insn.vA;
897 break;
898 default:
899 LOG(FATAL) << "Unexpected branch format " << (int)dalvikFormat
900 << " / opcode " << (int)opcode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]901 }
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]902 snprintf(buffer + strlen(buffer), 256, " (%c%x)",
903 offset > 0 ? '+' : '-',
904 offset > 0 ? offset : -offset);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]905 } else if (dfAttributes & DF_FORMAT_35C) {
906 unsigned int i;
907 for (i = 0; i < insn.vA; i++) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]908 if (i != 0) strcat(buffer, ",");
909 snprintf(buffer + strlen(buffer), 256, " v%d", insn.arg[i]);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]910 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]911 }
912 else if (dfAttributes & DF_FORMAT_3RC) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]913 snprintf(buffer + strlen(buffer), 256,
914 " v%d..v%d", insn.vC, insn.vC + insn.vA - 1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]915 } else {
916 if (dfAttributes & DF_A_IS_REG) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]917 snprintf(buffer + strlen(buffer), 256, " v%d", insn.vA);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]918 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]919 if (dfAttributes & DF_B_IS_REG) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]920 snprintf(buffer + strlen(buffer), 256, ", v%d", insn.vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]921 } else if ((int)opcode < (int)kMirOpFirst) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]922 snprintf(buffer + strlen(buffer), 256, ", (#%d)", insn.vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]923 }
924 if (dfAttributes & DF_C_IS_REG) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]925 snprintf(buffer + strlen(buffer), 256, ", v%d", insn.vC);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]926 } else if ((int)opcode < (int)kMirOpFirst) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]927 snprintf(buffer + strlen(buffer), 256, ", (#%d)", insn.vC);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]928 }
929 }
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]930 int length = strlen(buffer) + 1;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]931 ret = (char*)oatNew(cUnit, length, false, kAllocDFInfo);
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]932 memcpy(ret, buffer, length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]933 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]934}
935
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]936char* getSSAName(const CompilationUnit* cUnit, int ssaReg, char* name)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]937{
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]938 sprintf(name, "v%d_%d", SRegToVReg(cUnit, ssaReg),
939 SRegToSubscript(cUnit, ssaReg));
940 return name;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]941}
942
943/*
944 * Dalvik instruction disassembler with optional SSA printing.
945 */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]946char* oatFullDisassembler(CompilationUnit* cUnit, const MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]947{
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]948 char buffer[256];
949 char operand0[32], operand1[32];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]950 const DecodedInstruction* insn = &mir->dalvikInsn;
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]951 Instruction::Code opcode = insn->opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]952 int dfAttributes = oatDataFlowAttributes[opcode];
953 char* ret;
954 int length;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]955
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]956 buffer[0] = 0;
957 if (static_cast<int>(opcode) >= static_cast<int>(kMirOpFirst)) {
958 if (static_cast<int>(opcode) == static_cast<int>(kMirOpPhi)) {
959 snprintf(buffer, 256, "PHI %s = (%s",
960 getSSAName(cUnit, mir->ssaRep->defs[0], operand0),
961 getSSAName(cUnit, mir->ssaRep->uses[0], operand1));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]962 int i;
963 for (i = 1; i < mir->ssaRep->numUses; i++) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]964 snprintf(buffer + strlen(buffer), 256, ", %s",
965 getSSAName(cUnit, mir->ssaRep->uses[i], operand0));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]966 }
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]967 snprintf(buffer + strlen(buffer), 256, ")");
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]968 } else {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]969 sprintf(buffer, "Opcode %#x", opcode);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]970 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]971 goto done;
972 } else {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]973 strcpy(buffer, Instruction::Name(opcode));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]974 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]975
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]976 /* For branches, decode the instructions to print out the branch targets */
977 if (Instruction::Flags(insn->opcode) & Instruction::kBranch) {
978 Instruction::Format dalvikFormat = Instruction::FormatOf(insn->opcode);
979 int delta = 0;
980 switch (dalvikFormat) {
981 case Instruction::k21t:
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]982 snprintf(buffer + strlen(buffer), 256, " %s, ",
983 getSSAName(cUnit, mir->ssaRep->uses[0], operand0));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]984 delta = (int) insn->vB;
985 break;
986 case Instruction::k22t:
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]987 snprintf(buffer + strlen(buffer), 256, " %s, %s, ",
988 getSSAName(cUnit, mir->ssaRep->uses[0], operand0),
989 getSSAName(cUnit, mir->ssaRep->uses[1], operand1));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]990 delta = (int) insn->vC;
991 break;
992 case Instruction::k10t:
993 case Instruction::k20t:
994 case Instruction::k30t:
995 delta = (int) insn->vA;
996 break;
997 default:
998 LOG(FATAL) << "Unexpected branch format: " << (int)dalvikFormat;
999 }
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1000 snprintf(buffer + strlen(buffer), 256, " %04x",
1001 mir->offset + delta);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1002 } else if (dfAttributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) {
1003 unsigned int i;
1004 for (i = 0; i < insn->vA; i++) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1005 if (i != 0) strcat(buffer, ",");
1006 snprintf(buffer + strlen(buffer), 256, " %s",
1007 getSSAName(cUnit, mir->ssaRep->uses[i], operand0));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1008 }
1009 } else {
1010 int udIdx;
1011 if (mir->ssaRep->numDefs) {
1012
1013 for (udIdx = 0; udIdx < mir->ssaRep->numDefs; udIdx++) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1014 snprintf(buffer + strlen(buffer), 256, " %s",
1015 getSSAName(cUnit, mir->ssaRep->defs[udIdx], operand0));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1016 }
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1017 strcat(buffer, ",");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1018 }
1019 if (mir->ssaRep->numUses) {
1020 /* No leading ',' for the first use */
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1021 snprintf(buffer + strlen(buffer), 256, " %s",
1022 getSSAName(cUnit, mir->ssaRep->uses[0], operand0));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1023 for (udIdx = 1; udIdx < mir->ssaRep->numUses; udIdx++) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1024 snprintf(buffer + strlen(buffer), 256, ", %s",
1025 getSSAName(cUnit, mir->ssaRep->uses[udIdx], operand0));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1026 }
1027 }
1028 if (static_cast<int>(opcode) < static_cast<int>(kMirOpFirst)) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1029 Instruction::Format dalvikFormat = Instruction::FormatOf(opcode);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1030 switch (dalvikFormat) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1031 case Instruction::k11n: // op vA, #+B
1032 case Instruction::k21s: // op vAA, #+BBBB
1033 case Instruction::k21h: // op vAA, #+BBBB00000[00000000]
1034 case Instruction::k31i: // op vAA, #+BBBBBBBB
1035 case Instruction::k51l: // op vAA, #+BBBBBBBBBBBBBBBB
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1036 snprintf(buffer + strlen(buffer), 256, " #%#x", insn->vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1037 break;
1038 case Instruction::k21c: // op vAA, thing@BBBB
1039 case Instruction::k31c: // op vAA, thing@BBBBBBBB
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1040 snprintf(buffer + strlen(buffer), 256, " @%#x", insn->vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1041 break;
1042 case Instruction::k22b: // op vAA, vBB, #+CC
1043 case Instruction::k22s: // op vA, vB, #+CCCC
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1044 snprintf(buffer + strlen(buffer), 256, " #%#x", insn->vC);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1045 break;
1046 case Instruction::k22c: // op vA, vB, thing@CCCC
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1047 snprintf(buffer + strlen(buffer), 256, " @%#x", insn->vC);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1048 break;
1049 /* No need for special printing */
1050 default:
1051 break;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1052 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1053 }
1054 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1055
1056done:
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1057 length = strlen(buffer) + 1;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1058 ret = (char*) oatNew(cUnit, length, false, kAllocDFInfo);
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1059 memcpy(ret, buffer, length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1060 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1061}
1062
Elliott Hughesc1f143d2011-12-01 17:31:10 -0800[diff] [blame]1063char* oatGetSSAString(CompilationUnit* cUnit, SSARepresentation* ssaRep)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1064{
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1065 char buffer[256];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1066 char* ret;
1067 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1068
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1069 buffer[0] = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1070 for (i = 0; i < ssaRep->numDefs; i++) {
1071 int ssaReg = ssaRep->defs[i];
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1072 sprintf(buffer + strlen(buffer), "s%d(v%d_%d) ", ssaReg,
1073 SRegToVReg(cUnit, ssaReg), SRegToSubscript(cUnit, ssaReg));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1074 }
1075
1076 if (ssaRep->numDefs) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1077 strcat(buffer, "<- ");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1078 }
1079
1080 for (i = 0; i < ssaRep->numUses; i++) {
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1081 int len = strlen(buffer);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1082 int ssaReg = ssaRep->uses[i];
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1083
1084 if (snprintf(buffer + len, 250 - len, "s%d(v%d_%d) ", ssaReg,
1085 SRegToVReg(cUnit, ssaReg),
1086 SRegToSubscript(cUnit, ssaReg))) {
1087 strcat(buffer, "...");
1088 break;
1089 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1090 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1091
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1092 int length = strlen(buffer) + 1;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1093 ret = (char*)oatNew(cUnit, length, false, kAllocDFInfo);
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1094 memcpy(ret, buffer, length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1095 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1096}
1097
1098/* Any register that is used before being defined is considered live-in */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1099inline void handleLiveInUse(CompilationUnit* cUnit, ArenaBitVector* useV,
1100 ArenaBitVector* defV, ArenaBitVector* liveInV,
1101 int dalvikRegId)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1102{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1103 oatSetBit(cUnit, useV, dalvikRegId);
1104 if (!oatIsBitSet(defV, dalvikRegId)) {
1105 oatSetBit(cUnit, liveInV, dalvikRegId);
1106 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1107}
1108
1109/* Mark a reg as being defined */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1110inline void handleDef(CompilationUnit* cUnit, ArenaBitVector* defV,
1111 int dalvikRegId)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1112{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1113 oatSetBit(cUnit, defV, dalvikRegId);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1114}
1115
1116/*
1117 * Find out live-in variables for natural loops. Variables that are live-in in
1118 * the main loop body are considered to be defined in the entry block.
1119 */
1120bool oatFindLocalLiveIn(CompilationUnit* cUnit, BasicBlock* bb)
1121{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1122 MIR* mir;
1123 ArenaBitVector *useV, *defV, *liveInV;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1124
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1125 if (bb->dataFlowInfo == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1126
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1127 useV = bb->dataFlowInfo->useV =
1128 oatAllocBitVector(cUnit, cUnit->numDalvikRegisters, false, kBitMapUse);
1129 defV = bb->dataFlowInfo->defV =
1130 oatAllocBitVector(cUnit, cUnit->numDalvikRegisters, false, kBitMapDef);
1131 liveInV = bb->dataFlowInfo->liveInV =
1132 oatAllocBitVector(cUnit, cUnit->numDalvikRegisters, false,
1133 kBitMapLiveIn);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1134
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1135 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1136 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
1137 DecodedInstruction *dInsn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1138
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1139 if (dfAttributes & DF_HAS_USES) {
1140 if (dfAttributes & DF_UA) {
1141 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vA);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1142 if (dfAttributes & DF_A_WIDE) {
1143 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vA+1);
1144 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1145 }
1146 if (dfAttributes & DF_UB) {
1147 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vB);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1148 if (dfAttributes & DF_B_WIDE) {
1149 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vB+1);
1150 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1151 }
1152 if (dfAttributes & DF_UC) {
1153 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vC);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1154 if (dfAttributes & DF_C_WIDE) {
1155 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vC+1);
1156 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1157 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1158 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1159 if (dfAttributes & DF_FORMAT_35C) {
1160 for (unsigned int i = 0; i < dInsn->vA; i++) {
1161 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->arg[i]);
1162 }
1163 }
1164 if (dfAttributes & DF_FORMAT_3RC) {
1165 for (unsigned int i = 0; i < dInsn->vA; i++) {
1166 handleLiveInUse(cUnit, useV, defV, liveInV, dInsn->vC+i);
1167 }
1168 }
1169 if (dfAttributes & DF_HAS_DEFS) {
1170 handleDef(cUnit, defV, dInsn->vA);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1171 if (dfAttributes & DF_A_WIDE) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1172 handleDef(cUnit, defV, dInsn->vA+1);
1173 }
1174 }
1175 }
1176 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1177}
1178
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1179int addNewSReg(CompilationUnit* cUnit, int vReg)
1180{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1181 // Compiler temps always have a subscript of 0
1182 int subscript = (vReg < 0) ? 0 : ++cUnit->SSALastDefs[vReg];
1183 int ssaReg = cUnit->numSSARegs++;
1184 oatInsertGrowableList(cUnit, cUnit->ssaBaseVRegs, vReg);
1185 oatInsertGrowableList(cUnit, cUnit->ssaSubscripts, subscript);
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1186 char* name = (char*)oatNew(cUnit, SSA_NAME_MAX, true, kAllocDFInfo);
1187 oatInsertGrowableList(cUnit, cUnit->ssaStrings, (intptr_t)getSSAName(cUnit, ssaReg, name));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1188 DCHECK_EQ(cUnit->ssaBaseVRegs->numUsed, cUnit->ssaSubscripts->numUsed);
1189 return ssaReg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1190}
1191
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1192/* Find out the latest SSA register for a given Dalvik register */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1193void handleSSAUse(CompilationUnit* cUnit, int* uses, int dalvikReg,
1194 int regIndex)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1195{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1196 DCHECK((dalvikReg >= 0) && (dalvikReg < cUnit->numDalvikRegisters));
1197 uses[regIndex] = cUnit->vRegToSSAMap[dalvikReg];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1198}
1199
1200/* Setup a new SSA register for a given Dalvik register */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1201void handleSSADef(CompilationUnit* cUnit, int* defs, int dalvikReg,
1202 int regIndex)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1203{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1204 DCHECK((dalvikReg >= 0) && (dalvikReg < cUnit->numDalvikRegisters));
1205 int ssaReg = addNewSReg(cUnit, dalvikReg);
1206 cUnit->vRegToSSAMap[dalvikReg] = ssaReg;
1207 defs[regIndex] = ssaReg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1208}
1209
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1210/* Look up new SSA names for format_35c instructions */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1211void dataFlowSSAFormat35C(CompilationUnit* cUnit, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1212{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1213 DecodedInstruction *dInsn = &mir->dalvikInsn;
1214 int numUses = dInsn->vA;
1215 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1216
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1217 mir->ssaRep->numUses = numUses;
1218 mir->ssaRep->uses = (int *)oatNew(cUnit, sizeof(int) * numUses, true,
1219 kAllocDFInfo);
1220 // NOTE: will be filled in during type & size inference pass
1221 mir->ssaRep->fpUse = (bool *)oatNew(cUnit, sizeof(bool) * numUses, true,
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1222 kAllocDFInfo);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1223
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1224 for (i = 0; i < numUses; i++) {
1225 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->arg[i], i);
1226 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1227}
1228
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1229/* Look up new SSA names for format_3rc instructions */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1230void dataFlowSSAFormat3RC(CompilationUnit* cUnit, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1231{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1232 DecodedInstruction *dInsn = &mir->dalvikInsn;
1233 int numUses = dInsn->vA;
1234 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1235
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1236 mir->ssaRep->numUses = numUses;
1237 mir->ssaRep->uses = (int *)oatNew(cUnit, sizeof(int) * numUses, true,
1238 kAllocDFInfo);
1239 // NOTE: will be filled in during type & size inference pass
1240 mir->ssaRep->fpUse = (bool *)oatNew(cUnit, sizeof(bool) * numUses, true,
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1241 kAllocDFInfo);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1242
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1243 for (i = 0; i < numUses; i++) {
1244 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC+i, i);
1245 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1246}
1247
1248/* Entry function to convert a block into SSA representation */
1249bool oatDoSSAConversion(CompilationUnit* cUnit, BasicBlock* bb)
1250{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1251 MIR* mir;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1252
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1253 if (bb->dataFlowInfo == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1254
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1255 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1256 mir->ssaRep = (struct SSARepresentation *)
1257 oatNew(cUnit, sizeof(SSARepresentation), true, kAllocDFInfo);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1258
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1259 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1260
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1261 // If not a pseudo-op, note non-leaf or can throw
1262 if (static_cast<int>(mir->dalvikInsn.opcode) <
1263 static_cast<int>(kNumPackedOpcodes)) {
1264 int flags = Instruction::Flags(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1265
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1266 if (flags & Instruction::kThrow) {
1267 cUnit->attrs &= ~METHOD_IS_THROW_FREE;
1268 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1269
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1270 if (flags & Instruction::kInvoke) {
1271 cUnit->attrs &= ~METHOD_IS_LEAF;
1272 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1273 }
1274
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1275 int numUses = 0;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1276
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1277 if (dfAttributes & DF_FORMAT_35C) {
1278 dataFlowSSAFormat35C(cUnit, mir);
1279 continue;
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1280 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1281
1282 if (dfAttributes & DF_FORMAT_3RC) {
1283 dataFlowSSAFormat3RC(cUnit, mir);
1284 continue;
1285 }
1286
1287 if (dfAttributes & DF_HAS_USES) {
1288 if (dfAttributes & DF_UA) {
1289 numUses++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1290 if (dfAttributes & DF_A_WIDE) {
1291 numUses ++;
1292 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1293 }
1294 if (dfAttributes & DF_UB) {
1295 numUses++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1296 if (dfAttributes & DF_B_WIDE) {
1297 numUses ++;
1298 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1299 }
1300 if (dfAttributes & DF_UC) {
1301 numUses++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1302 if (dfAttributes & DF_C_WIDE) {
1303 numUses ++;
1304 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1305 }
1306 }
1307
1308 if (numUses) {
1309 mir->ssaRep->numUses = numUses;
1310 mir->ssaRep->uses = (int *)oatNew(cUnit, sizeof(int) * numUses,
1311 false, kAllocDFInfo);
1312 mir->ssaRep->fpUse = (bool *)oatNew(cUnit, sizeof(bool) * numUses,
1313 false, kAllocDFInfo);
1314 }
1315
1316 int numDefs = 0;
1317
1318 if (dfAttributes & DF_HAS_DEFS) {
1319 numDefs++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1320 if (dfAttributes & DF_A_WIDE) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1321 numDefs++;
1322 }
1323 }
1324
1325 if (numDefs) {
1326 mir->ssaRep->numDefs = numDefs;
1327 mir->ssaRep->defs = (int *)oatNew(cUnit, sizeof(int) * numDefs,
1328 false, kAllocDFInfo);
1329 mir->ssaRep->fpDef = (bool *)oatNew(cUnit, sizeof(bool) * numDefs,
1330 false, kAllocDFInfo);
1331 }
1332
1333 DecodedInstruction *dInsn = &mir->dalvikInsn;
1334
1335 if (dfAttributes & DF_HAS_USES) {
1336 numUses = 0;
1337 if (dfAttributes & DF_UA) {
1338 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
1339 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA, numUses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1340 if (dfAttributes & DF_A_WIDE) {
1341 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_A;
1342 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vA+1, numUses++);
1343 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1344 }
1345 if (dfAttributes & DF_UB) {
1346 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
1347 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB, numUses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1348 if (dfAttributes & DF_B_WIDE) {
1349 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_B;
1350 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vB+1, numUses++);
1351 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1352 }
1353 if (dfAttributes & DF_UC) {
1354 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
1355 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC, numUses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1356 if (dfAttributes & DF_C_WIDE) {
1357 mir->ssaRep->fpUse[numUses] = dfAttributes & DF_FP_C;
1358 handleSSAUse(cUnit, mir->ssaRep->uses, dInsn->vC+1, numUses++);
1359 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1360 }
1361 }
1362 if (dfAttributes & DF_HAS_DEFS) {
1363 mir->ssaRep->fpDef[0] = dfAttributes & DF_FP_A;
1364 handleSSADef(cUnit, mir->ssaRep->defs, dInsn->vA, 0);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1365 if (dfAttributes & DF_A_WIDE) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1366 mir->ssaRep->fpDef[1] = dfAttributes & DF_FP_A;
1367 handleSSADef(cUnit, mir->ssaRep->defs, dInsn->vA+1, 1);
1368 }
1369 }
1370 }
1371
1372 if (!cUnit->disableDataflow) {
1373 /*
1374 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
1375 * input to PHI nodes can be derived from the snapshot of all
1376 * predecessor blocks.
1377 */
1378 bb->dataFlowInfo->vRegToSSAMap =
1379 (int *)oatNew(cUnit, sizeof(int) * cUnit->numDalvikRegisters, false,
1380 kAllocDFInfo);
1381
1382 memcpy(bb->dataFlowInfo->vRegToSSAMap, cUnit->vRegToSSAMap,
1383 sizeof(int) * cUnit->numDalvikRegisters);
1384 }
1385 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1386}
1387
1388/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1389void setConstant(CompilationUnit* cUnit, int ssaReg, int value)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1390{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1391 oatSetBit(cUnit, cUnit->isConstantV, ssaReg);
1392 cUnit->constantValues[ssaReg] = value;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1393}
1394
1395bool oatDoConstantPropagation(CompilationUnit* cUnit, BasicBlock* bb)
1396{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1397 MIR* mir;
1398 ArenaBitVector *isConstantV = cUnit->isConstantV;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1399
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1400 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1401 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1402
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1403 DecodedInstruction *dInsn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1404
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1405 if (!(dfAttributes & DF_HAS_DEFS)) continue;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1406
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1407 /* Handle instructions that set up constants directly */
1408 if (dfAttributes & DF_SETS_CONST) {
1409 if (dfAttributes & DF_DA) {
1410 switch (dInsn->opcode) {
1411 case Instruction::CONST_4:
1412 case Instruction::CONST_16:
1413 case Instruction::CONST:
1414 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB);
1415 break;
1416 case Instruction::CONST_HIGH16:
1417 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB << 16);
1418 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1419 case Instruction::CONST_WIDE_16:
1420 case Instruction::CONST_WIDE_32:
1421 setConstant(cUnit, mir->ssaRep->defs[0], dInsn->vB);
1422 setConstant(cUnit, mir->ssaRep->defs[1], 0);
1423 break;
1424 case Instruction::CONST_WIDE:
1425 setConstant(cUnit, mir->ssaRep->defs[0], (int) dInsn->vB_wide);
1426 setConstant(cUnit, mir->ssaRep->defs[1],
1427 (int) (dInsn->vB_wide >> 32));
1428 break;
1429 case Instruction::CONST_WIDE_HIGH16:
1430 setConstant(cUnit, mir->ssaRep->defs[0], 0);
1431 setConstant(cUnit, mir->ssaRep->defs[1], dInsn->vB << 16);
1432 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1433 default:
1434 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1435 }
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1436 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1437 /* Handle instructions that set up constants directly */
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1438 } else if (dfAttributes & DF_IS_MOVE) {
1439 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1440
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1441 for (i = 0; i < mir->ssaRep->numUses; i++) {
1442 if (!oatIsBitSet(isConstantV, mir->ssaRep->uses[i])) break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1443 }
1444 /* Move a register holding a constant to another register */
1445 if (i == mir->ssaRep->numUses) {
1446 setConstant(cUnit, mir->ssaRep->defs[0],
1447 cUnit->constantValues[mir->ssaRep->uses[0]]);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1448 if (dfAttributes & DF_A_WIDE) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1449 setConstant(cUnit, mir->ssaRep->defs[1],
1450 cUnit->constantValues[mir->ssaRep->uses[1]]);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1451 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1452 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1453 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1454 }
1455 /* TODO: implement code to handle arithmetic operations */
1456 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1457}
1458
1459/* Setup the basic data structures for SSA conversion */
1460void oatInitializeSSAConversion(CompilationUnit* cUnit)
1461{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1462 int i;
1463 int numDalvikReg = cUnit->numDalvikRegisters;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1464
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1465 cUnit->ssaBaseVRegs = (GrowableList *)oatNew(cUnit, sizeof(GrowableList),
1466 false, kAllocDFInfo);
1467 cUnit->ssaSubscripts = (GrowableList *)oatNew(cUnit, sizeof(GrowableList),
1468 false, kAllocDFInfo);
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1469 cUnit->ssaStrings = (GrowableList *)oatNew(cUnit, sizeof(GrowableList),
1470 false, kAllocDFInfo);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1471 // Create the ssa mappings, estimating the max size
1472 oatInitGrowableList(cUnit, cUnit->ssaBaseVRegs,
1473 numDalvikReg + cUnit->defCount + 128,
1474 kListSSAtoDalvikMap);
1475 oatInitGrowableList(cUnit, cUnit->ssaSubscripts,
1476 numDalvikReg + cUnit->defCount + 128,
1477 kListSSAtoDalvikMap);
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1478 oatInitGrowableList(cUnit, cUnit->ssaStrings,
1479 numDalvikReg + cUnit->defCount + 128,
1480 kListSSAtoDalvikMap);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1481 /*
1482 * Initial number of SSA registers is equal to the number of Dalvik
1483 * registers.
1484 */
1485 cUnit->numSSARegs = numDalvikReg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1486
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1487 /*
1488 * Initialize the SSA2Dalvik map list. For the first numDalvikReg elements,
1489 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
1490 * into "(0 << 16) | i"
1491 */
1492 for (i = 0; i < numDalvikReg; i++) {
1493 oatInsertGrowableList(cUnit, cUnit->ssaBaseVRegs, i);
1494 oatInsertGrowableList(cUnit, cUnit->ssaSubscripts, 0);
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1495 char* name = (char*)oatNew(cUnit, SSA_NAME_MAX, true, kAllocDFInfo);
1496 oatInsertGrowableList(cUnit, cUnit->ssaStrings, (intptr_t)getSSAName(cUnit, i, name));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1497 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1498
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1499 /*
1500 * Initialize the DalvikToSSAMap map. There is one entry for each
1501 * Dalvik register, and the SSA names for those are the same.
1502 */
1503 cUnit->vRegToSSAMap = (int *)oatNew(cUnit, sizeof(int) * numDalvikReg,
1504 false, kAllocDFInfo);
1505 /* Keep track of the higest def for each dalvik reg */
1506 cUnit->SSALastDefs = (int *)oatNew(cUnit, sizeof(int) * numDalvikReg,
1507 false, kAllocDFInfo);
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1508
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1509 for (i = 0; i < numDalvikReg; i++) {
1510 cUnit->vRegToSSAMap[i] = i;
1511 cUnit->SSALastDefs[i] = 0;
1512 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1513
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1514 /* Add ssa reg for Method* */
1515 cUnit->methodSReg = addNewSReg(cUnit, SSA_METHOD_BASEREG);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1516
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1517 /*
1518 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
1519 */
1520 GrowableListIterator iterator;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1521
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1522 oatGrowableListIteratorInit(&cUnit->blockList, &iterator);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1523
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1524 while (true) {
1525 BasicBlock* bb = (BasicBlock *) oatGrowableListIteratorNext(&iterator);
1526 if (bb == NULL) break;
1527 if (bb->hidden == true) continue;
1528 if (bb->blockType == kDalvikByteCode ||
1529 bb->blockType == kEntryBlock ||
1530 bb->blockType == kExitBlock) {
1531 bb->dataFlowInfo = (BasicBlockDataFlow *)
1532 oatNew(cUnit, sizeof(BasicBlockDataFlow), true, kAllocDFInfo);
1533 }
1534 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1535}
1536
1537/* Clear the visited flag for each BB */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1538bool oatClearVisitedFlag(struct CompilationUnit* cUnit, struct BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1539{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1540 bb->visited = false;
1541 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1542}
1543
1544void oatDataFlowAnalysisDispatcher(CompilationUnit* cUnit,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1545 bool (*func)(CompilationUnit*, BasicBlock*),
1546 DataFlowAnalysisMode dfaMode,
1547 bool isIterative)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1548{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1549 bool change = true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1550
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1551 while (change) {
1552 change = false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1553
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1554 switch (dfaMode) {
1555 /* Scan all blocks and perform the operations specified in func */
1556 case kAllNodes:
1557 {
1558 GrowableListIterator iterator;
1559 oatGrowableListIteratorInit(&cUnit->blockList, &iterator);
1560 while (true) {
1561 BasicBlock* bb =
1562 (BasicBlock *) oatGrowableListIteratorNext(&iterator);
1563 if (bb == NULL) break;
1564 if (bb->hidden == true) continue;
1565 change |= (*func)(cUnit, bb);
1566 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1567 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1568 break;
1569 /* Scan reachable blocks and perform the ops specified in func. */
1570 case kReachableNodes:
1571 {
1572 int numReachableBlocks = cUnit->numReachableBlocks;
1573 int idx;
1574 const GrowableList *blockList = &cUnit->blockList;
1575
1576 for (idx = 0; idx < numReachableBlocks; idx++) {
1577 int blockIdx = cUnit->dfsOrder.elemList[idx];
1578 BasicBlock* bb = (BasicBlock *)
1579 oatGrowableListGetElement(blockList, blockIdx);
1580 change |= (*func)(cUnit, bb);
1581 }
1582 }
1583 break;
1584
1585 /* Scan reachable blocks by pre-order dfs and invoke func on each. */
1586 case kPreOrderDFSTraversal:
1587 {
1588 int numReachableBlocks = cUnit->numReachableBlocks;
1589 int idx;
1590 const GrowableList *blockList = &cUnit->blockList;
1591
1592 for (idx = 0; idx < numReachableBlocks; idx++) {
1593 int dfsIdx = cUnit->dfsOrder.elemList[idx];
1594 BasicBlock* bb = (BasicBlock *)
1595 oatGrowableListGetElement(blockList, dfsIdx);
1596 change |= (*func)(cUnit, bb);
1597 }
1598 }
1599 break;
1600 /* Scan reachable blocks post-order dfs and invoke func on each. */
1601 case kPostOrderDFSTraversal:
1602 {
1603 int numReachableBlocks = cUnit->numReachableBlocks;
1604 int idx;
1605 const GrowableList *blockList = &cUnit->blockList;
1606
1607 for (idx = numReachableBlocks - 1; idx >= 0; idx--) {
1608 int dfsIdx = cUnit->dfsOrder.elemList[idx];
1609 BasicBlock* bb = (BasicBlock *)
1610 oatGrowableListGetElement(blockList, dfsIdx);
1611 change |= (*func)(cUnit, bb);
1612 }
1613 }
1614 break;
1615 /* Scan reachable post-order dom tree and invoke func on each. */
1616 case kPostOrderDOMTraversal:
1617 {
1618 int numReachableBlocks = cUnit->numReachableBlocks;
1619 int idx;
1620 const GrowableList *blockList = &cUnit->blockList;
1621
1622 for (idx = 0; idx < numReachableBlocks; idx++) {
1623 int domIdx = cUnit->domPostOrderTraversal.elemList[idx];
1624 BasicBlock* bb = (BasicBlock *)
1625 oatGrowableListGetElement(blockList, domIdx);
1626 change |= (*func)(cUnit, bb);
1627 }
1628 }
1629 break;
1630 /* Scan reachable blocks reverse post-order dfs, invoke func on each */
1631 case kReversePostOrderTraversal:
1632 {
1633 int numReachableBlocks = cUnit->numReachableBlocks;
1634 int idx;
1635 const GrowableList *blockList = &cUnit->blockList;
1636
1637 for (idx = numReachableBlocks - 1; idx >= 0; idx--) {
1638 int revIdx = cUnit->dfsPostOrder.elemList[idx];
1639 BasicBlock* bb = (BasicBlock *)
1640 oatGrowableListGetElement(blockList, revIdx);
1641 change |= (*func)(cUnit, bb);
1642 }
1643 }
1644 break;
1645 default:
1646 LOG(FATAL) << "Unknown traversal mode " << (int)dfaMode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1647 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1648 /* If isIterative is false, exit the loop after the first iteration */
1649 change &= isIterative;
1650 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1651}
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1652
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1653/* Advance to next strictly dominated MIR node in an extended basic block */
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1654MIR* advanceMIR(CompilationUnit* cUnit, BasicBlock** pBb, MIR* mir,
1655 ArenaBitVector* bv, bool clearMark) {
1656 BasicBlock* bb = *pBb;
1657 if (mir != NULL) {
1658 mir = mir->next;
1659 if (mir == NULL) {
1660 bb = bb->fallThrough;
1661 if ((bb == NULL) || bb->predecessors->numUsed != 1) {
1662 mir = NULL;
1663 } else {
1664 if (bv) {
1665 oatSetBit(cUnit, bv, bb->id);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1666 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1667 *pBb = bb;
1668 mir = bb->firstMIRInsn;
1669 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1670 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1671 }
1672 if (mir && clearMark) {
1673 mir->optimizationFlags &= ~MIR_MARK;
1674 }
1675 return mir;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1676}
1677
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1678/*
1679 * To be used at an invoke mir. If the logically next mir node represents
1680 * a move-result, return it. Else, return NULL. If a move-result exists,
1681 * it is required to immediately follow the invoke with no intervening
1682 * opcodes or incoming arcs. However, if the result of the invoke is not
1683 * used, a move-result may not be present.
1684 */
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1685MIR* oatFindMoveResult(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir)
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1686{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1687 BasicBlock* tbb = bb;
1688 mir = advanceMIR(cUnit, &tbb, mir, NULL, false);
1689 while (mir != NULL) {
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1690 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
buzbee52ed7762012-06-13 23:43:14 -0700[diff] [blame]1691 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1692 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1693 break;
1694 }
1695 // Keep going if pseudo op, otherwise terminate
Brian Carlstrom937b73e2012-08-01 16:09:16 -0700[diff] [blame^]1696 if (mir->dalvikInsn.opcode <
1697 static_cast<Instruction::Code>(kNumPackedOpcodes)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1698 mir = NULL;
1699 } else {
1700 mir = advanceMIR(cUnit, &tbb, mir, NULL, false);
1701 }
1702 }
1703 return mir;
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1704}
1705
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1706void squashDupRangeChecks(CompilationUnit* cUnit, BasicBlock** pBp, MIR* mir,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1707 int arraySreg, int indexSreg)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1708{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1709 while (true) {
1710 mir = advanceMIR(cUnit, pBp, mir, NULL, false);
1711 if (!mir) {
1712 break;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1713 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1714 if ((mir->ssaRep == NULL) ||
1715 (mir->optimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
1716 continue;
1717 }
1718 int checkArray = INVALID_SREG;
1719 int checkIndex = INVALID_SREG;
1720 switch (mir->dalvikInsn.opcode) {
1721 case Instruction::AGET:
1722 case Instruction::AGET_OBJECT:
1723 case Instruction::AGET_BOOLEAN:
1724 case Instruction::AGET_BYTE:
1725 case Instruction::AGET_CHAR:
1726 case Instruction::AGET_SHORT:
1727 case Instruction::AGET_WIDE:
1728 checkArray = mir->ssaRep->uses[0];
1729 checkIndex = mir->ssaRep->uses[1];
1730 break;
1731 case Instruction::APUT:
1732 case Instruction::APUT_OBJECT:
1733 case Instruction::APUT_SHORT:
1734 case Instruction::APUT_CHAR:
1735 case Instruction::APUT_BYTE:
1736 case Instruction::APUT_BOOLEAN:
1737 checkArray = mir->ssaRep->uses[1];
1738 checkIndex = mir->ssaRep->uses[2];
1739 break;
1740 case Instruction::APUT_WIDE:
1741 checkArray = mir->ssaRep->uses[2];
1742 checkIndex = mir->ssaRep->uses[3];
1743 default:
1744 break;
1745 }
1746 if (checkArray == INVALID_SREG) {
1747 continue;
1748 }
1749 if ((arraySreg == checkArray) && (indexSreg == checkIndex)) {
1750 if (cUnit->printMe) {
1751 LOG(INFO) << "Squashing range check @ 0x" << std::hex << mir->offset;
1752 }
1753 mir->optimizationFlags |= MIR_IGNORE_RANGE_CHECK;
1754 }
1755 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1756}
1757
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1758/* Allocate a compiler temp, return Sreg. Reuse existing if no conflict */
1759int allocCompilerTempSreg(CompilationUnit* cUnit, ArenaBitVector* bv)
1760{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1761 for (int i = 0; i < cUnit->numCompilerTemps; i++) {
1762 CompilerTemp* ct = (CompilerTemp*)cUnit->compilerTemps.elemList[i];
1763 ArenaBitVector* tBv = ct->bv;
1764 if (!oatTestBitVectors(bv, tBv)) {
1765 // Combine live maps and reuse existing temp
1766 oatUnifyBitVectors(tBv, tBv, bv);
1767 return ct->sReg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1768 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1769 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1770
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1771 // Create a new compiler temp & associated live bitmap
1772 CompilerTemp* ct = (CompilerTemp*)oatNew(cUnit, sizeof(CompilerTemp),
1773 true, kAllocMisc);
1774 ArenaBitVector *nBv = oatAllocBitVector(cUnit, cUnit->numBlocks, true,
1775 kBitMapMisc);
1776 oatCopyBitVector(nBv, bv);
1777 ct->bv = nBv;
1778 ct->sReg = addNewSReg(cUnit, SSA_CTEMP_BASEREG - cUnit->numCompilerTemps);
1779 cUnit->numCompilerTemps++;
1780 oatInsertGrowableList(cUnit, &cUnit->compilerTemps, (intptr_t)ct);
1781 DCHECK_EQ(cUnit->numCompilerTemps, (int)cUnit->compilerTemps.numUsed);
1782 return ct->sReg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1783}
1784
1785/* Creata a new MIR node for a new pseudo op. */
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1786MIR* rawMIR(CompilationUnit* cUnit, Instruction::Code opcode, int defs,
1787 int uses)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1788{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1789 MIR* res = (MIR*)oatNew( cUnit, sizeof(MIR), true, kAllocMIR);
1790 res->ssaRep =(struct SSARepresentation *)
1791 oatNew(cUnit, sizeof(SSARepresentation), true, kAllocDFInfo);
1792 if (uses) {
1793 res->ssaRep->numUses = uses;
1794 res->ssaRep->uses = (int*)oatNew(cUnit, sizeof(int) * uses, false,
1795 kAllocDFInfo);
1796 }
1797 if (defs) {
1798 res->ssaRep->numDefs = defs;
1799 res->ssaRep->defs = (int*)oatNew(cUnit, sizeof(int) * defs, false,
1800 kAllocDFInfo);
1801 res->ssaRep->fpDef = (bool*)oatNew(cUnit, sizeof(bool) * defs, true,
1802 kAllocDFInfo);
1803 }
1804 res->dalvikInsn.opcode = opcode;
1805 return res;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1806}
1807
1808/* Do some MIR-level basic block optimizations */
1809bool basicBlockOpt(CompilationUnit* cUnit, BasicBlock* bb)
1810{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1811 int numTemps = 0;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1812
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1813 for (MIR* mir = bb->firstMIRInsn; mir; mir = mir->next) {
1814 // Look for interesting opcodes, skip otherwise
1815 Instruction::Code opcode = mir->dalvikInsn.opcode;
1816 switch (opcode) {
1817 case Instruction::AGET:
1818 case Instruction::AGET_OBJECT:
1819 case Instruction::AGET_BOOLEAN:
1820 case Instruction::AGET_BYTE:
1821 case Instruction::AGET_CHAR:
1822 case Instruction::AGET_SHORT:
1823 case Instruction::AGET_WIDE:
1824 if (!(mir->optimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
1825 int arrSreg = mir->ssaRep->uses[0];
1826 int idxSreg = mir->ssaRep->uses[1];
1827 BasicBlock* tbb = bb;
1828 squashDupRangeChecks(cUnit, &tbb, mir, arrSreg, idxSreg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1829 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1830 break;
1831 case Instruction::APUT:
1832 case Instruction::APUT_OBJECT:
1833 case Instruction::APUT_SHORT:
1834 case Instruction::APUT_CHAR:
1835 case Instruction::APUT_BYTE:
1836 case Instruction::APUT_BOOLEAN:
1837 case Instruction::APUT_WIDE:
1838 if (!(mir->optimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
1839 int start = (opcode == Instruction::APUT_WIDE) ? 2 : 1;
1840 int arrSreg = mir->ssaRep->uses[start];
1841 int idxSreg = mir->ssaRep->uses[start + 1];
1842 BasicBlock* tbb = bb;
1843 squashDupRangeChecks(cUnit, &tbb, mir, arrSreg, idxSreg);
1844 }
1845 break;
1846 case Instruction::CMPL_FLOAT:
1847 case Instruction::CMPL_DOUBLE:
1848 case Instruction::CMPG_FLOAT:
1849 case Instruction::CMPG_DOUBLE:
1850 case Instruction::CMP_LONG:
1851 if (mir->next != NULL) {
1852 MIR* mirNext = mir->next;
1853 Instruction::Code brOpcode = mirNext->dalvikInsn.opcode;
1854 ConditionCode ccode = kCondNv;
1855 switch(brOpcode) {
1856 case Instruction::IF_EQZ:
1857 ccode = kCondEq;
1858 break;
1859 case Instruction::IF_NEZ:
1860 ccode = kCondNe;
1861 break;
1862 case Instruction::IF_LTZ:
1863 ccode = kCondLt;
1864 break;
1865 case Instruction::IF_GEZ:
1866 ccode = kCondGe;
1867 break;
1868 case Instruction::IF_GTZ:
1869 ccode = kCondGt;
1870 break;
1871 case Instruction::IF_LEZ:
1872 ccode = kCondLe;
1873 break;
1874 default:
1875 break;
1876 }
1877 // Make sure result of cmp is used by next insn and nowhere else
1878 if ((ccode != kCondNv) &&
1879 (mir->ssaRep->defs[0] == mirNext->ssaRep->uses[0]) &&
1880 (getSSAUseCount(cUnit, mir->ssaRep->defs[0]) == 1)) {
1881 mirNext->dalvikInsn.arg[0] = ccode;
1882 switch(opcode) {
1883 case Instruction::CMPL_FLOAT:
1884 mirNext->dalvikInsn.opcode =
1885 static_cast<Instruction::Code>(kMirOpFusedCmplFloat);
1886 break;
1887 case Instruction::CMPL_DOUBLE:
1888 mirNext->dalvikInsn.opcode =
1889 static_cast<Instruction::Code>(kMirOpFusedCmplDouble);
1890 break;
1891 case Instruction::CMPG_FLOAT:
1892 mirNext->dalvikInsn.opcode =
1893 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat);
1894 break;
1895 case Instruction::CMPG_DOUBLE:
1896 mirNext->dalvikInsn.opcode =
1897 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble);
1898 break;
1899 case Instruction::CMP_LONG:
1900 mirNext->dalvikInsn.opcode =
1901 static_cast<Instruction::Code>(kMirOpFusedCmpLong);
1902 break;
1903 default: LOG(ERROR) << "Unexpected opcode: " << (int)opcode;
1904 }
1905 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
1906 mirNext->ssaRep->numUses = mir->ssaRep->numUses;
1907 mirNext->ssaRep->uses = mir->ssaRep->uses;
1908 mirNext->ssaRep->fpUse = mir->ssaRep->fpUse;
1909 mirNext->ssaRep->numDefs = 0;
1910 mir->ssaRep->numUses = 0;
1911 mir->ssaRep->numDefs = 0;
1912 }
1913 }
1914 break;
1915 default:
1916 break;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1917 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1918 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1919
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1920 if (numTemps > cUnit->numCompilerTemps) {
1921 cUnit->numCompilerTemps = numTemps;
1922 }
1923 return true;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1924}
1925
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1926bool nullCheckEliminationInit(struct CompilationUnit* cUnit,
1927 struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1928{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1929 if (bb->dataFlowInfo == NULL) return false;
1930 bb->dataFlowInfo->endingNullCheckV =
1931 oatAllocBitVector(cUnit, cUnit->numSSARegs, false, kBitMapNullCheck);
1932 oatClearAllBits(bb->dataFlowInfo->endingNullCheckV);
1933 return true;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1934}
1935
1936/* Eliminate unnecessary null checks for a basic block. */
buzbee31a4a6f2012-02-28 15:36:15 -0800[diff] [blame]1937bool eliminateNullChecks( struct CompilationUnit* cUnit, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1938{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1939 if (bb->dataFlowInfo == NULL) return false;
1940
1941 /*
1942 * Set initial state. Be conservative with catch
1943 * blocks and start with no assumptions about null check
1944 * status (except for "this").
1945 */
1946 if ((bb->blockType == kEntryBlock) | bb->catchEntry) {
1947 oatClearAllBits(cUnit->tempSSARegisterV);
1948 if ((cUnit->access_flags & kAccStatic) == 0) {
1949 // If non-static method, mark "this" as non-null
1950 int thisReg = cUnit->numDalvikRegisters - cUnit->numIns;
1951 oatSetBit(cUnit, cUnit->tempSSARegisterV, thisReg);
1952 }
1953 } else {
1954 // Starting state is intesection of all incoming arcs
1955 GrowableListIterator iter;
1956 oatGrowableListIteratorInit(bb->predecessors, &iter);
1957 BasicBlock* predBB = (BasicBlock*)oatGrowableListIteratorNext(&iter);
1958 DCHECK(predBB != NULL);
1959 oatCopyBitVector(cUnit->tempSSARegisterV,
1960 predBB->dataFlowInfo->endingNullCheckV);
1961 while (true) {
1962 predBB = (BasicBlock*)oatGrowableListIteratorNext(&iter);
1963 if (!predBB) break;
1964 if ((predBB->dataFlowInfo == NULL) ||
1965 (predBB->dataFlowInfo->endingNullCheckV == NULL)) {
1966 continue;
1967 }
1968 oatIntersectBitVectors(cUnit->tempSSARegisterV,
1969 cUnit->tempSSARegisterV,
1970 predBB->dataFlowInfo->endingNullCheckV);
1971 }
1972 }
1973
1974 // Walk through the instruction in the block, updating as necessary
1975 for (MIR* mir = bb->firstMIRInsn; mir; mir = mir->next) {
1976 if (mir->ssaRep == NULL) {
1977 continue;
1978 }
1979 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
1980
1981 // Mark target of NEW* as non-null
1982 if (dfAttributes & DF_NON_NULL_DST) {
1983 oatSetBit(cUnit, cUnit->tempSSARegisterV, mir->ssaRep->defs[0]);
1984 }
1985
1986 // Mark non-null returns from invoke-style NEW*
1987 if (dfAttributes & DF_NON_NULL_RET) {
1988 MIR* nextMir = mir->next;
1989 // Next should be an MOVE_RESULT_OBJECT
1990 if (nextMir &&
1991 nextMir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
1992 // Mark as null checked
1993 oatSetBit(cUnit, cUnit->tempSSARegisterV, nextMir->ssaRep->defs[0]);
1994 } else {
1995 if (nextMir) {
1996 LOG(WARNING) << "Unexpected opcode following new: "
1997 << (int)nextMir->dalvikInsn.opcode;
1998 } else if (bb->fallThrough) {
1999 // Look in next basic block
2000 struct BasicBlock* nextBB = bb->fallThrough;
2001 for (MIR* tmir = nextBB->firstMIRInsn; tmir;
2002 tmir =tmir->next) {
2003 if ((int)tmir->dalvikInsn.opcode >= (int)kMirOpFirst) {
2004 continue;
2005 }
2006 // First non-pseudo should be MOVE_RESULT_OBJECT
2007 if (tmir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
2008 // Mark as null checked
2009 oatSetBit(cUnit, cUnit->tempSSARegisterV, tmir->ssaRep->defs[0]);
2010 } else {
2011 LOG(WARNING) << "Unexpected op after new: "
2012 << (int)tmir->dalvikInsn.opcode;
2013 }
2014 break;
2015 }
2016 }
2017 }
2018 }
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]2019
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2020 /*
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2021 * Propagate nullcheck state on register copies (including
2022 * Phi pseudo copies. For the latter, nullcheck state is
2023 * the "and" of all the Phi's operands.
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2024 */
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2025 if (dfAttributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
2026 int tgtSreg = mir->ssaRep->defs[0];
2027 int operands = (dfAttributes & DF_NULL_TRANSFER_0) ? 1 :
2028 mir->ssaRep->numUses;
2029 bool nullChecked = true;
2030 for (int i = 0; i < operands; i++) {
2031 nullChecked &= oatIsBitSet(cUnit->tempSSARegisterV,
2032 mir->ssaRep->uses[i]);
2033 }
2034 if (nullChecked) {
2035 oatSetBit(cUnit, cUnit->tempSSARegisterV, tgtSreg);
2036 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2037 }
2038
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2039 // Already nullchecked?
2040 if (dfAttributes & DF_HAS_NULL_CHKS) {
2041 int srcIdx;
2042 if (dfAttributes & DF_NULL_CHK_1) {
2043 srcIdx = 1;
2044 } else if (dfAttributes & DF_NULL_CHK_2) {
2045 srcIdx = 2;
2046 } else {
2047 srcIdx = 0;
2048 }
2049 int srcSreg = mir->ssaRep->uses[srcIdx];
2050 if (oatIsBitSet(cUnit->tempSSARegisterV, srcSreg)) {
2051 // Eliminate the null check
2052 mir->optimizationFlags |= MIR_IGNORE_NULL_CHECK;
2053 } else {
2054 // Mark sReg as null-checked
2055 oatSetBit(cUnit, cUnit->tempSSARegisterV, srcSreg);
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2056 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2057 }
2058 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2059
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2060 // Did anything change?
2061 bool res = oatCompareBitVectors(bb->dataFlowInfo->endingNullCheckV,
2062 cUnit->tempSSARegisterV);
2063 if (res) {
2064 oatCopyBitVector(bb->dataFlowInfo->endingNullCheckV,
2065 cUnit->tempSSARegisterV);
2066 }
2067 return res;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2068}
2069
2070void oatMethodNullCheckElimination(CompilationUnit *cUnit)
2071{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2072 if (!(cUnit->disableOpt & (1 << kNullCheckElimination))) {
2073 DCHECK(cUnit->tempSSARegisterV != NULL);
2074 oatDataFlowAnalysisDispatcher(cUnit, nullCheckEliminationInit, kAllNodes,
2075 false /* isIterative */);
2076 oatDataFlowAnalysisDispatcher(cUnit, eliminateNullChecks,
2077 kPreOrderDFSTraversal,
2078 true /* isIterative */);
2079 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2080}
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2081
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2082void oatMethodBasicBlockOptimization(CompilationUnit *cUnit)
2083{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2084 if (!(cUnit->disableOpt & (1 << kBBOpt))) {
2085 oatInitGrowableList(cUnit, &cUnit->compilerTemps, 6, kListMisc);
2086 DCHECK_EQ(cUnit->numCompilerTemps, 0);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2087 if (!(cUnit->disableOpt & (1 << kBBOpt))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2088 oatDataFlowAnalysisDispatcher(cUnit, basicBlockOpt,
2089 kAllNodes, false /* isIterative */);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2090 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2091 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2092}
2093
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2094void addLoopHeader(CompilationUnit* cUnit, BasicBlock* header,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2095 BasicBlock* backEdge)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2096{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2097 GrowableListIterator iter;
2098 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2099 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2100 (loop != NULL); loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2101 if (loop->header == header) {
2102 oatInsertGrowableList(cUnit, &loop->incomingBackEdges,
2103 (intptr_t)backEdge);
2104 return;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2105 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2106 }
2107 LoopInfo* info = (LoopInfo*)oatNew(cUnit, sizeof(LoopInfo), true,
2108 kAllocDFInfo);
2109 info->header = header;
2110 oatInitGrowableList(cUnit, &info->incomingBackEdges, 2, kListMisc);
2111 oatInsertGrowableList(cUnit, &info->incomingBackEdges, (intptr_t)backEdge);
2112 oatInsertGrowableList(cUnit, &cUnit->loopHeaders, (intptr_t)info);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2113}
2114
2115bool findBackEdges(struct CompilationUnit* cUnit, struct BasicBlock* bb)
2116{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2117 if ((bb->dataFlowInfo == NULL) || (bb->lastMIRInsn == NULL)) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2118 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2119 }
2120 Instruction::Code opcode = bb->lastMIRInsn->dalvikInsn.opcode;
2121 if (Instruction::Flags(opcode) & Instruction::kBranch) {
2122 if (bb->taken && (bb->taken->startOffset <= bb->startOffset)) {
2123 DCHECK(bb->dominators != NULL);
2124 if (oatIsBitSet(bb->dominators, bb->taken->id)) {
2125 if (cUnit->printMe) {
2126 LOG(INFO) << "Loop backedge from 0x"
2127 << std::hex << bb->lastMIRInsn->offset
2128 << " to 0x" << std::hex << bb->taken->startOffset;
2129 }
2130 addLoopHeader(cUnit, bb->taken, bb);
2131 }
2132 }
2133 }
2134 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2135}
2136
2137void addBlocksToLoop(CompilationUnit* cUnit, ArenaBitVector* blocks,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2138 BasicBlock* bb, int headId)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2139{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2140 if (!oatIsBitSet(bb->dominators, headId) ||
2141 oatIsBitSet(blocks, bb->id)) {
2142 return;
2143 }
2144 oatSetBit(cUnit, blocks, bb->id);
2145 GrowableListIterator iter;
2146 oatGrowableListIteratorInit(bb->predecessors, &iter);
2147 BasicBlock* predBB;
2148 for (predBB = (BasicBlock*)oatGrowableListIteratorNext(&iter); predBB;
2149 predBB = (BasicBlock*)oatGrowableListIteratorNext(&iter)) {
2150 addBlocksToLoop(cUnit, blocks, predBB, headId);
2151 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2152}
2153
2154void oatDumpLoops(CompilationUnit *cUnit)
2155{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2156 GrowableListIterator iter;
2157 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2158 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2159 (loop != NULL); loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2160 LOG(INFO) << "Loop head block id " << loop->header->id
2161 << ", offset 0x" << std::hex << loop->header->startOffset
2162 << ", Depth: " << loop->header->nestingDepth;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2163 GrowableListIterator iter;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2164 oatGrowableListIteratorInit(&loop->incomingBackEdges, &iter);
2165 BasicBlock* edgeBB;
2166 for (edgeBB = (BasicBlock*)oatGrowableListIteratorNext(&iter); edgeBB;
2167 edgeBB = (BasicBlock*)oatGrowableListIteratorNext(&iter)) {
2168 LOG(INFO) << " Backedge block id " << edgeBB->id
2169 << ", offset 0x" << std::hex << edgeBB->startOffset;
2170 ArenaBitVectorIterator bIter;
2171 oatBitVectorIteratorInit(loop->blocks, &bIter);
2172 for (int bbId = oatBitVectorIteratorNext(&bIter); bbId != -1;
2173 bbId = oatBitVectorIteratorNext(&bIter)) {
2174 BasicBlock *bb;
2175 bb = (BasicBlock*)
2176 oatGrowableListGetElement(&cUnit->blockList, bbId);
2177 LOG(INFO) << " (" << bb->id << ", 0x" << std::hex
2178 << bb->startOffset << ")";
2179 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2180 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2181 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2182}
2183
2184void oatMethodLoopDetection(CompilationUnit *cUnit)
2185{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2186 if (cUnit->disableOpt & (1 << kPromoteRegs)) {
2187 return;
2188 }
2189 oatInitGrowableList(cUnit, &cUnit->loopHeaders, 6, kListMisc);
2190 // Find the loop headers
2191 oatDataFlowAnalysisDispatcher(cUnit, findBackEdges,
2192 kAllNodes, false /* isIterative */);
2193 GrowableListIterator iter;
2194 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2195 // Add blocks to each header
2196 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2197 loop; loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2198 loop->blocks = oatAllocBitVector(cUnit, cUnit->numBlocks, true,
2199 kBitMapMisc);
2200 oatSetBit(cUnit, loop->blocks, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2201 GrowableListIterator iter;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2202 oatGrowableListIteratorInit(&loop->incomingBackEdges, &iter);
2203 BasicBlock* edgeBB;
2204 for (edgeBB = (BasicBlock*)oatGrowableListIteratorNext(&iter); edgeBB;
2205 edgeBB = (BasicBlock*)oatGrowableListIteratorNext(&iter)) {
2206 addBlocksToLoop(cUnit, loop->blocks, edgeBB, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2207 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2208 }
2209 // Compute the nesting depth of each header
2210 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2211 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2212 loop; loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2213 GrowableListIterator iter2;
2214 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter2);
2215 LoopInfo* loop2;
2216 for (loop2 = (LoopInfo*)oatGrowableListIteratorNext(&iter2);
2217 loop2; loop2 = (LoopInfo*)oatGrowableListIteratorNext(&iter2)) {
2218 if (oatIsBitSet(loop2->blocks, loop->header->id)) {
2219 loop->header->nestingDepth++;
2220 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2221 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2222 }
2223 // Assign nesting depth to each block in all loops
2224 oatGrowableListIteratorInit(&cUnit->loopHeaders, &iter);
2225 for (LoopInfo* loop = (LoopInfo*)oatGrowableListIteratorNext(&iter);
2226 (loop != NULL); loop = (LoopInfo*)oatGrowableListIteratorNext(&iter)) {
2227 ArenaBitVectorIterator bIter;
2228 oatBitVectorIteratorInit(loop->blocks, &bIter);
2229 for (int bbId = oatBitVectorIteratorNext(&bIter); bbId != -1;
2230 bbId = oatBitVectorIteratorNext(&bIter)) {
2231 BasicBlock *bb;
2232 bb = (BasicBlock*) oatGrowableListGetElement(&cUnit->blockList, bbId);
2233 bb->nestingDepth = std::max(bb->nestingDepth,
2234 loop->header->nestingDepth);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2235 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2236 }
2237 if (cUnit->printMe) {
2238 oatDumpLoops(cUnit);
2239 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2240}
2241
2242/*
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2243 * This function will make a best guess at whether the invoke will
2244 * end up using Method*. It isn't critical to get it exactly right,
2245 * and attempting to do would involve more complexity than it's
2246 * worth.
2247 */
2248bool invokeUsesMethodStar(CompilationUnit* cUnit, MIR* mir)
2249{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2250 InvokeType type;
2251 Instruction::Code opcode = mir->dalvikInsn.opcode;
2252 switch (opcode) {
2253 case Instruction::INVOKE_STATIC:
2254 case Instruction::INVOKE_STATIC_RANGE:
2255 type = kStatic;
2256 break;
2257 case Instruction::INVOKE_DIRECT:
2258 case Instruction::INVOKE_DIRECT_RANGE:
2259 type = kDirect;
2260 break;
2261 case Instruction::INVOKE_VIRTUAL:
2262 case Instruction::INVOKE_VIRTUAL_RANGE:
2263 type = kVirtual;
2264 break;
2265 case Instruction::INVOKE_INTERFACE:
2266 case Instruction::INVOKE_INTERFACE_RANGE:
2267 return false;
2268 case Instruction::INVOKE_SUPER_RANGE:
2269 case Instruction::INVOKE_SUPER:
2270 type = kSuper;
2271 break;
2272 default:
2273 LOG(WARNING) << "Unexpected invoke op: " << (int)opcode;
2274 return false;
2275 }
2276 OatCompilationUnit mUnit(cUnit->class_loader, cUnit->class_linker,
2277 *cUnit->dex_file, *cUnit->dex_cache,
2278 cUnit->code_item, cUnit->method_idx,
2279 cUnit->access_flags);
2280 // TODO: add a flag so we don't counts the stats for this twice
2281 uint32_t dexMethodIdx = mir->dalvikInsn.vB;
2282 int vtableIdx;
2283 uintptr_t directCode;
2284 uintptr_t directMethod;
2285 bool fastPath =
2286 cUnit->compiler->ComputeInvokeInfo(dexMethodIdx, &mUnit, type,
2287 vtableIdx, directCode,
2288 directMethod) &&
2289 !SLOW_INVOKE_PATH;
2290 return (((type == kDirect) || (type == kStatic)) &&
2291 fastPath && ((directCode == 0) || (directMethod == 0)));
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2292}
2293
2294/*
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2295 * Count uses, weighting by loop nesting depth. This code only
2296 * counts explicitly used sRegs. A later phase will add implicit
2297 * counts for things such as Method*, null-checked references, etc.
2298 */
2299bool countUses(struct CompilationUnit* cUnit, struct BasicBlock* bb)
2300{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2301 if (bb->blockType != kDalvikByteCode) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2302 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2303 }
2304 for (MIR* mir = bb->firstMIRInsn; (mir != NULL); mir = mir->next) {
2305 if (mir->ssaRep == NULL) {
2306 continue;
2307 }
2308 uint32_t weight = std::min(16U, (uint32_t)bb->nestingDepth);
2309 for (int i = 0; i < mir->ssaRep->numUses; i++) {
2310 int sReg = mir->ssaRep->uses[i];
2311 DCHECK_LT(sReg, (int)cUnit->useCounts.numUsed);
2312 cUnit->rawUseCounts.elemList[sReg]++;
2313 cUnit->useCounts.elemList[sReg] += (1 << weight);
2314 }
2315 if (!(cUnit->disableOpt & (1 << kPromoteCompilerTemps))) {
2316 int dfAttributes = oatDataFlowAttributes[mir->dalvikInsn.opcode];
2317 // Implicit use of Method* ? */
2318 if (dfAttributes & DF_UMS) {
2319 /*
2320 * Some invokes will not use Method* - need to perform test similar
2321 * to that found in genInvoke() to decide whether to count refs
2322 * for Method* on invoke-class opcodes.
2323 * TODO: refactor for common test here, save results for genInvoke
2324 */
2325 int usesMethodStar = true;
2326 if ((dfAttributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) &&
2327 !(dfAttributes & DF_NON_NULL_RET)) {
2328 usesMethodStar &= invokeUsesMethodStar(cUnit, mir);
2329 }
2330 if (usesMethodStar) {
2331 cUnit->rawUseCounts.elemList[cUnit->methodSReg]++;
2332 cUnit->useCounts.elemList[cUnit->methodSReg] += (1 << weight);
2333 }
2334 }
2335 }
2336 }
2337 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2338}
2339
2340void oatMethodUseCount(CompilationUnit *cUnit)
2341{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2342 oatInitGrowableList(cUnit, &cUnit->useCounts, cUnit->numSSARegs + 32,
2343 kListMisc);
2344 oatInitGrowableList(cUnit, &cUnit->rawUseCounts, cUnit->numSSARegs + 32,
2345 kListMisc);
2346 // Initialize list
2347 for (int i = 0; i < cUnit->numSSARegs; i++) {
2348 oatInsertGrowableList(cUnit, &cUnit->useCounts, 0);
2349 oatInsertGrowableList(cUnit, &cUnit->rawUseCounts, 0);
2350 }
2351 if (cUnit->disableOpt & (1 << kPromoteRegs)) {
2352 return;
2353 }
2354 oatDataFlowAnalysisDispatcher(cUnit, countUses,
2355 kAllNodes, false /* isIterative */);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2356}
2357
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2358} // namespace art