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review.blissroms.org / platform_art / a169e1d8d968800380245cda450505d969ebff76 / . / src / compiler / dataflow.cc
blob: 22135b1990cf78fc8f4616427767ae0489fe383e [file] [log] [blame]
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
buzbeeeaf09bc2012-11-15 14:51:41 -0800[diff] [blame]17#include "compiler_internals.h"
buzbeeefc63692012-11-14 16:31:52 -0800[diff] [blame]18#include "dataflow.h"
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]19
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]20namespace art {
21
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]22/*
23 * Main table containing data flow attributes for each bytecode. The
24 * first kNumPackedOpcodes entries are for Dalvik bytecode
25 * instructions, where extended opcode at the MIR level are appended
26 * afterwards.
27 *
28 * TODO - many optimization flags are incomplete - they will only limit the
29 * scope of optimizations but will not cause mis-optimizations.
30 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]31const int oat_data_flow_attributes[kMirOpLast] = {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]32 // 00 NOP
33 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]34
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]35 // 01 MOVE vA, vB
36 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]37
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]38 // 02 MOVE_FROM16 vAA, vBBBB
39 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]40
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]41 // 03 MOVE_16 vAAAA, vBBBB
42 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]43
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]44 // 04 MOVE_WIDE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]45 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]46
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]47 // 05 MOVE_WIDE_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]48 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]49
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]50 // 06 MOVE_WIDE_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]51 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]52
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]53 // 07 MOVE_OBJECT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]54 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]55
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]56 // 08 MOVE_OBJECT_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]57 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]58
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]59 // 09 MOVE_OBJECT_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]60 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]61
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]62 // 0A MOVE_RESULT vAA
63 DF_DA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]64
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]65 // 0B MOVE_RESULT_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]66 DF_DA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]67
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]68 // 0C MOVE_RESULT_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]69 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]70
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]71 // 0D MOVE_EXCEPTION vAA
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]72 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]73
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]74 // 0E RETURN_VOID
75 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]76
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]77 // 0F RETURN vAA
78 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]79
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]80 // 10 RETURN_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]81 DF_UA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]82
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]83 // 11 RETURN_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]84 DF_UA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]85
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]86 // 12 CONST_4 vA, #+B
87 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]88
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]89 // 13 CONST_16 vAA, #+BBBB
90 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]91
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]92 // 14 CONST vAA, #+BBBBBBBB
93 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]94
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]95 // 15 CONST_HIGH16 VAA, #+BBBB0000
96 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]97
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]98 // 16 CONST_WIDE_16 vAA, #+BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]99 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]100
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]101 // 17 CONST_WIDE_32 vAA, #+BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]102 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]103
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]104 // 18 CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]105 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]106
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]107 // 19 CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]108 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]109
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]110 // 1A CONST_STRING vAA, string@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]111 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]112
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]113 // 1B CONST_STRING_JUMBO vAA, string@BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]114 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]115
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]116 // 1C CONST_CLASS vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]117 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]118
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]119 // 1D MONITOR_ENTER vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]120 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]121
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]122 // 1E MONITOR_EXIT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]123 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]124
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]125 // 1F CHK_CAST vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]126 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]127
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]128 // 20 INSTANCE_OF vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]129 DF_DA | DF_UB | DF_CORE_A | DF_REF_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]130
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]131 // 21 ARRAY_LENGTH vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]132 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_CORE_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]133
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]134 // 22 NEW_INSTANCE vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]135 DF_DA | DF_NON_NULL_DST | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]136
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]137 // 23 NEW_ARRAY vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]138 DF_DA | DF_UB | DF_NON_NULL_DST | DF_REF_A | DF_CORE_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]139
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]140 // 24 FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
141 DF_FORMAT_35C | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]142
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]143 // 25 FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
144 DF_FORMAT_3RC | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]145
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]146 // 26 FILL_ARRAY_DATA vAA, +BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]147 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]148
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]149 // 27 THROW vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]150 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]151
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]152 // 28 GOTO
153 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]154
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]155 // 29 GOTO_16
156 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]157
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]158 // 2A GOTO_32
159 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]160
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]161 // 2B PACKED_SWITCH vAA, +BBBBBBBB
162 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]163
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]164 // 2C SPARSE_SWITCH vAA, +BBBBBBBB
165 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]166
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]167 // 2D CMPL_FLOAT vAA, vBB, vCC
168 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]169
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]170 // 2E CMPG_FLOAT vAA, vBB, vCC
171 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]172
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]173 // 2F CMPL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]174 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]175
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]176 // 30 CMPG_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]177 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]178
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]179 // 31 CMP_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]180 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]181
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]182 // 32 IF_EQ vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]183 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]184
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]185 // 33 IF_NE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]186 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]187
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]188 // 34 IF_LT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]189 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]190
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]191 // 35 IF_GE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]192 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]193
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]194 // 36 IF_GT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]195 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]196
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]197 // 37 IF_LE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]198 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]199
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]200 // 38 IF_EQZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]201 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]202
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]203 // 39 IF_NEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]204 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]205
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]206 // 3A IF_LTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]207 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]208
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]209 // 3B IF_GEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]210 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]211
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]212 // 3C IF_GTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]213 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]214
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]215 // 3D IF_LEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]216 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]217
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]218 // 3E UNUSED_3E
219 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]220
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]221 // 3F UNUSED_3F
222 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]223
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]224 // 40 UNUSED_40
225 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]226
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]227 // 41 UNUSED_41
228 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]229
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]230 // 42 UNUSED_42
231 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]232
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]233 // 43 UNUSED_43
234 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]235
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]236 // 44 AGET vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]237 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]238
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]239 // 45 AGET_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]240 DF_DA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]241
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]242 // 46 AGET_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]243 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]244
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]245 // 47 AGET_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]246 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]247
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]248 // 48 AGET_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]249 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]250
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]251 // 49 AGET_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]252 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]253
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]254 // 4A AGET_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]255 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]256
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]257 // 4B APUT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]258 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]259
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]260 // 4C APUT_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]261 DF_UA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_2 | DF_RANGE_CHK_3 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]262
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]263 // 4D APUT_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]264 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]265
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]266 // 4E APUT_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]267 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]268
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]269 // 4F APUT_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]270 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]271
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]272 // 50 APUT_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]273 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]274
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]275 // 51 APUT_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]276 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]277
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]278 // 52 IGET vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]279 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]280
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]281 // 53 IGET_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]282 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]283
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]284 // 54 IGET_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]285 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]286
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]287 // 55 IGET_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]288 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]289
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]290 // 56 IGET_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]291 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]292
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]293 // 57 IGET_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]294 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]295
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]296 // 58 IGET_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]297 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]298
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]299 // 59 IPUT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]300 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]301
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]302 // 5A IPUT_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]303 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]304
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]305 // 5B IPUT_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]306 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]307
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]308 // 5C IPUT_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]309 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]310
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]311 // 5D IPUT_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]312 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]313
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]314 // 5E IPUT_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]315 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]316
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]317 // 5F IPUT_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]318 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]319
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]320 // 60 SGET vAA, field@BBBB
321 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]322
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]323 // 61 SGET_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]324 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]325
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]326 // 62 SGET_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]327 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]328
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]329 // 63 SGET_BOOLEAN vAA, field@BBBB
330 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]331
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]332 // 64 SGET_BYTE vAA, field@BBBB
333 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]334
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]335 // 65 SGET_CHAR vAA, field@BBBB
336 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]337
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]338 // 66 SGET_SHORT vAA, field@BBBB
339 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]340
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]341 // 67 SPUT vAA, field@BBBB
342 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]343
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]344 // 68 SPUT_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]345 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]346
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]347 // 69 SPUT_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]348 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]349
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]350 // 6A SPUT_BOOLEAN vAA, field@BBBB
351 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]352
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]353 // 6B SPUT_BYTE vAA, field@BBBB
354 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]355
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]356 // 6C SPUT_CHAR vAA, field@BBBB
357 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]358
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]359 // 6D SPUT_SHORT vAA, field@BBBB
360 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]361
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]362 // 6E INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
363 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]364
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]365 // 6F INVOKE_SUPER {vD, vE, vF, vG, vA}
366 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]367
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]368 // 70 INVOKE_DIRECT {vD, vE, vF, vG, vA}
369 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]370
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]371 // 71 INVOKE_STATIC {vD, vE, vF, vG, vA}
372 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]373
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]374 // 72 INVOKE_INTERFACE {vD, vE, vF, vG, vA}
375 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]376
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]377 // 73 UNUSED_73
378 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]379
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]380 // 74 INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
381 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]382
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]383 // 75 INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
384 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]385
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]386 // 76 INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
387 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]388
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]389 // 77 INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
390 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]391
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]392 // 78 INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
393 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]394
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]395 // 79 UNUSED_79
396 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]397
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]398 // 7A UNUSED_7A
399 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]400
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]401 // 7B NEG_INT vA, vB
402 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]403
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]404 // 7C NOT_INT vA, vB
405 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]406
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]407 // 7D NEG_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]408 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]409
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]410 // 7E NOT_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]411 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]412
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]413 // 7F NEG_FLOAT vA, vB
414 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]415
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]416 // 80 NEG_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]417 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]418
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]419 // 81 INT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]420 DF_DA | DF_A_WIDE | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]421
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]422 // 82 INT_TO_FLOAT vA, vB
423 DF_DA | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]424
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]425 // 83 INT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]426 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]427
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]428 // 84 LONG_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]429 DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]430
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]431 // 85 LONG_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]432 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]433
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]434 // 86 LONG_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]435 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]436
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]437 // 87 FLOAT_TO_INT vA, vB
438 DF_DA | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]439
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]440 // 88 FLOAT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]441 DF_DA | DF_A_WIDE | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]442
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]443 // 89 FLOAT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]444 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]445
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]446 // 8A DOUBLE_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]447 DF_DA | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]448
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]449 // 8B DOUBLE_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]450 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]451
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]452 // 8C DOUBLE_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]453 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]454
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]455 // 8D INT_TO_BYTE vA, vB
456 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]457
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]458 // 8E INT_TO_CHAR vA, vB
459 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]460
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]461 // 8F INT_TO_SHORT vA, vB
462 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]463
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]464 // 90 ADD_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]465 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]466
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]467 // 91 SUB_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]468 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]469
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]470 // 92 MUL_INT vAA, vBB, vCC
471 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]472
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]473 // 93 DIV_INT vAA, vBB, vCC
474 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]475
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]476 // 94 REM_INT vAA, vBB, vCC
477 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]478
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]479 // 95 AND_INT vAA, vBB, vCC
480 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]481
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]482 // 96 OR_INT vAA, vBB, vCC
483 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]484
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]485 // 97 XOR_INT vAA, vBB, vCC
486 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]487
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]488 // 98 SHL_INT vAA, vBB, vCC
489 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]490
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]491 // 99 SHR_INT vAA, vBB, vCC
492 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]493
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]494 // 9A USHR_INT vAA, vBB, vCC
495 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]496
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]497 // 9B ADD_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]498 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]499
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]500 // 9C SUB_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]501 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]502
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]503 // 9D MUL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]504 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]505
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]506 // 9E DIV_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]507 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]508
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]509 // 9F REM_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]510 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]511
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]512 // A0 AND_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]513 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]514
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]515 // A1 OR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]516 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]517
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]518 // A2 XOR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]519 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]520
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]521 // A3 SHL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]522 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]523
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]524 // A4 SHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]525 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]526
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]527 // A5 USHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]528 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]529
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]530 // A6 ADD_FLOAT vAA, vBB, vCC
531 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]532
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]533 // A7 SUB_FLOAT vAA, vBB, vCC
534 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]535
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]536 // A8 MUL_FLOAT vAA, vBB, vCC
537 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]538
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]539 // A9 DIV_FLOAT vAA, vBB, vCC
540 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]541
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]542 // AA REM_FLOAT vAA, vBB, vCC
543 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]544
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]545 // AB ADD_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]546 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]547
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]548 // AC SUB_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]549 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]550
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]551 // AD MUL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]552 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]553
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]554 // AE DIV_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]555 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]556
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]557 // AF REM_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]558 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]559
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]560 // B0 ADD_INT_2ADDR vA, vB
561 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]562
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]563 // B1 SUB_INT_2ADDR vA, vB
564 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]565
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]566 // B2 MUL_INT_2ADDR vA, vB
567 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]568
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]569 // B3 DIV_INT_2ADDR vA, vB
570 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]571
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]572 // B4 REM_INT_2ADDR vA, vB
573 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]574
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]575 // B5 AND_INT_2ADDR vA, vB
576 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]577
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]578 // B6 OR_INT_2ADDR vA, vB
579 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]580
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]581 // B7 XOR_INT_2ADDR vA, vB
582 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]583
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]584 // B8 SHL_INT_2ADDR vA, vB
585 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]586
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]587 // B9 SHR_INT_2ADDR vA, vB
588 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]589
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]590 // BA USHR_INT_2ADDR vA, vB
591 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]592
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]593 // BB ADD_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]594 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]595
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]596 // BC SUB_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]597 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]598
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]599 // BD MUL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]600 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]601
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]602 // BE DIV_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]603 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]604
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]605 // BF REM_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]606 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]607
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]608 // C0 AND_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]609 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]610
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]611 // C1 OR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]612 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]613
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]614 // C2 XOR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]615 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]616
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]617 // C3 SHL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]618 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]619
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]620 // C4 SHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]621 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]622
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]623 // C5 USHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]624 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]625
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]626 // C6 ADD_FLOAT_2ADDR vA, vB
627 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]628
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]629 // C7 SUB_FLOAT_2ADDR vA, vB
630 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]631
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]632 // C8 MUL_FLOAT_2ADDR vA, vB
633 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]634
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]635 // C9 DIV_FLOAT_2ADDR vA, vB
636 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]637
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]638 // CA REM_FLOAT_2ADDR vA, vB
639 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]640
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]641 // CB ADD_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]642 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]643
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]644 // CC SUB_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]645 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]646
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]647 // CD MUL_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]648 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]649
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]650 // CE DIV_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]651 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]652
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]653 // CF REM_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]654 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]655
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]656 // D0 ADD_INT_LIT16 vA, vB, #+CCCC
657 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]658
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]659 // D1 RSUB_INT vA, vB, #+CCCC
660 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]661
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]662 // D2 MUL_INT_LIT16 vA, vB, #+CCCC
663 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]664
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]665 // D3 DIV_INT_LIT16 vA, vB, #+CCCC
666 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]667
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]668 // D4 REM_INT_LIT16 vA, vB, #+CCCC
669 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]670
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]671 // D5 AND_INT_LIT16 vA, vB, #+CCCC
672 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]673
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]674 // D6 OR_INT_LIT16 vA, vB, #+CCCC
675 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]676
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]677 // D7 XOR_INT_LIT16 vA, vB, #+CCCC
678 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]679
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]680 // D8 ADD_INT_LIT8 vAA, vBB, #+CC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]681 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]682
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]683 // D9 RSUB_INT_LIT8 vAA, vBB, #+CC
684 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]685
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]686 // DA MUL_INT_LIT8 vAA, vBB, #+CC
687 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]688
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]689 // DB DIV_INT_LIT8 vAA, vBB, #+CC
690 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]691
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]692 // DC REM_INT_LIT8 vAA, vBB, #+CC
693 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]694
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]695 // DD AND_INT_LIT8 vAA, vBB, #+CC
696 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]697
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]698 // DE OR_INT_LIT8 vAA, vBB, #+CC
699 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]700
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]701 // DF XOR_INT_LIT8 vAA, vBB, #+CC
702 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]703
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]704 // E0 SHL_INT_LIT8 vAA, vBB, #+CC
705 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]706
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]707 // E1 SHR_INT_LIT8 vAA, vBB, #+CC
708 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]709
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]710 // E2 USHR_INT_LIT8 vAA, vBB, #+CC
711 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]712
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]713 // E3 IGET_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]714 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]715
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]716 // E4 IPUT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]717 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]718
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]719 // E5 SGET_VOLATILE
720 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]721
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]722 // E6 SPUT_VOLATILE
723 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]724
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]725 // E7 IGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]726 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]727
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]728 // E8 IGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]729 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]730
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]731 // E9 IPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]732 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]733
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]734 // EA SGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]735 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]736
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]737 // EB SPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]738 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]739
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]740 // EC BREAKPOINT
741 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]742
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]743 // ED THROW_VERIFICATION_ERROR
744 DF_NOP | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]745
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]746 // EE EXECUTE_INLINE
747 DF_FORMAT_35C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]748
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]749 // EF EXECUTE_INLINE_RANGE
750 DF_FORMAT_3RC,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]751
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]752 // F0 INVOKE_OBJECT_INIT_RANGE
753 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]754
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]755 // F1 RETURN_VOID_BARRIER
756 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]757
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]758 // F2 IGET_QUICK
759 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]760
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]761 // F3 IGET_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]762 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]763
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]764 // F4 IGET_OBJECT_QUICK
765 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]766
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]767 // F5 IPUT_QUICK
768 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]769
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]770 // F6 IPUT_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]771 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]772
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]773 // F7 IPUT_OBJECT_QUICK
774 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]775
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]776 // F8 INVOKE_VIRTUAL_QUICK
777 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]778
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]779 // F9 INVOKE_VIRTUAL_QUICK_RANGE
780 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]781
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]782 // FA INVOKE_SUPER_QUICK
783 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]784
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]785 // FB INVOKE_SUPER_QUICK_RANGE
786 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]787
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]788 // FC IPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]789 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]790
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]791 // FD SGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]792 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]793
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]794 // FE SPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]795 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]796
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]797 // FF UNUSED_FF
798 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]799
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]800 // Beginning of extended MIR opcodes
801 // 100 MIR_PHI
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]802 DF_DA | DF_NULL_TRANSFER_N,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]803
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]804 // 101 MIR_COPY
805 DF_DA | DF_UB | DF_IS_MOVE,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]806
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]807 // 102 MIR_FUSED_CMPL_FLOAT
808 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]809
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]810 // 103 MIR_FUSED_CMPG_FLOAT
811 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]812
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]813 // 104 MIR_FUSED_CMPL_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]814 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]815
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]816 // 105 MIR_FUSED_CMPG_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]817 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]818
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]819 // 106 MIR_FUSED_CMP_LONG
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]820 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]821
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]822 // 107 MIR_NOP
823 DF_NOP,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]824
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]825 // 108 MIR_NULL_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]826 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]827
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]828 // 109 MIR_RANGE_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]829 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]830
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]831 // 110 MIR_DIV_ZERO_CHECK
832 0,
833
834 // 111 MIR_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]835 0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]836};
837
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]838/* Return the base virtual register for a SSA name */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]839int SRegToVReg(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]840{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]841 DCHECK_LT(ssa_reg, static_cast<int>(cu->ssa_base_vregs->num_used));
842 return GET_ELEM_N(cu->ssa_base_vregs, int, ssa_reg);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]843}
844
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]845int SRegToSubscript(const CompilationUnit* cu, int ssa_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]846{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]847 DCHECK(ssa_reg < static_cast<int>(cu->ssa_subscripts->num_used));
848 return GET_ELEM_N(cu->ssa_subscripts, int, ssa_reg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]849}
850
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]851static int GetSSAUseCount(CompilationUnit* cu, int s_reg)
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]852{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]853 DCHECK(s_reg < static_cast<int>(cu->raw_use_counts.num_used));
854 return cu->raw_use_counts.elem_list[s_reg];
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]855}
856
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]857static std::string GetSSAName(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]858{
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]859 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
860}
861
862// Similar to GetSSAName, but if ssa name represents an immediate show that as well.
863static std::string GetSSANameWithConst(const CompilationUnit* cu, int ssa_reg, bool singles_only)
864{
865 if (cu->reg_location[ssa_reg].is_const) {
866 if (!singles_only && cu->reg_location[ssa_reg].wide) {
867 int64_t immval = cu->constant_values[ssa_reg + 1];
868 immval = (immval << 32) | cu->constant_values[ssa_reg];
869 return StringPrintf("v%d_%d#0x%llx", SRegToVReg(cu, ssa_reg),
870 SRegToSubscript(cu, ssa_reg), immval);
871 } else {
872 int32_t immval = cu->constant_values[ssa_reg];
873 return StringPrintf("v%d_%d#0x%x", SRegToVReg(cu, ssa_reg),
874 SRegToSubscript(cu, ssa_reg), immval);
875 }
876 } else {
877 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
878 }
879}
880
881
882char* GetDalvikDisassembly(CompilationUnit* cu, const MIR* mir)
883{
884 DecodedInstruction insn = mir->dalvikInsn;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]885 std::string str;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]886 int flags = 0;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]887 int opcode = insn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]888 char* ret;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]889 bool nop = false;
890 SSARepresentation* ssa_rep = mir->ssa_rep;
891 Instruction::Format dalvik_format = Instruction::k10x; // Default to no-operand format
892 int defs = (ssa_rep != NULL) ? ssa_rep->num_defs : 0;
893 int uses = (ssa_rep != NULL) ? ssa_rep->num_uses : 0;
894
895 // Handle special cases.
896 if ((opcode == kMirOpCheck) || (opcode == kMirOpCheckPart2)) {
897 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
898 str.append(": ");
899 // Recover the original Dex instruction
900 insn = mir->meta.throw_insn->dalvikInsn;
901 ssa_rep = mir->meta.throw_insn->ssa_rep;
902 defs = ssa_rep->num_defs;
903 uses = ssa_rep->num_uses;
904 opcode = insn.opcode;
905 } else if (opcode == kMirOpNop) {
906 str.append("[");
907 insn.opcode = mir->meta.original_opcode;
908 opcode = mir->meta.original_opcode;
909 nop = true;
910 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]911
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]912 if (opcode >= kMirOpFirst) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]913 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]914 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]915 dalvik_format = Instruction::FormatOf(insn.opcode);
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]916 flags = Instruction::FlagsOf(insn.opcode);
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]917 str.append(Instruction::Name(insn.opcode));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]918 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]919
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]920 if (opcode == kMirOpPhi) {
921 int* incoming = reinterpret_cast<int*>(insn.vB);
922 str.append(StringPrintf(" %s = (%s",
923 GetSSANameWithConst(cu, ssa_rep->defs[0], true).c_str(),
924 GetSSANameWithConst(cu, ssa_rep->uses[0], true).c_str()));
925 str.append(StringPrintf(":%d",incoming[0]));
926 int i;
927 for (i = 1; i < uses; i++) {
928 str.append(StringPrintf(", %s:%d",
929 GetSSANameWithConst(cu, ssa_rep->uses[i], true).c_str(),
930 incoming[i]));
931 }
932 str.append(")");
933 } else if (flags & Instruction::kBranch) {
934 // For branches, decode the instructions to print out the branch targets.
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]935 int offset = 0;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]936 switch (dalvik_format) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]937 case Instruction::k21t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]938 str.append(StringPrintf(" %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]939 offset = insn.vB;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]940 break;
941 case Instruction::k22t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]942 str.append(StringPrintf(" %s, %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str(),
943 GetSSANameWithConst(cu, ssa_rep->uses[cu->reg_location[ssa_rep->uses[0]].wide
944 ? 2 : 1], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]945 offset = insn.vC;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]946 break;
947 case Instruction::k10t:
948 case Instruction::k20t:
949 case Instruction::k30t:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]950 offset = insn.vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]951 break;
952 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]953 LOG(FATAL) << "Unexpected branch format " << dalvik_format << " from " << insn.opcode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]954 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]955 str.append(StringPrintf(" 0x%x (%c%x)", mir->offset + offset,
956 offset > 0 ? '+' : '-', offset > 0 ? offset : -offset));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]957 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]958 // For invokes-style formats, treat wide regs as a pair of singles
959 bool show_singles = ((dalvik_format == Instruction::k35c) ||
960 (dalvik_format == Instruction::k3rc));
961 if (defs != 0) {
962 str.append(StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->defs[0], false).c_str()));
963 if (uses != 0) {
964 str.append(", ");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]965 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]966 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]967 for (int i = 0; i < uses; i++) {
968 str.append(
969 StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->uses[i], show_singles).c_str()));
970 if (!show_singles && cu->reg_location[i].wide) {
971 // For the listing, skip the high sreg.
972 i++;
973 }
974 if (i != (uses -1)) {
975 str.append(",");
976 }
977 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]978 switch (dalvik_format) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]979 case Instruction::k11n: // Add one immediate from vB
980 case Instruction::k21s:
981 case Instruction::k31i:
982 case Instruction::k21h:
983 str.append(StringPrintf(", #%d", insn.vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]984 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]985 case Instruction::k51l: // Add one wide immediate
986 str.append(StringPrintf(", #%lld", insn.vB_wide));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]987 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]988 case Instruction::k21c: // One register, one string/type/method index
989 case Instruction::k31c:
990 str.append(StringPrintf(", index #%d", insn.vB));
991 break;
992 case Instruction::k22c: // Two registers, one string/type/method index
993 str.append(StringPrintf(", index #%d", insn.vC));
994 break;
995 case Instruction::k22s: // Add one immediate from vC
996 case Instruction::k22b:
997 str.append(StringPrintf(", #%d", insn.vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]998 break;
999 default:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]1000 ; // Nothing left to print
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1001 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1002 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame^]1003 if (nop) {
1004 str.append("]--optimized away");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1005 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1006 int length = str.length() + 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1007 ret = static_cast<char*>(NewMem(cu, length, false, kAllocDFInfo));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1008 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1009 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1010}
1011
1012/* Any register that is used before being defined is considered live-in */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1013static void HandleLiveInUse(CompilationUnit* cu, ArenaBitVector* use_v, ArenaBitVector* def_v,
1014 ArenaBitVector* live_in_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1015{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1016 SetBit(cu, use_v, dalvik_reg_id);
1017 if (!IsBitSet(def_v, dalvik_reg_id)) {
1018 SetBit(cu, live_in_v, dalvik_reg_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1019 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1020}
1021
1022/* Mark a reg as being defined */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1023static void HandleDef(CompilationUnit* cu, ArenaBitVector* def_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1024{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1025 SetBit(cu, def_v, dalvik_reg_id);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1026}
1027
1028/*
1029 * Find out live-in variables for natural loops. Variables that are live-in in
1030 * the main loop body are considered to be defined in the entry block.
1031 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1032bool FindLocalLiveIn(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1033{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1034 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1035 ArenaBitVector *use_v, *def_v, *live_in_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1036
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1037 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1038
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1039 use_v = bb->data_flow_info->use_v =
1040 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapUse);
1041 def_v = bb->data_flow_info->def_v =
1042 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapDef);
1043 live_in_v = bb->data_flow_info->live_in_v =
1044 AllocBitVector(cu, cu->num_dalvik_registers, false,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1045 kBitMapLiveIn);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1046
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1047 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1048 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1049 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1050
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1051 if (df_attributes & DF_HAS_USES) {
1052 if (df_attributes & DF_UA) {
1053 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA);
1054 if (df_attributes & DF_A_WIDE) {
1055 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1056 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1057 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1058 if (df_attributes & DF_UB) {
1059 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB);
1060 if (df_attributes & DF_B_WIDE) {
1061 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1062 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1063 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1064 if (df_attributes & DF_UC) {
1065 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC);
1066 if (df_attributes & DF_C_WIDE) {
1067 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1068 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1069 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1070 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1071 if (df_attributes & DF_FORMAT_35C) {
1072 for (unsigned int i = 0; i < d_insn->vA; i++) {
1073 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->arg[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1074 }
1075 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1076 if (df_attributes & DF_FORMAT_3RC) {
1077 for (unsigned int i = 0; i < d_insn->vA; i++) {
1078 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1079 }
1080 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1081 if (df_attributes & DF_HAS_DEFS) {
1082 HandleDef(cu, def_v, d_insn->vA);
1083 if (df_attributes & DF_A_WIDE) {
1084 HandleDef(cu, def_v, d_insn->vA+1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1085 }
1086 }
1087 }
1088 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1089}
1090
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1091static int AddNewSReg(CompilationUnit* cu, int v_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1092{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1093 // Compiler temps always have a subscript of 0
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1094 int subscript = (v_reg < 0) ? 0 : ++cu->ssa_last_defs[v_reg];
1095 int ssa_reg = cu->num_ssa_regs++;
1096 InsertGrowableList(cu, cu->ssa_base_vregs, v_reg);
1097 InsertGrowableList(cu, cu->ssa_subscripts, subscript);
1098 std::string ssa_name = GetSSAName(cu, ssa_reg);
1099 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, false, kAllocDFInfo));
1100 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1101 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
1102 DCHECK_EQ(cu->ssa_base_vregs->num_used, cu->ssa_subscripts->num_used);
1103 return ssa_reg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1104}
1105
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1106/* Find out the latest SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1107static void HandleSSAUse(CompilationUnit* cu, int* uses, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1108{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1109 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1110 uses[reg_index] = cu->vreg_to_ssa_map[dalvik_reg];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1111}
1112
1113/* Setup a new SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1114static void HandleSSADef(CompilationUnit* cu, int* defs, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1115{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1116 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1117 int ssa_reg = AddNewSReg(cu, dalvik_reg);
1118 cu->vreg_to_ssa_map[dalvik_reg] = ssa_reg;
1119 defs[reg_index] = ssa_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1120}
1121
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1122/* Look up new SSA names for format_35c instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1123static void DataFlowSSAFormat35C(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1124{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1125 DecodedInstruction *d_insn = &mir->dalvikInsn;
1126 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1127 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1128
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1129 mir->ssa_rep->num_uses = num_uses;
1130 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1131 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1132 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1133 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1134
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1135 for (i = 0; i < num_uses; i++) {
1136 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->arg[i], i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1137 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1138}
1139
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1140/* Look up new SSA names for format_3rc instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1141static void DataFlowSSAFormat3RC(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1142{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1143 DecodedInstruction *d_insn = &mir->dalvikInsn;
1144 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1145 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1146
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1147 mir->ssa_rep->num_uses = num_uses;
1148 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1149 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1150 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1151 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1152
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1153 for (i = 0; i < num_uses; i++) {
1154 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+i, i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1155 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1156}
1157
1158/* Entry function to convert a block into SSA representation */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1159bool DoSSAConversion(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1160{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1161 MIR* mir;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1162
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1163 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1164
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1165 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1166 mir->ssa_rep = static_cast<struct SSARepresentation *>(NewMem(cu, sizeof(SSARepresentation),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1167 true, kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1168
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1169 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1170
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1171 // If not a pseudo-op, note non-leaf or can throw
1172 if (static_cast<int>(mir->dalvikInsn.opcode) <
1173 static_cast<int>(kNumPackedOpcodes)) {
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]1174 int flags = Instruction::FlagsOf(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1175
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1176 if (flags & Instruction::kThrow) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1177 cu->attrs &= ~METHOD_IS_THROW_FREE;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1178 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1179
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1180 if (flags & Instruction::kInvoke) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1181 cu->attrs &= ~METHOD_IS_LEAF;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1182 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1183 }
1184
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1185 int num_uses = 0;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1186
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1187 if (df_attributes & DF_FORMAT_35C) {
1188 DataFlowSSAFormat35C(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1189 continue;
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1190 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1191
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1192 if (df_attributes & DF_FORMAT_3RC) {
1193 DataFlowSSAFormat3RC(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1194 continue;
1195 }
1196
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1197 if (df_attributes & DF_HAS_USES) {
1198 if (df_attributes & DF_UA) {
1199 num_uses++;
1200 if (df_attributes & DF_A_WIDE) {
1201 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1202 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1203 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1204 if (df_attributes & DF_UB) {
1205 num_uses++;
1206 if (df_attributes & DF_B_WIDE) {
1207 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1208 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1209 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1210 if (df_attributes & DF_UC) {
1211 num_uses++;
1212 if (df_attributes & DF_C_WIDE) {
1213 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1214 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1215 }
1216 }
1217
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1218 if (num_uses) {
1219 mir->ssa_rep->num_uses = num_uses;
1220 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1221 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1222 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1223 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1224 }
1225
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1226 int num_defs = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1227
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1228 if (df_attributes & DF_HAS_DEFS) {
1229 num_defs++;
1230 if (df_attributes & DF_A_WIDE) {
1231 num_defs++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1232 }
1233 }
1234
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1235 if (num_defs) {
1236 mir->ssa_rep->num_defs = num_defs;
1237 mir->ssa_rep->defs = static_cast<int*>(NewMem(cu, sizeof(int) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1238 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1239 mir->ssa_rep->fp_def = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1240 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1241 }
1242
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1243 DecodedInstruction *d_insn = &mir->dalvikInsn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1244
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1245 if (df_attributes & DF_HAS_USES) {
1246 num_uses = 0;
1247 if (df_attributes & DF_UA) {
1248 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1249 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA, num_uses++);
1250 if (df_attributes & DF_A_WIDE) {
1251 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1252 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1253 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1254 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1255 if (df_attributes & DF_UB) {
1256 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1257 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB, num_uses++);
1258 if (df_attributes & DF_B_WIDE) {
1259 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1260 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1261 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1262 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1263 if (df_attributes & DF_UC) {
1264 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1265 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC, num_uses++);
1266 if (df_attributes & DF_C_WIDE) {
1267 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1268 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1269 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1270 }
1271 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1272 if (df_attributes & DF_HAS_DEFS) {
1273 mir->ssa_rep->fp_def[0] = df_attributes & DF_FP_A;
1274 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA, 0);
1275 if (df_attributes & DF_A_WIDE) {
1276 mir->ssa_rep->fp_def[1] = df_attributes & DF_FP_A;
1277 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA+1, 1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1278 }
1279 }
1280 }
1281
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1282 if (!cu->disable_dataflow) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1283 /*
1284 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
1285 * input to PHI nodes can be derived from the snapshot of all
1286 * predecessor blocks.
1287 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1288 bb->data_flow_info->vreg_to_ssa_map =
1289 static_cast<int*>(NewMem(cu, sizeof(int) * cu->num_dalvik_registers, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1290 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1291
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1292 memcpy(bb->data_flow_info->vreg_to_ssa_map, cu->vreg_to_ssa_map,
1293 sizeof(int) * cu->num_dalvik_registers);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1294 }
1295 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1296}
1297
1298/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1299static void SetConstant(CompilationUnit* cu, int ssa_reg, int value)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1300{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1301 SetBit(cu, cu->is_constant_v, ssa_reg);
1302 cu->constant_values[ssa_reg] = value;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1303}
1304
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1305bool DoConstantPropogation(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1306{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1307 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1308 ArenaBitVector *is_constant_v = cu->is_constant_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1309
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1310 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1311 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1312
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1313 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1314
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1315 if (!(df_attributes & DF_HAS_DEFS)) continue;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1316
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1317 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1318 if (df_attributes & DF_SETS_CONST) {
1319 if (df_attributes & DF_DA) {
1320 switch (d_insn->opcode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1321 case Instruction::CONST_4:
1322 case Instruction::CONST_16:
1323 case Instruction::CONST:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1324 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1325 break;
1326 case Instruction::CONST_HIGH16:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1327 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB << 16);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1328 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1329 case Instruction::CONST_WIDE_16:
1330 case Instruction::CONST_WIDE_32:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1331 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB);
1332 SetConstant(cu, mir->ssa_rep->defs[1], 0);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1333 break;
1334 case Instruction::CONST_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1335 SetConstant(cu, mir->ssa_rep->defs[0], static_cast<int>(d_insn->vB_wide));
1336 SetConstant(cu, mir->ssa_rep->defs[1], static_cast<int>(d_insn->vB_wide >> 32));
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1337 break;
1338 case Instruction::CONST_WIDE_HIGH16:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1339 SetConstant(cu, mir->ssa_rep->defs[0], 0);
1340 SetConstant(cu, mir->ssa_rep->defs[1], d_insn->vB << 16);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1341 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1342 default:
1343 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1344 }
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1345 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1346 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1347 } else if (df_attributes & DF_IS_MOVE) {
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1348 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1349
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1350 for (i = 0; i < mir->ssa_rep->num_uses; i++) {
1351 if (!IsBitSet(is_constant_v, mir->ssa_rep->uses[i])) break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1352 }
1353 /* Move a register holding a constant to another register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1354 if (i == mir->ssa_rep->num_uses) {
1355 SetConstant(cu, mir->ssa_rep->defs[0],
1356 cu->constant_values[mir->ssa_rep->uses[0]]);
1357 if (df_attributes & DF_A_WIDE) {
1358 SetConstant(cu, mir->ssa_rep->defs[1],
1359 cu->constant_values[mir->ssa_rep->uses[1]]);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1360 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1361 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1362 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1363 }
1364 /* TODO: implement code to handle arithmetic operations */
1365 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1366}
1367
1368/* Setup the basic data structures for SSA conversion */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1369void CompilerInitializeSSAConversion(CompilationUnit* cu)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1370{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1371 int i;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1372 int num_dalvik_reg = cu->num_dalvik_registers;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1373
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1374 cu->ssa_base_vregs =
1375 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1376 cu->ssa_subscripts =
1377 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1378 cu->ssa_strings =
1379 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1380 // Create the ssa mappings, estimating the max size
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1381 CompilerInitGrowableList(cu, cu->ssa_base_vregs,
1382 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1383 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1384 CompilerInitGrowableList(cu, cu->ssa_subscripts,
1385 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1386 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1387 CompilerInitGrowableList(cu, cu->ssa_strings,
1388 num_dalvik_reg + cu->def_count + 128,
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1389 kListSSAtoDalvikMap);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1390 /*
1391 * Initial number of SSA registers is equal to the number of Dalvik
1392 * registers.
1393 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1394 cu->num_ssa_regs = num_dalvik_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1395
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1396 /*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1397 * Initialize the SSA2Dalvik map list. For the first num_dalvik_reg elements,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1398 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
1399 * into "(0 << 16) | i"
1400 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1401 for (i = 0; i < num_dalvik_reg; i++) {
1402 InsertGrowableList(cu, cu->ssa_base_vregs, i);
1403 InsertGrowableList(cu, cu->ssa_subscripts, 0);
1404 std::string ssa_name = GetSSAName(cu, i);
1405 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, true, kAllocDFInfo));
1406 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1407 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1408 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1409
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1410 /*
1411 * Initialize the DalvikToSSAMap map. There is one entry for each
1412 * Dalvik register, and the SSA names for those are the same.
1413 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1414 cu->vreg_to_ssa_map =
1415 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1416 /* Keep track of the higest def for each dalvik reg */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1417 cu->ssa_last_defs =
1418 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1419
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1420 for (i = 0; i < num_dalvik_reg; i++) {
1421 cu->vreg_to_ssa_map[i] = i;
1422 cu->ssa_last_defs[i] = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1423 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1424
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1425 /* Add ssa reg for Method* */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1426 cu->method_sreg = AddNewSReg(cu, SSA_METHOD_BASEREG);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1427
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1428 /*
1429 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
1430 */
1431 GrowableListIterator iterator;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1432
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1433 GrowableListIteratorInit(&cu->block_list, &iterator);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1434
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1435 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1436 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1437 if (bb == NULL) break;
1438 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1439 if (bb->block_type == kDalvikByteCode ||
1440 bb->block_type == kEntryBlock ||
1441 bb->block_type == kExitBlock) {
1442 bb->data_flow_info = static_cast<BasicBlockDataFlow*>(NewMem(cu, sizeof(BasicBlockDataFlow),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1443 true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1444 }
1445 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1446}
1447
1448/* Clear the visited flag for each BB */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1449bool ClearVisitedFlag(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1450{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1451 bb->visited = false;
1452 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1453}
1454
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1455void DataFlowAnalysisDispatcher(CompilationUnit* cu,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1456 bool (*func)(CompilationUnit*, BasicBlock*),
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1457 DataFlowAnalysisMode dfa_mode,
1458 bool is_iterative)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1459{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1460 bool change = true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1461
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1462 while (change) {
1463 change = false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1464
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1465 switch (dfa_mode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1466 /* Scan all blocks and perform the operations specified in func */
1467 case kAllNodes:
1468 {
1469 GrowableListIterator iterator;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1470 GrowableListIteratorInit(&cu->block_list, &iterator);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1471 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1472 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1473 if (bb == NULL) break;
1474 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1475 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1476 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1477 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1478 break;
1479 /* Scan reachable blocks and perform the ops specified in func. */
1480 case kReachableNodes:
1481 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1482 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1483 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1484 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1485
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1486 for (idx = 0; idx < num_reachable_blocks; idx++) {
1487 int block_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1488 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1489 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, block_idx));
1490 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1491 }
1492 }
1493 break;
1494
1495 /* Scan reachable blocks by pre-order dfs and invoke func on each. */
1496 case kPreOrderDFSTraversal:
1497 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1498 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1499 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1500 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1501
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1502 for (idx = 0; idx < num_reachable_blocks; idx++) {
1503 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1504 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1505 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, dfs_idx));
1506 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1507 }
1508 }
1509 break;
1510 /* Scan reachable blocks post-order dfs and invoke func on each. */
1511 case kPostOrderDFSTraversal:
1512 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1513 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1514 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1515 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1516
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1517 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1518 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1519 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1520 reinterpret_cast<BasicBlock *>( GrowableListGetElement(block_list, dfs_idx));
1521 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1522 }
1523 }
1524 break;
1525 /* Scan reachable post-order dom tree and invoke func on each. */
1526 case kPostOrderDOMTraversal:
1527 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1528 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1529 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1530 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1531
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1532 for (idx = 0; idx < num_reachable_blocks; idx++) {
1533 int dom_idx = cu->dom_post_order_traversal.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1534 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1535 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, dom_idx));
1536 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1537 }
1538 }
1539 break;
1540 /* Scan reachable blocks reverse post-order dfs, invoke func on each */
1541 case kReversePostOrderTraversal:
1542 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1543 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1544 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1545 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1546
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1547 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1548 int rev_idx = cu->dfs_post_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1549 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1550 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, rev_idx));
1551 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1552 }
1553 }
1554 break;
1555 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1556 LOG(FATAL) << "Unknown traversal mode: " << dfa_mode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1557 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1558 /* If is_iterative is false, exit the loop after the first iteration */
1559 change &= is_iterative;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1560 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1561}
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1562
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1563/* Advance to next strictly dominated MIR node in an extended basic block */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1564static MIR* AdvanceMIR(CompilationUnit* cu, BasicBlock** p_bb, MIR* mir,
1565 ArenaBitVector* bv, bool clear_mark) {
1566 BasicBlock* bb = *p_bb;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1567 if (mir != NULL) {
1568 mir = mir->next;
1569 if (mir == NULL) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1570 bb = bb->fall_through;
1571 if ((bb == NULL) || bb->predecessors->num_used != 1) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1572 mir = NULL;
1573 } else {
1574 if (bv) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1575 SetBit(cu, bv, bb->id);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1576 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1577 *p_bb = bb;
1578 mir = bb->first_mir_insn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1579 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1580 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1581 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1582 if (mir && clear_mark) {
1583 mir->optimization_flags &= ~MIR_MARK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1584 }
1585 return mir;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1586}
1587
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1588/*
1589 * To be used at an invoke mir. If the logically next mir node represents
1590 * a move-result, return it. Else, return NULL. If a move-result exists,
1591 * it is required to immediately follow the invoke with no intervening
1592 * opcodes or incoming arcs. However, if the result of the invoke is not
1593 * used, a move-result may not be present.
1594 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1595MIR* FindMoveResult(CompilationUnit* cu, BasicBlock* bb, MIR* mir)
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1596{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1597 BasicBlock* tbb = bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1598 mir = AdvanceMIR(cu, &tbb, mir, NULL, false);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1599 while (mir != NULL) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1600 int opcode = mir->dalvikInsn.opcode;
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1601 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
buzbee52ed7762012-06-13 23:43:14 -0700[diff] [blame]1602 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1603 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1604 break;
1605 }
1606 // Keep going if pseudo op, otherwise terminate
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1607 if (opcode < kNumPackedOpcodes) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1608 mir = NULL;
1609 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1610 mir = AdvanceMIR(cu, &tbb, mir, NULL, false);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1611 }
1612 }
1613 return mir;
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1614}
1615
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1616static void SquashDupRangeChecks(CompilationUnit* cu, BasicBlock** p_bp, MIR* mir,
1617 int array_sreg, int index_sreg)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1618{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1619 while (true) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1620 mir = AdvanceMIR(cu, p_bp, mir, NULL, false);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1621 if (!mir) {
1622 break;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1623 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1624 if ((mir->ssa_rep == NULL) ||
1625 (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1626 continue;
1627 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1628 int check_array = INVALID_SREG;
1629 int check_index = INVALID_SREG;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1630 switch (mir->dalvikInsn.opcode) {
1631 case Instruction::AGET:
1632 case Instruction::AGET_OBJECT:
1633 case Instruction::AGET_BOOLEAN:
1634 case Instruction::AGET_BYTE:
1635 case Instruction::AGET_CHAR:
1636 case Instruction::AGET_SHORT:
1637 case Instruction::AGET_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1638 check_array = mir->ssa_rep->uses[0];
1639 check_index = mir->ssa_rep->uses[1];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1640 break;
1641 case Instruction::APUT:
1642 case Instruction::APUT_OBJECT:
1643 case Instruction::APUT_SHORT:
1644 case Instruction::APUT_CHAR:
1645 case Instruction::APUT_BYTE:
1646 case Instruction::APUT_BOOLEAN:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1647 check_array = mir->ssa_rep->uses[1];
1648 check_index = mir->ssa_rep->uses[2];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1649 break;
1650 case Instruction::APUT_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1651 check_array = mir->ssa_rep->uses[2];
1652 check_index = mir->ssa_rep->uses[3];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1653 default:
1654 break;
1655 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1656 if (check_array == INVALID_SREG) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1657 continue;
1658 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1659 if ((array_sreg == check_array) && (index_sreg == check_index)) {
1660 if (cu->verbose) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1661 LOG(INFO) << "Squashing range check @ 0x" << std::hex << mir->offset;
1662 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1663 mir->optimization_flags |= MIR_IGNORE_RANGE_CHECK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1664 }
1665 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1666}
1667
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1668/* Do some MIR-level basic block optimizations */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1669static bool BasicBlockOpt(CompilationUnit* cu, BasicBlock* bb)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1670{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1671 int num_temps = 0;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1672
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1673 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1674 // Look for interesting opcodes, skip otherwise
1675 Instruction::Code opcode = mir->dalvikInsn.opcode;
1676 switch (opcode) {
1677 case Instruction::AGET:
1678 case Instruction::AGET_OBJECT:
1679 case Instruction::AGET_BOOLEAN:
1680 case Instruction::AGET_BYTE:
1681 case Instruction::AGET_CHAR:
1682 case Instruction::AGET_SHORT:
1683 case Instruction::AGET_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1684 if (!(mir->optimization_flags & MIR_IGNORE_RANGE_CHECK)) {
1685 int arr_sreg = mir->ssa_rep->uses[0];
1686 int idx_sreg = mir->ssa_rep->uses[1];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1687 BasicBlock* tbb = bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1688 SquashDupRangeChecks(cu, &tbb, mir, arr_sreg, idx_sreg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1689 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1690 break;
1691 case Instruction::APUT:
1692 case Instruction::APUT_OBJECT:
1693 case Instruction::APUT_SHORT:
1694 case Instruction::APUT_CHAR:
1695 case Instruction::APUT_BYTE:
1696 case Instruction::APUT_BOOLEAN:
1697 case Instruction::APUT_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1698 if (!(mir->optimization_flags & MIR_IGNORE_RANGE_CHECK)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1699 int start = (opcode == Instruction::APUT_WIDE) ? 2 : 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1700 int arr_sreg = mir->ssa_rep->uses[start];
1701 int idx_sreg = mir->ssa_rep->uses[start + 1];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1702 BasicBlock* tbb = bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1703 SquashDupRangeChecks(cu, &tbb, mir, arr_sreg, idx_sreg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1704 }
1705 break;
1706 case Instruction::CMPL_FLOAT:
1707 case Instruction::CMPL_DOUBLE:
1708 case Instruction::CMPG_FLOAT:
1709 case Instruction::CMPG_DOUBLE:
1710 case Instruction::CMP_LONG:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1711 if (cu->gen_bitcode) {
buzbeeca7a5e42012-08-20 11:12:18 -0700[diff] [blame]1712 // Bitcode doesn't allow this optimization.
1713 break;
1714 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1715 if (mir->next != NULL) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1716 MIR* mir_next = mir->next;
1717 Instruction::Code br_opcode = mir_next->dalvikInsn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1718 ConditionCode ccode = kCondNv;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1719 switch(br_opcode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1720 case Instruction::IF_EQZ:
1721 ccode = kCondEq;
1722 break;
1723 case Instruction::IF_NEZ:
1724 ccode = kCondNe;
1725 break;
1726 case Instruction::IF_LTZ:
1727 ccode = kCondLt;
1728 break;
1729 case Instruction::IF_GEZ:
1730 ccode = kCondGe;
1731 break;
1732 case Instruction::IF_GTZ:
1733 ccode = kCondGt;
1734 break;
1735 case Instruction::IF_LEZ:
1736 ccode = kCondLe;
1737 break;
1738 default:
1739 break;
1740 }
1741 // Make sure result of cmp is used by next insn and nowhere else
1742 if ((ccode != kCondNv) &&
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1743 (mir->ssa_rep->defs[0] == mir_next->ssa_rep->uses[0]) &&
1744 (GetSSAUseCount(cu, mir->ssa_rep->defs[0]) == 1)) {
1745 mir_next->dalvikInsn.arg[0] = ccode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1746 switch(opcode) {
1747 case Instruction::CMPL_FLOAT:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1748 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1749 static_cast<Instruction::Code>(kMirOpFusedCmplFloat);
1750 break;
1751 case Instruction::CMPL_DOUBLE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1752 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1753 static_cast<Instruction::Code>(kMirOpFusedCmplDouble);
1754 break;
1755 case Instruction::CMPG_FLOAT:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1756 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1757 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat);
1758 break;
1759 case Instruction::CMPG_DOUBLE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1760 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1761 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble);
1762 break;
1763 case Instruction::CMP_LONG:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1764 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1765 static_cast<Instruction::Code>(kMirOpFusedCmpLong);
1766 break;
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1767 default: LOG(ERROR) << "Unexpected opcode: " << opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1768 }
1769 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1770 mir_next->ssa_rep->num_uses = mir->ssa_rep->num_uses;
1771 mir_next->ssa_rep->uses = mir->ssa_rep->uses;
1772 mir_next->ssa_rep->fp_use = mir->ssa_rep->fp_use;
1773 mir_next->ssa_rep->num_defs = 0;
1774 mir->ssa_rep->num_uses = 0;
1775 mir->ssa_rep->num_defs = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1776 }
1777 }
1778 break;
1779 default:
1780 break;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1781 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1782 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1783
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1784 if (num_temps > cu->num_compiler_temps) {
1785 cu->num_compiler_temps = num_temps;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1786 }
1787 return true;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1788}
1789
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1790static bool NullCheckEliminationInit(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1791{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1792 if (bb->data_flow_info == NULL) return false;
1793 bb->data_flow_info->ending_null_check_v =
1794 AllocBitVector(cu, cu->num_ssa_regs, false, kBitMapNullCheck);
1795 ClearAllBits(bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1796 return true;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1797}
1798
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1799/* Collect stats on number of checks removed */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1800static bool CountChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1801{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1802 if (bb->data_flow_info == NULL) return false;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1803 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1804 if (mir->ssa_rep == NULL) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1805 continue;
1806 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1807 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1808 if (df_attributes & DF_HAS_NULL_CHKS) {
1809 cu->checkstats->null_checks++;
1810 if (mir->optimization_flags & MIR_IGNORE_NULL_CHECK) {
1811 cu->checkstats->null_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1812 }
1813 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1814 if (df_attributes & DF_HAS_RANGE_CHKS) {
1815 cu->checkstats->range_checks++;
1816 if (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK) {
1817 cu->checkstats->range_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1818 }
1819 }
1820 }
1821 return false;
1822}
1823
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1824/* Try to make common case the fallthrough path */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1825static bool LayoutBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1826{
1827 // TODO: For now, just looking for direct throws. Consider generalizing for profile feedback
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1828 if (!bb->explicit_throw) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1829 return false;
1830 }
1831 BasicBlock* walker = bb;
1832 while (true) {
1833 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1834 if ((walker->block_type == kEntryBlock) || (walker->predecessors->num_used != 1)) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1835 break;
1836 }
1837 BasicBlock* prev = GET_ELEM_N(walker->predecessors, BasicBlock*, 0);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1838 if (prev->conditional_branch) {
1839 if (prev->fall_through == walker) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1840 // Already done - return
1841 break;
1842 }
1843 DCHECK_EQ(walker, prev->taken);
1844 // Got one. Flip it and exit
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1845 Instruction::Code opcode = prev->last_mir_insn->dalvikInsn.opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1846 switch (opcode) {
1847 case Instruction::IF_EQ: opcode = Instruction::IF_NE; break;
1848 case Instruction::IF_NE: opcode = Instruction::IF_EQ; break;
1849 case Instruction::IF_LT: opcode = Instruction::IF_GE; break;
1850 case Instruction::IF_GE: opcode = Instruction::IF_LT; break;
1851 case Instruction::IF_GT: opcode = Instruction::IF_LE; break;
1852 case Instruction::IF_LE: opcode = Instruction::IF_GT; break;
1853 case Instruction::IF_EQZ: opcode = Instruction::IF_NEZ; break;
1854 case Instruction::IF_NEZ: opcode = Instruction::IF_EQZ; break;
1855 case Instruction::IF_LTZ: opcode = Instruction::IF_GEZ; break;
1856 case Instruction::IF_GEZ: opcode = Instruction::IF_LTZ; break;
1857 case Instruction::IF_GTZ: opcode = Instruction::IF_LEZ; break;
1858 case Instruction::IF_LEZ: opcode = Instruction::IF_GTZ; break;
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1859 default: LOG(FATAL) << "Unexpected opcode " << opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1860 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1861 prev->last_mir_insn->dalvikInsn.opcode = opcode;
1862 BasicBlock* t_bb = prev->taken;
1863 prev->taken = prev->fall_through;
1864 prev->fall_through = t_bb;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1865 break;
1866 }
1867 walker = prev;
1868 }
1869 return false;
1870}
1871
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1872/* Combine any basic blocks terminated by instructions that we now know can't throw */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1873static bool CombineBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1874{
1875 // Loop here to allow combining a sequence of blocks
1876 while (true) {
1877 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1878 if ((bb->first_mir_insn == NULL)
1879 || (bb->data_flow_info == NULL)
1880 || (bb->block_type == kExceptionHandling)
1881 || (bb->block_type == kExitBlock)
1882 || (bb->block_type == kDead)
1883 || ((bb->taken == NULL) || (bb->taken->block_type != kExceptionHandling))
1884 || (bb->successor_block_list.block_list_type != kNotUsed)
1885 || (static_cast<int>(bb->last_mir_insn->dalvikInsn.opcode) != kMirOpCheck)) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1886 break;
1887 }
1888
1889 // Test the kMirOpCheck instruction
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1890 MIR* mir = bb->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1891 // Grab the attributes from the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1892 MIR* throw_insn = mir->meta.throw_insn;
1893 int df_attributes = oat_data_flow_attributes[throw_insn->dalvikInsn.opcode];
1894 bool can_combine = true;
1895 if (df_attributes & DF_HAS_NULL_CHKS) {
1896 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_NULL_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1897 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1898 if (df_attributes & DF_HAS_RANGE_CHKS) {
1899 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_RANGE_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1900 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1901 if (!can_combine) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1902 break;
1903 }
1904 // OK - got one. Combine
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1905 BasicBlock* bb_next = bb->fall_through;
1906 DCHECK(!bb_next->catch_entry);
1907 DCHECK_EQ(bb_next->predecessors->num_used, 1U);
1908 MIR* t_mir = bb->last_mir_insn->prev;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1909 // Overwrite the kOpCheck insn with the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1910 DCHECK_EQ(bb_next->first_mir_insn, throw_insn);
1911 *bb->last_mir_insn = *throw_insn;
1912 bb->last_mir_insn->prev = t_mir;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1913 // Use the successor info from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1914 bb->successor_block_list = bb_next->successor_block_list;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1915 // Use the ending block linkage from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1916 bb->fall_through = bb_next->fall_through;
1917 bb->taken->block_type = kDead; // Kill the unused exception block
1918 bb->taken = bb_next->taken;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1919 // Include the rest of the instructions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1920 bb->last_mir_insn = bb_next->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1921
1922 /*
1923 * NOTE: we aren't updating all dataflow info here. Should either make sure this pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1924 * happens after uses of i_dominated, dom_frontier or update the dataflow info here.
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1925 */
1926
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1927 // Kill bb_next and remap now-dead id to parent
1928 bb_next->block_type = kDead;
1929 cu->block_id_map.Overwrite(bb_next->id, bb->id);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1930
1931 // Now, loop back and see if we can keep going
1932 }
1933 return false;
1934}
1935
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1936/* Eliminate unnecessary null checks for a basic block. */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1937static bool EliminateNullChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1938{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1939 if (bb->data_flow_info == NULL) return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1940
1941 /*
1942 * Set initial state. Be conservative with catch
1943 * blocks and start with no assumptions about null check
1944 * status (except for "this").
1945 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1946 if ((bb->block_type == kEntryBlock) | bb->catch_entry) {
1947 ClearAllBits(cu->temp_ssa_register_v);
1948 if ((cu->access_flags & kAccStatic) == 0) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1949 // If non-static method, mark "this" as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1950 int this_reg = cu->num_dalvik_registers - cu->num_ins;
1951 SetBit(cu, cu->temp_ssa_register_v, this_reg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1952 }
1953 } else {
1954 // Starting state is intesection of all incoming arcs
1955 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1956 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1957 BasicBlock* pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
1958 DCHECK(pred_bb != NULL);
1959 CopyBitVector(cu->temp_ssa_register_v,
1960 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1961 while (true) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1962 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
1963 if (!pred_bb) break;
1964 if ((pred_bb->data_flow_info == NULL) ||
1965 (pred_bb->data_flow_info->ending_null_check_v == NULL)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1966 continue;
1967 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1968 IntersectBitVectors(cu->temp_ssa_register_v,
1969 cu->temp_ssa_register_v,
1970 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1971 }
1972 }
1973
1974 // Walk through the instruction in the block, updating as necessary
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1975 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1976 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1977 continue;
1978 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1979 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1980
1981 // Mark target of NEW* as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1982 if (df_attributes & DF_NON_NULL_DST) {
1983 SetBit(cu, cu->temp_ssa_register_v, mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1984 }
1985
1986 // Mark non-null returns from invoke-style NEW*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1987 if (df_attributes & DF_NON_NULL_RET) {
1988 MIR* next_mir = mir->next;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1989 // Next should be an MOVE_RESULT_OBJECT
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1990 if (next_mir &&
1991 next_mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1992 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1993 SetBit(cu, cu->temp_ssa_register_v, next_mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1994 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1995 if (next_mir) {
1996 LOG(WARNING) << "Unexpected opcode following new: " << next_mir->dalvikInsn.opcode;
1997 } else if (bb->fall_through) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1998 // Look in next basic block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1999 struct BasicBlock* next_bb = bb->fall_through;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2000 for (MIR* tmir = next_bb->first_mir_insn; tmir != NULL;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2001 tmir =tmir->next) {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2002 if (static_cast<int>(tmir->dalvikInsn.opcode) >= static_cast<int>(kMirOpFirst)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2003 continue;
2004 }
2005 // First non-pseudo should be MOVE_RESULT_OBJECT
2006 if (tmir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
2007 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2008 SetBit(cu, cu->temp_ssa_register_v, tmir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2009 } else {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2010 LOG(WARNING) << "Unexpected op after new: " << tmir->dalvikInsn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2011 }
2012 break;
2013 }
2014 }
2015 }
2016 }
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]2017
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2018 /*
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2019 * Propagate nullcheck state on register copies (including
2020 * Phi pseudo copies. For the latter, nullcheck state is
2021 * the "and" of all the Phi's operands.
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2022 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2023 if (df_attributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
2024 int tgt_sreg = mir->ssa_rep->defs[0];
2025 int operands = (df_attributes & DF_NULL_TRANSFER_0) ? 1 :
2026 mir->ssa_rep->num_uses;
2027 bool null_checked = true;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2028 for (int i = 0; i < operands; i++) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2029 null_checked &= IsBitSet(cu->temp_ssa_register_v,
2030 mir->ssa_rep->uses[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2031 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2032 if (null_checked) {
2033 SetBit(cu, cu->temp_ssa_register_v, tgt_sreg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2034 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2035 }
2036
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2037 // Already nullchecked?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2038 if ((df_attributes & DF_HAS_NULL_CHKS) && !(mir->optimization_flags & MIR_IGNORE_NULL_CHECK)) {
2039 int src_idx;
2040 if (df_attributes & DF_NULL_CHK_1) {
2041 src_idx = 1;
2042 } else if (df_attributes & DF_NULL_CHK_2) {
2043 src_idx = 2;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2044 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2045 src_idx = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2046 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2047 int src_sreg = mir->ssa_rep->uses[src_idx];
2048 if (IsBitSet(cu->temp_ssa_register_v, src_sreg)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2049 // Eliminate the null check
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2050 mir->optimization_flags |= MIR_IGNORE_NULL_CHECK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2051 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2052 // Mark s_reg as null-checked
2053 SetBit(cu, cu->temp_ssa_register_v, src_sreg);
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2054 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2055 }
2056 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2057
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2058 // Did anything change?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2059 bool res = CompareBitVectors(bb->data_flow_info->ending_null_check_v,
2060 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2061 if (res) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2062 CopyBitVector(bb->data_flow_info->ending_null_check_v,
2063 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2064 }
2065 return res;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2066}
2067
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2068void NullCheckElimination(CompilationUnit *cu)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2069{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2070 if (!(cu->disable_opt & (1 << kNullCheckElimination))) {
2071 DCHECK(cu->temp_ssa_register_v != NULL);
2072 DataFlowAnalysisDispatcher(cu, NullCheckEliminationInit, kAllNodes,
2073 false /* is_iterative */);
2074 DataFlowAnalysisDispatcher(cu, EliminateNullChecks,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2075 kPreOrderDFSTraversal,
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2076 true /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2077 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2078}
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2079
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2080void BasicBlockCombine(CompilationUnit* cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2081{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2082 DataFlowAnalysisDispatcher(cu, CombineBlocks, kPreOrderDFSTraversal, false);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2083}
2084
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2085void CodeLayout(CompilationUnit* cu)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2086{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2087 DataFlowAnalysisDispatcher(cu, LayoutBlocks, kAllNodes, false);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2088}
2089
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2090void DumpCheckStats(CompilationUnit *cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2091{
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2092 Checkstats* stats =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2093 static_cast<Checkstats*>(NewMem(cu, sizeof(Checkstats), true, kAllocDFInfo));
2094 cu->checkstats = stats;
2095 DataFlowAnalysisDispatcher(cu, CountChecks, kAllNodes, false /* is_iterative */);
2096 if (stats->null_checks > 0) {
2097 float eliminated = static_cast<float>(stats->null_checks_eliminated);
2098 float checks = static_cast<float>(stats->null_checks);
2099 LOG(INFO) << "Null Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2100 << stats->null_checks_eliminated << " of " << stats->null_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2101 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2102 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2103 if (stats->range_checks > 0) {
2104 float eliminated = static_cast<float>(stats->range_checks_eliminated);
2105 float checks = static_cast<float>(stats->range_checks);
2106 LOG(INFO) << "Range Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2107 << stats->range_checks_eliminated << " of " << stats->range_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2108 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2109 }
2110}
2111
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2112void BasicBlockOptimization(CompilationUnit *cu)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2113{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2114 if (!(cu->disable_opt & (1 << kBBOpt))) {
2115 CompilerInitGrowableList(cu, &cu->compiler_temps, 6, kListMisc);
2116 DCHECK_EQ(cu->num_compiler_temps, 0);
2117 DataFlowAnalysisDispatcher(cu, BasicBlockOpt,
2118 kAllNodes, false /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2119 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2120}
2121
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2122static void AddLoopHeader(CompilationUnit* cu, BasicBlock* header,
2123 BasicBlock* back_edge)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2124{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2125 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2126 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2127 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2128 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2129 if (loop->header == header) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2130 InsertGrowableList(cu, &loop->incoming_back_edges,
2131 reinterpret_cast<uintptr_t>(back_edge));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2132 return;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2133 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2134 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2135 LoopInfo* info = static_cast<LoopInfo*>(NewMem(cu, sizeof(LoopInfo), true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2136 info->header = header;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2137 CompilerInitGrowableList(cu, &info->incoming_back_edges, 2, kListMisc);
2138 InsertGrowableList(cu, &info->incoming_back_edges, reinterpret_cast<uintptr_t>(back_edge));
2139 InsertGrowableList(cu, &cu->loop_headers, reinterpret_cast<uintptr_t>(info));
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2140}
2141
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2142static bool FindBackEdges(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2143{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2144 if ((bb->data_flow_info == NULL) || (bb->last_mir_insn == NULL)) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2145 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2146 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2147 Instruction::Code opcode = bb->last_mir_insn->dalvikInsn.opcode;
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]2148 if (Instruction::FlagsOf(opcode) & Instruction::kBranch) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2149 if (bb->taken && (bb->taken->start_offset <= bb->start_offset)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2150 DCHECK(bb->dominators != NULL);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2151 if (IsBitSet(bb->dominators, bb->taken->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2152 if (cu->verbose) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2153 LOG(INFO) << "Loop backedge from 0x"
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2154 << std::hex << bb->last_mir_insn->offset
2155 << " to 0x" << std::hex << bb->taken->start_offset;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2156 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2157 AddLoopHeader(cu, bb->taken, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2158 }
2159 }
2160 }
2161 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2162}
2163
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2164static void AddBlocksToLoop(CompilationUnit* cu, ArenaBitVector* blocks,
2165 BasicBlock* bb, int head_id)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2166{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2167 if (!IsBitSet(bb->dominators, head_id) ||
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2168 IsBitSet(blocks, bb->id)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2169 return;
2170 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2171 SetBit(cu, blocks, bb->id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2172 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2173 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2174 BasicBlock* pred_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2175 for (pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); pred_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2176 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2177 AddBlocksToLoop(cu, blocks, pred_bb, head_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2178 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2179}
2180
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2181static void DumpLoops(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2182{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2183 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2184 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2185 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2186 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2187 LOG(INFO) << "Loop head block id " << loop->header->id
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2188 << ", offset 0x" << std::hex << loop->header->start_offset
2189 << ", Depth: " << loop->header->nesting_depth;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2190 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2191 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2192 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2193 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2194 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2195 LOG(INFO) << " Backedge block id " << edge_bb->id
2196 << ", offset 0x" << std::hex << edge_bb->start_offset;
2197 ArenaBitVectorIterator b_iter;
2198 BitVectorIteratorInit(loop->blocks, &b_iter);
2199 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2200 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2201 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2202 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2203 LOG(INFO) << " (" << bb->id << ", 0x" << std::hex
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2204 << bb->start_offset << ")";
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2205 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2206 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2207 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2208}
2209
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2210void LoopDetection(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2211{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2212 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2213 return;
2214 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2215 CompilerInitGrowableList(cu, &cu->loop_headers, 6, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2216 // Find the loop headers
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2217 DataFlowAnalysisDispatcher(cu, FindBackEdges, kAllNodes, false /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2218 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2219 GrowableListIteratorInit(&cu->loop_headers, &iter);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2220 // Add blocks to each header
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2221 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2222 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2223 loop->blocks = AllocBitVector(cu, cu->num_blocks, true,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2224 kBitMapMisc);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2225 SetBit(cu, loop->blocks, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2226 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2227 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2228 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2229 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2230 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2231 AddBlocksToLoop(cu, loop->blocks, edge_bb, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2232 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2233 }
2234 // Compute the nesting depth of each header
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2235 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2236 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2237 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2238 GrowableListIterator iter2;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2239 GrowableListIteratorInit(&cu->loop_headers, &iter2);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2240 LoopInfo* loop2;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2241 for (loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2242 loop2 != NULL; loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2))) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2243 if (IsBitSet(loop2->blocks, loop->header->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2244 loop->header->nesting_depth++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2245 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2246 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2247 }
2248 // Assign nesting depth to each block in all loops
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2249 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2250 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2251 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2252 ArenaBitVectorIterator b_iter;
2253 BitVectorIteratorInit(loop->blocks, &b_iter);
2254 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2255 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2256 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2257 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
2258 bb->nesting_depth = std::max(bb->nesting_depth,
2259 loop->header->nesting_depth);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2260 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2261 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2262 if (cu->verbose) {
2263 DumpLoops(cu);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2264 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2265}
2266
2267/*
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2268 * This function will make a best guess at whether the invoke will
2269 * end up using Method*. It isn't critical to get it exactly right,
2270 * and attempting to do would involve more complexity than it's
2271 * worth.
2272 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2273static bool InvokeUsesMethodStar(CompilationUnit* cu, MIR* mir)
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2274{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2275 InvokeType type;
2276 Instruction::Code opcode = mir->dalvikInsn.opcode;
2277 switch (opcode) {
2278 case Instruction::INVOKE_STATIC:
2279 case Instruction::INVOKE_STATIC_RANGE:
2280 type = kStatic;
2281 break;
2282 case Instruction::INVOKE_DIRECT:
2283 case Instruction::INVOKE_DIRECT_RANGE:
2284 type = kDirect;
2285 break;
2286 case Instruction::INVOKE_VIRTUAL:
2287 case Instruction::INVOKE_VIRTUAL_RANGE:
2288 type = kVirtual;
2289 break;
2290 case Instruction::INVOKE_INTERFACE:
2291 case Instruction::INVOKE_INTERFACE_RANGE:
2292 return false;
2293 case Instruction::INVOKE_SUPER_RANGE:
2294 case Instruction::INVOKE_SUPER:
2295 type = kSuper;
2296 break;
2297 default:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2298 LOG(WARNING) << "Unexpected invoke op: " << opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2299 return false;
2300 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2301 OatCompilationUnit m_unit(cu->class_loader, cu->class_linker,
2302 *cu->dex_file,
2303 cu->code_item, cu->method_idx,
2304 cu->access_flags);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2305 // TODO: add a flag so we don't counts the stats for this twice
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2306 uint32_t dex_method_idx = mir->dalvikInsn.vB;
2307 int vtable_idx;
2308 uintptr_t direct_code;
2309 uintptr_t direct_method;
2310 bool fast_path =
2311 cu->compiler->ComputeInvokeInfo(dex_method_idx, &m_unit, type,
2312 vtable_idx, direct_code,
2313 direct_method) &&
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2314 !SLOW_INVOKE_PATH;
2315 return (((type == kDirect) || (type == kStatic)) &&
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2316 fast_path && ((direct_code == 0) || (direct_method == 0)));
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2317}
2318
2319/*
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2320 * Count uses, weighting by loop nesting depth. This code only
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2321 * counts explicitly used s_regs. A later phase will add implicit
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2322 * counts for things such as Method*, null-checked references, etc.
2323 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2324static bool CountUses(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2325{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2326 if (bb->block_type != kDalvikByteCode) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2327 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2328 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2329 for (MIR* mir = bb->first_mir_insn; (mir != NULL); mir = mir->next) {
2330 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2331 continue;
2332 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2333 uint32_t weight = std::min(16U, static_cast<uint32_t>(bb->nesting_depth));
2334 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
2335 int s_reg = mir->ssa_rep->uses[i];
2336 DCHECK_LT(s_reg, static_cast<int>(cu->use_counts.num_used));
2337 cu->raw_use_counts.elem_list[s_reg]++;
2338 cu->use_counts.elem_list[s_reg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2339 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2340 if (!(cu->disable_opt & (1 << kPromoteCompilerTemps))) {
2341 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2342 // Implicit use of Method* ? */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2343 if (df_attributes & DF_UMS) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2344 /*
2345 * Some invokes will not use Method* - need to perform test similar
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2346 * to that found in GenInvoke() to decide whether to count refs
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2347 * for Method* on invoke-class opcodes.
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2348 * TODO: refactor for common test here, save results for GenInvoke
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2349 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2350 int uses_method_star = true;
2351 if ((df_attributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) &&
2352 !(df_attributes & DF_NON_NULL_RET)) {
2353 uses_method_star &= InvokeUsesMethodStar(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2354 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2355 if (uses_method_star) {
2356 cu->raw_use_counts.elem_list[cu->method_sreg]++;
2357 cu->use_counts.elem_list[cu->method_sreg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2358 }
2359 }
2360 }
2361 }
2362 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2363}
2364
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2365void MethodUseCount(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2366{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2367 CompilerInitGrowableList(cu, &cu->use_counts, cu->num_ssa_regs + 32, kListMisc);
2368 CompilerInitGrowableList(cu, &cu->raw_use_counts, cu->num_ssa_regs + 32, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2369 // Initialize list
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2370 for (int i = 0; i < cu->num_ssa_regs; i++) {
2371 InsertGrowableList(cu, &cu->use_counts, 0);
2372 InsertGrowableList(cu, &cu->raw_use_counts, 0);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2373 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2374 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2375 return;
2376 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2377 DataFlowAnalysisDispatcher(cu, CountUses,
2378 kAllNodes, false /* is_iterative */);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2379}
2380
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2381} // namespace art