Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "trampoline_compiler.h" |
| 18 | |
Ian Rogers | 68d8b42 | 2014-07-17 11:09:10 -0700 | [diff] [blame] | 19 | #include "jni_env_ext.h" |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 20 | #include "utils/arm/assembler_thumb2.h" |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 21 | #include "utils/arm64/assembler_arm64.h" |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 22 | #include "utils/mips/assembler_mips.h" |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 23 | #include "utils/mips64/assembler_mips64.h" |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 24 | #include "utils/x86/assembler_x86.h" |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 25 | #include "utils/x86_64/assembler_x86_64.h" |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 26 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 27 | #define __ assembler. |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 28 | |
| 29 | namespace art { |
| 30 | |
| 31 | namespace arm { |
| 32 | static const std::vector<uint8_t>* CreateTrampoline(EntryPointCallingConvention abi, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 33 | ThreadOffset<4> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 34 | Thumb2Assembler assembler; |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 35 | |
| 36 | switch (abi) { |
| 37 | case kInterpreterAbi: // Thread* is first argument (R0) in interpreter ABI. |
| 38 | __ LoadFromOffset(kLoadWord, PC, R0, offset.Int32Value()); |
| 39 | break; |
| 40 | case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (R0). |
| 41 | __ LoadFromOffset(kLoadWord, IP, R0, JNIEnvExt::SelfOffset().Int32Value()); |
| 42 | __ LoadFromOffset(kLoadWord, PC, IP, offset.Int32Value()); |
| 43 | break; |
Elliott Hughes | 956af0f | 2014-12-11 14:34:28 -0800 | [diff] [blame] | 44 | case kQuickAbi: // R9 holds Thread*. |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 45 | __ LoadFromOffset(kLoadWord, PC, R9, offset.Int32Value()); |
| 46 | } |
| 47 | __ bkpt(0); |
| 48 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 49 | __ FinalizeCode(); |
| 50 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 51 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 52 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 53 | __ FinalizeInstructions(code); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 54 | |
| 55 | return entry_stub.release(); |
| 56 | } |
| 57 | } // namespace arm |
| 58 | |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 59 | namespace arm64 { |
| 60 | static const std::vector<uint8_t>* CreateTrampoline(EntryPointCallingConvention abi, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 61 | ThreadOffset<8> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 62 | Arm64Assembler assembler; |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 63 | |
| 64 | switch (abi) { |
| 65 | case kInterpreterAbi: // Thread* is first argument (X0) in interpreter ABI. |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 66 | __ JumpTo(Arm64ManagedRegister::FromXRegister(X0), Offset(offset.Int32Value()), |
| 67 | Arm64ManagedRegister::FromXRegister(IP1)); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 68 | |
| 69 | break; |
| 70 | case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (X0). |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 71 | __ LoadRawPtr(Arm64ManagedRegister::FromXRegister(IP1), |
| 72 | Arm64ManagedRegister::FromXRegister(X0), |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 73 | Offset(JNIEnvExt::SelfOffset().Int32Value())); |
| 74 | |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 75 | __ JumpTo(Arm64ManagedRegister::FromXRegister(IP1), Offset(offset.Int32Value()), |
| 76 | Arm64ManagedRegister::FromXRegister(IP0)); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 77 | |
| 78 | break; |
Elliott Hughes | 956af0f | 2014-12-11 14:34:28 -0800 | [diff] [blame] | 79 | case kQuickAbi: // X18 holds Thread*. |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 80 | __ JumpTo(Arm64ManagedRegister::FromXRegister(TR), Offset(offset.Int32Value()), |
| 81 | Arm64ManagedRegister::FromXRegister(IP0)); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 82 | |
| 83 | break; |
| 84 | } |
| 85 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 86 | __ FinalizeCode(); |
| 87 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 88 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 89 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 90 | __ FinalizeInstructions(code); |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 91 | |
| 92 | return entry_stub.release(); |
| 93 | } |
| 94 | } // namespace arm64 |
| 95 | |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 96 | namespace mips { |
| 97 | static const std::vector<uint8_t>* CreateTrampoline(EntryPointCallingConvention abi, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 98 | ThreadOffset<4> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 99 | MipsAssembler assembler; |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 100 | |
| 101 | switch (abi) { |
| 102 | case kInterpreterAbi: // Thread* is first argument (A0) in interpreter ABI. |
| 103 | __ LoadFromOffset(kLoadWord, T9, A0, offset.Int32Value()); |
| 104 | break; |
| 105 | case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (A0). |
| 106 | __ LoadFromOffset(kLoadWord, T9, A0, JNIEnvExt::SelfOffset().Int32Value()); |
| 107 | __ LoadFromOffset(kLoadWord, T9, T9, offset.Int32Value()); |
| 108 | break; |
Elliott Hughes | 956af0f | 2014-12-11 14:34:28 -0800 | [diff] [blame] | 109 | case kQuickAbi: // S1 holds Thread*. |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 110 | __ LoadFromOffset(kLoadWord, T9, S1, offset.Int32Value()); |
| 111 | } |
| 112 | __ Jr(T9); |
| 113 | __ Nop(); |
| 114 | __ Break(); |
| 115 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 116 | __ FinalizeCode(); |
| 117 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 118 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 119 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 120 | __ FinalizeInstructions(code); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 121 | |
| 122 | return entry_stub.release(); |
| 123 | } |
| 124 | } // namespace mips |
| 125 | |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 126 | namespace mips64 { |
| 127 | static const std::vector<uint8_t>* CreateTrampoline(EntryPointCallingConvention abi, |
| 128 | ThreadOffset<8> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 129 | Mips64Assembler assembler; |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 130 | |
| 131 | switch (abi) { |
| 132 | case kInterpreterAbi: // Thread* is first argument (A0) in interpreter ABI. |
| 133 | __ LoadFromOffset(kLoadDoubleword, T9, A0, offset.Int32Value()); |
| 134 | break; |
| 135 | case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (A0). |
| 136 | __ LoadFromOffset(kLoadDoubleword, T9, A0, JNIEnvExt::SelfOffset().Int32Value()); |
| 137 | __ LoadFromOffset(kLoadDoubleword, T9, T9, offset.Int32Value()); |
| 138 | break; |
| 139 | case kQuickAbi: // Fall-through. |
| 140 | __ LoadFromOffset(kLoadDoubleword, T9, S1, offset.Int32Value()); |
| 141 | } |
| 142 | __ Jr(T9); |
| 143 | __ Nop(); |
| 144 | __ Break(); |
| 145 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 146 | __ FinalizeCode(); |
| 147 | size_t cs = __ CodeSize(); |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 148 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
| 149 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 150 | __ FinalizeInstructions(code); |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 151 | |
| 152 | return entry_stub.release(); |
| 153 | } |
| 154 | } // namespace mips64 |
| 155 | |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 156 | namespace x86 { |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 157 | static const std::vector<uint8_t>* CreateTrampoline(ThreadOffset<4> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 158 | X86Assembler assembler; |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 159 | |
| 160 | // All x86 trampolines call via the Thread* held in fs. |
| 161 | __ fs()->jmp(Address::Absolute(offset)); |
| 162 | __ int3(); |
| 163 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 164 | __ FinalizeCode(); |
| 165 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 166 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 167 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 168 | __ FinalizeInstructions(code); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 169 | |
| 170 | return entry_stub.release(); |
| 171 | } |
| 172 | } // namespace x86 |
| 173 | |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 174 | namespace x86_64 { |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 175 | static const std::vector<uint8_t>* CreateTrampoline(ThreadOffset<8> offset) { |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 176 | x86_64::X86_64Assembler assembler; |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 177 | |
| 178 | // All x86 trampolines call via the Thread* held in gs. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 179 | __ gs()->jmp(x86_64::Address::Absolute(offset, true)); |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 180 | __ int3(); |
| 181 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 182 | __ FinalizeCode(); |
| 183 | size_t cs = __ CodeSize(); |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 184 | std::unique_ptr<std::vector<uint8_t>> entry_stub(new std::vector<uint8_t>(cs)); |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 185 | MemoryRegion code(&(*entry_stub)[0], entry_stub->size()); |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame^] | 186 | __ FinalizeInstructions(code); |
Ian Rogers | befbd57 | 2014-03-06 01:13:39 -0800 | [diff] [blame] | 187 | |
| 188 | return entry_stub.release(); |
| 189 | } |
| 190 | } // namespace x86_64 |
| 191 | |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 192 | const std::vector<uint8_t>* CreateTrampoline64(InstructionSet isa, EntryPointCallingConvention abi, |
| 193 | ThreadOffset<8> offset) { |
| 194 | switch (isa) { |
| 195 | case kArm64: |
| 196 | return arm64::CreateTrampoline(abi, offset); |
Andreas Gampe | 57b3429 | 2015-01-14 15:45:59 -0800 | [diff] [blame] | 197 | case kMips64: |
| 198 | return mips64::CreateTrampoline(abi, offset); |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 199 | case kX86_64: |
| 200 | return x86_64::CreateTrampoline(offset); |
| 201 | default: |
| 202 | LOG(FATAL) << "Unexpected InstructionSet: " << isa; |
Ian Rogers | d4c4d95 | 2014-10-16 20:31:53 -0700 | [diff] [blame] | 203 | UNREACHABLE(); |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 204 | } |
| 205 | } |
| 206 | |
| 207 | const std::vector<uint8_t>* CreateTrampoline32(InstructionSet isa, EntryPointCallingConvention abi, |
| 208 | ThreadOffset<4> offset) { |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 209 | switch (isa) { |
| 210 | case kArm: |
| 211 | case kThumb2: |
| 212 | return arm::CreateTrampoline(abi, offset); |
| 213 | case kMips: |
| 214 | return mips::CreateTrampoline(abi, offset); |
| 215 | case kX86: |
| 216 | return x86::CreateTrampoline(offset); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 217 | default: |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 218 | LOG(FATAL) << "Unexpected InstructionSet: " << isa; |
Ian Rogers | d4c4d95 | 2014-10-16 20:31:53 -0700 | [diff] [blame] | 219 | UNREACHABLE(); |
Ian Rogers | 659efe7 | 2013-08-07 22:54:13 -0700 | [diff] [blame] | 220 | } |
| 221 | } |
| 222 | |
| 223 | } // namespace art |