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review.blissroms.org / platform_art / 818d98eb563ad5d7293b8b5c40f3dabf745e611f / . / src / compiler / dataflow.cc
blob: 4d7e9d7a89bf54529c8e07aa1cf9b7533a186477 [file] [log] [blame]
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
buzbeeeaf09bc2012-11-15 14:51:41 -0800[diff] [blame]17#include "compiler_internals.h"
buzbeeefc63692012-11-14 16:31:52 -0800[diff] [blame]18#include "dataflow.h"
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]19#include "bb_opt.h"
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]20
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]21namespace art {
22
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]23/*
24 * Main table containing data flow attributes for each bytecode. The
25 * first kNumPackedOpcodes entries are for Dalvik bytecode
26 * instructions, where extended opcode at the MIR level are appended
27 * afterwards.
28 *
29 * TODO - many optimization flags are incomplete - they will only limit the
30 * scope of optimizations but will not cause mis-optimizations.
31 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]32const int oat_data_flow_attributes[kMirOpLast] = {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]33 // 00 NOP
34 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]35
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]36 // 01 MOVE vA, vB
37 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]38
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]39 // 02 MOVE_FROM16 vAA, vBBBB
40 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]41
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]42 // 03 MOVE_16 vAAAA, vBBBB
43 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]44
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]45 // 04 MOVE_WIDE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]46 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]47
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]48 // 05 MOVE_WIDE_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]49 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]50
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]51 // 06 MOVE_WIDE_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]52 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]53
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]54 // 07 MOVE_OBJECT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]55 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]56
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]57 // 08 MOVE_OBJECT_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]58 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]59
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]60 // 09 MOVE_OBJECT_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]61 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]62
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]63 // 0A MOVE_RESULT vAA
64 DF_DA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]65
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]66 // 0B MOVE_RESULT_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]67 DF_DA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]68
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]69 // 0C MOVE_RESULT_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]70 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]71
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]72 // 0D MOVE_EXCEPTION vAA
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]73 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]74
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]75 // 0E RETURN_VOID
76 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]77
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]78 // 0F RETURN vAA
79 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]80
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]81 // 10 RETURN_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]82 DF_UA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]83
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]84 // 11 RETURN_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]85 DF_UA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]86
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]87 // 12 CONST_4 vA, #+B
88 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]89
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]90 // 13 CONST_16 vAA, #+BBBB
91 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]92
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]93 // 14 CONST vAA, #+BBBBBBBB
94 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]95
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]96 // 15 CONST_HIGH16 VAA, #+BBBB0000
97 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]98
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]99 // 16 CONST_WIDE_16 vAA, #+BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]100 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]101
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]102 // 17 CONST_WIDE_32 vAA, #+BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]103 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]104
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]105 // 18 CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]106 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]107
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]108 // 19 CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]109 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]110
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]111 // 1A CONST_STRING vAA, string@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]112 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]113
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]114 // 1B CONST_STRING_JUMBO vAA, string@BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]115 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]116
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]117 // 1C CONST_CLASS vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]118 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]119
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]120 // 1D MONITOR_ENTER vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]121 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]122
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]123 // 1E MONITOR_EXIT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]124 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]125
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]126 // 1F CHK_CAST vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]127 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]128
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]129 // 20 INSTANCE_OF vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]130 DF_DA | DF_UB | DF_CORE_A | DF_REF_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]131
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]132 // 21 ARRAY_LENGTH vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]133 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_CORE_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]134
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]135 // 22 NEW_INSTANCE vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]136 DF_DA | DF_NON_NULL_DST | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]137
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]138 // 23 NEW_ARRAY vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]139 DF_DA | DF_UB | DF_NON_NULL_DST | DF_REF_A | DF_CORE_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]140
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]141 // 24 FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
142 DF_FORMAT_35C | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]143
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]144 // 25 FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
145 DF_FORMAT_3RC | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]146
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]147 // 26 FILL_ARRAY_DATA vAA, +BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]148 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]149
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]150 // 27 THROW vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]151 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]152
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]153 // 28 GOTO
154 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]155
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]156 // 29 GOTO_16
157 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]158
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]159 // 2A GOTO_32
160 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]161
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]162 // 2B PACKED_SWITCH vAA, +BBBBBBBB
163 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]164
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]165 // 2C SPARSE_SWITCH vAA, +BBBBBBBB
166 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]167
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]168 // 2D CMPL_FLOAT vAA, vBB, vCC
169 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]170
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]171 // 2E CMPG_FLOAT vAA, vBB, vCC
172 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]173
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]174 // 2F CMPL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]175 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]176
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]177 // 30 CMPG_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]178 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]179
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]180 // 31 CMP_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]181 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]182
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]183 // 32 IF_EQ vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]184 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]185
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]186 // 33 IF_NE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]187 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]188
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]189 // 34 IF_LT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]190 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]191
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]192 // 35 IF_GE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]193 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]194
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]195 // 36 IF_GT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]196 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]197
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]198 // 37 IF_LE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]199 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]200
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]201 // 38 IF_EQZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]202 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]203
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]204 // 39 IF_NEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]205 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]206
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]207 // 3A IF_LTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]208 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]209
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]210 // 3B IF_GEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]211 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]212
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]213 // 3C IF_GTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]214 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]215
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]216 // 3D IF_LEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]217 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]218
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]219 // 3E UNUSED_3E
220 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]221
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]222 // 3F UNUSED_3F
223 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]224
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]225 // 40 UNUSED_40
226 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]227
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]228 // 41 UNUSED_41
229 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]230
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]231 // 42 UNUSED_42
232 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]233
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]234 // 43 UNUSED_43
235 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]236
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]237 // 44 AGET vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]238 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]239
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]240 // 45 AGET_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]241 DF_DA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]242
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]243 // 46 AGET_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]244 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]245
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]246 // 47 AGET_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]247 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]248
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]249 // 48 AGET_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]250 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]251
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]252 // 49 AGET_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]253 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]254
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]255 // 4A AGET_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]256 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]257
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]258 // 4B APUT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]259 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]260
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]261 // 4C APUT_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]262 DF_UA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_2 | DF_RANGE_CHK_3 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]263
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]264 // 4D APUT_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]265 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]266
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]267 // 4E APUT_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]268 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]269
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]270 // 4F APUT_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]271 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]272
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]273 // 50 APUT_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]274 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]275
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]276 // 51 APUT_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]277 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]278
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]279 // 52 IGET vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]280 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]281
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]282 // 53 IGET_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]283 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]284
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]285 // 54 IGET_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]286 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]287
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]288 // 55 IGET_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]289 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]290
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]291 // 56 IGET_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]292 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]293
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]294 // 57 IGET_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]295 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]296
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]297 // 58 IGET_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]298 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]299
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]300 // 59 IPUT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]301 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]302
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]303 // 5A IPUT_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]304 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]305
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]306 // 5B IPUT_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]307 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]308
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]309 // 5C IPUT_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]310 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]311
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]312 // 5D IPUT_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]313 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]314
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]315 // 5E IPUT_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]316 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]317
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]318 // 5F IPUT_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]319 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]320
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]321 // 60 SGET vAA, field@BBBB
322 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]323
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]324 // 61 SGET_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]325 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]326
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]327 // 62 SGET_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]328 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]329
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]330 // 63 SGET_BOOLEAN vAA, field@BBBB
331 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]332
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]333 // 64 SGET_BYTE vAA, field@BBBB
334 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]335
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]336 // 65 SGET_CHAR vAA, field@BBBB
337 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]338
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]339 // 66 SGET_SHORT vAA, field@BBBB
340 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]341
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]342 // 67 SPUT vAA, field@BBBB
343 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]344
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]345 // 68 SPUT_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]346 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]347
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]348 // 69 SPUT_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]349 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]350
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]351 // 6A SPUT_BOOLEAN vAA, field@BBBB
352 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]353
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]354 // 6B SPUT_BYTE vAA, field@BBBB
355 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]356
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]357 // 6C SPUT_CHAR vAA, field@BBBB
358 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]359
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]360 // 6D SPUT_SHORT vAA, field@BBBB
361 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]362
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]363 // 6E INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
364 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]365
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]366 // 6F INVOKE_SUPER {vD, vE, vF, vG, vA}
367 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]368
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]369 // 70 INVOKE_DIRECT {vD, vE, vF, vG, vA}
370 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]371
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]372 // 71 INVOKE_STATIC {vD, vE, vF, vG, vA}
373 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]374
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]375 // 72 INVOKE_INTERFACE {vD, vE, vF, vG, vA}
376 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]377
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]378 // 73 UNUSED_73
379 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]380
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]381 // 74 INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
382 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]383
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]384 // 75 INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
385 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]386
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]387 // 76 INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
388 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]389
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]390 // 77 INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
391 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]392
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]393 // 78 INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
394 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]395
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]396 // 79 UNUSED_79
397 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]398
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]399 // 7A UNUSED_7A
400 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]401
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]402 // 7B NEG_INT vA, vB
403 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]404
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]405 // 7C NOT_INT vA, vB
406 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]407
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]408 // 7D NEG_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]409 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]410
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]411 // 7E NOT_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]412 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]413
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]414 // 7F NEG_FLOAT vA, vB
415 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]416
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]417 // 80 NEG_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]418 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]419
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]420 // 81 INT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]421 DF_DA | DF_A_WIDE | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]422
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]423 // 82 INT_TO_FLOAT vA, vB
424 DF_DA | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]425
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]426 // 83 INT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]427 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]428
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]429 // 84 LONG_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]430 DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]431
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]432 // 85 LONG_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]433 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]434
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]435 // 86 LONG_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]436 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]437
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]438 // 87 FLOAT_TO_INT vA, vB
439 DF_DA | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]440
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]441 // 88 FLOAT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]442 DF_DA | DF_A_WIDE | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]443
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]444 // 89 FLOAT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]445 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]446
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]447 // 8A DOUBLE_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]448 DF_DA | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]449
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]450 // 8B DOUBLE_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]451 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]452
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]453 // 8C DOUBLE_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]454 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]455
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]456 // 8D INT_TO_BYTE vA, vB
457 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]458
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]459 // 8E INT_TO_CHAR vA, vB
460 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]461
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]462 // 8F INT_TO_SHORT vA, vB
463 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]464
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]465 // 90 ADD_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]466 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]467
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]468 // 91 SUB_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]469 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]470
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]471 // 92 MUL_INT vAA, vBB, vCC
472 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]473
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]474 // 93 DIV_INT vAA, vBB, vCC
475 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]476
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]477 // 94 REM_INT vAA, vBB, vCC
478 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]479
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]480 // 95 AND_INT vAA, vBB, vCC
481 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]482
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]483 // 96 OR_INT vAA, vBB, vCC
484 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]485
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]486 // 97 XOR_INT vAA, vBB, vCC
487 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]488
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]489 // 98 SHL_INT vAA, vBB, vCC
490 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]491
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]492 // 99 SHR_INT vAA, vBB, vCC
493 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]494
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]495 // 9A USHR_INT vAA, vBB, vCC
496 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]497
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]498 // 9B ADD_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]499 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]500
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]501 // 9C SUB_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]502 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]503
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]504 // 9D MUL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]505 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]506
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]507 // 9E DIV_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]508 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]509
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]510 // 9F REM_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]511 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]512
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]513 // A0 AND_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]514 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]515
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]516 // A1 OR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]517 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]518
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]519 // A2 XOR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]520 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]521
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]522 // A3 SHL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]523 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]524
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]525 // A4 SHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]526 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]527
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]528 // A5 USHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]529 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]530
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]531 // A6 ADD_FLOAT vAA, vBB, vCC
532 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]533
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]534 // A7 SUB_FLOAT vAA, vBB, vCC
535 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]536
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]537 // A8 MUL_FLOAT vAA, vBB, vCC
538 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]539
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]540 // A9 DIV_FLOAT vAA, vBB, vCC
541 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]542
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]543 // AA REM_FLOAT vAA, vBB, vCC
544 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]545
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]546 // AB ADD_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]547 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]548
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]549 // AC SUB_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]550 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]551
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]552 // AD MUL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]553 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]554
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]555 // AE DIV_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]556 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]557
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]558 // AF REM_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]559 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]560
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]561 // B0 ADD_INT_2ADDR vA, vB
562 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]563
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]564 // B1 SUB_INT_2ADDR vA, vB
565 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]566
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]567 // B2 MUL_INT_2ADDR vA, vB
568 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]569
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]570 // B3 DIV_INT_2ADDR vA, vB
571 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]572
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]573 // B4 REM_INT_2ADDR vA, vB
574 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]575
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]576 // B5 AND_INT_2ADDR vA, vB
577 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]578
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]579 // B6 OR_INT_2ADDR vA, vB
580 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]581
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]582 // B7 XOR_INT_2ADDR vA, vB
583 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]584
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]585 // B8 SHL_INT_2ADDR vA, vB
586 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]587
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]588 // B9 SHR_INT_2ADDR vA, vB
589 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]590
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]591 // BA USHR_INT_2ADDR vA, vB
592 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]593
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]594 // BB ADD_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]595 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]596
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]597 // BC SUB_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]598 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]599
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]600 // BD MUL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]601 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]602
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]603 // BE DIV_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]604 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]605
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]606 // BF REM_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]607 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]608
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]609 // C0 AND_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]610 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]611
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]612 // C1 OR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]613 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]614
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]615 // C2 XOR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]616 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]617
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]618 // C3 SHL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]619 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]620
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]621 // C4 SHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]622 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]623
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]624 // C5 USHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]625 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]626
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]627 // C6 ADD_FLOAT_2ADDR vA, vB
628 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]629
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]630 // C7 SUB_FLOAT_2ADDR vA, vB
631 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]632
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]633 // C8 MUL_FLOAT_2ADDR vA, vB
634 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]635
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]636 // C9 DIV_FLOAT_2ADDR vA, vB
637 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]638
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]639 // CA REM_FLOAT_2ADDR vA, vB
640 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]641
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]642 // CB ADD_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]643 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]644
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]645 // CC SUB_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]646 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]647
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]648 // CD MUL_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]649 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]650
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]651 // CE DIV_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]652 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]653
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]654 // CF REM_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]655 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]656
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]657 // D0 ADD_INT_LIT16 vA, vB, #+CCCC
658 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]659
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]660 // D1 RSUB_INT vA, vB, #+CCCC
661 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]662
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]663 // D2 MUL_INT_LIT16 vA, vB, #+CCCC
664 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]665
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]666 // D3 DIV_INT_LIT16 vA, vB, #+CCCC
667 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]668
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]669 // D4 REM_INT_LIT16 vA, vB, #+CCCC
670 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]671
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]672 // D5 AND_INT_LIT16 vA, vB, #+CCCC
673 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]674
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]675 // D6 OR_INT_LIT16 vA, vB, #+CCCC
676 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]677
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]678 // D7 XOR_INT_LIT16 vA, vB, #+CCCC
679 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]680
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]681 // D8 ADD_INT_LIT8 vAA, vBB, #+CC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]682 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]683
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]684 // D9 RSUB_INT_LIT8 vAA, vBB, #+CC
685 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]686
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]687 // DA MUL_INT_LIT8 vAA, vBB, #+CC
688 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]689
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]690 // DB DIV_INT_LIT8 vAA, vBB, #+CC
691 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]692
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]693 // DC REM_INT_LIT8 vAA, vBB, #+CC
694 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]695
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]696 // DD AND_INT_LIT8 vAA, vBB, #+CC
697 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]698
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]699 // DE OR_INT_LIT8 vAA, vBB, #+CC
700 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]701
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]702 // DF XOR_INT_LIT8 vAA, vBB, #+CC
703 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]704
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]705 // E0 SHL_INT_LIT8 vAA, vBB, #+CC
706 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]707
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]708 // E1 SHR_INT_LIT8 vAA, vBB, #+CC
709 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]710
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]711 // E2 USHR_INT_LIT8 vAA, vBB, #+CC
712 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]713
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]714 // E3 IGET_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]715 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]716
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]717 // E4 IPUT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]718 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]719
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]720 // E5 SGET_VOLATILE
721 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]722
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]723 // E6 SPUT_VOLATILE
724 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]725
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]726 // E7 IGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]727 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]728
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]729 // E8 IGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]730 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]731
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]732 // E9 IPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]733 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]734
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]735 // EA SGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]736 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]737
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]738 // EB SPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]739 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]740
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]741 // EC BREAKPOINT
742 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]743
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]744 // ED THROW_VERIFICATION_ERROR
745 DF_NOP | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]746
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]747 // EE EXECUTE_INLINE
748 DF_FORMAT_35C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]749
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]750 // EF EXECUTE_INLINE_RANGE
751 DF_FORMAT_3RC,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]752
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]753 // F0 INVOKE_OBJECT_INIT_RANGE
754 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]755
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]756 // F1 RETURN_VOID_BARRIER
757 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]758
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]759 // F2 IGET_QUICK
760 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]761
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]762 // F3 IGET_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]763 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]764
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]765 // F4 IGET_OBJECT_QUICK
766 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]767
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]768 // F5 IPUT_QUICK
769 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]770
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]771 // F6 IPUT_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]772 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]773
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]774 // F7 IPUT_OBJECT_QUICK
775 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]776
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]777 // F8 INVOKE_VIRTUAL_QUICK
778 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]779
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]780 // F9 INVOKE_VIRTUAL_QUICK_RANGE
781 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]782
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]783 // FA INVOKE_SUPER_QUICK
784 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]785
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]786 // FB INVOKE_SUPER_QUICK_RANGE
787 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]788
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]789 // FC IPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]790 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]791
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]792 // FD SGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]793 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]794
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]795 // FE SPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]796 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]797
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]798 // FF UNUSED_FF
799 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]800
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]801 // Beginning of extended MIR opcodes
802 // 100 MIR_PHI
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]803 DF_DA | DF_NULL_TRANSFER_N,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]804
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]805 // 101 MIR_COPY
806 DF_DA | DF_UB | DF_IS_MOVE,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]807
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]808 // 102 MIR_FUSED_CMPL_FLOAT
809 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]810
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]811 // 103 MIR_FUSED_CMPG_FLOAT
812 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]813
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]814 // 104 MIR_FUSED_CMPL_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]815 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]816
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]817 // 105 MIR_FUSED_CMPG_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]818 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]819
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]820 // 106 MIR_FUSED_CMP_LONG
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]821 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]822
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]823 // 107 MIR_NOP
824 DF_NOP,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]825
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]826 // 108 MIR_NULL_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]827 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]828
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]829 // 109 MIR_RANGE_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]830 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]831
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]832 // 110 MIR_DIV_ZERO_CHECK
833 0,
834
835 // 111 MIR_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]836 0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]837};
838
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]839/* Return the base virtual register for a SSA name */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]840int SRegToVReg(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]841{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]842 DCHECK_LT(ssa_reg, static_cast<int>(cu->ssa_base_vregs->num_used));
843 return GET_ELEM_N(cu->ssa_base_vregs, int, ssa_reg);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]844}
845
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]846int SRegToSubscript(const CompilationUnit* cu, int ssa_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]847{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]848 DCHECK(ssa_reg < static_cast<int>(cu->ssa_subscripts->num_used));
849 return GET_ELEM_N(cu->ssa_subscripts, int, ssa_reg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]850}
851
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]852static int GetSSAUseCount(CompilationUnit* cu, int s_reg)
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]853{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]854 DCHECK(s_reg < static_cast<int>(cu->raw_use_counts.num_used));
855 return cu->raw_use_counts.elem_list[s_reg];
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]856}
857
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]858static std::string GetSSAName(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]859{
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]860 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
861}
862
863// Similar to GetSSAName, but if ssa name represents an immediate show that as well.
864static std::string GetSSANameWithConst(const CompilationUnit* cu, int ssa_reg, bool singles_only)
865{
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]866 if (cu->reg_location == NULL) {
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]867 // Pre-SSA - just use the standard name
868 return GetSSAName(cu, ssa_reg);
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]869 }
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]870 if (IsConst(cu, cu->reg_location[ssa_reg])) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]871 if (!singles_only && cu->reg_location[ssa_reg].wide) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]872 return StringPrintf("v%d_%d#0x%llx", SRegToVReg(cu, ssa_reg),
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]873 SRegToSubscript(cu, ssa_reg),
874 ConstantValueWide(cu, cu->reg_location[ssa_reg]));
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]875 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]876 return StringPrintf("v%d_%d#0x%x", SRegToVReg(cu, ssa_reg),
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]877 SRegToSubscript(cu, ssa_reg),
878 ConstantValue(cu, cu->reg_location[ssa_reg]));
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]879 }
880 } else {
881 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
882 }
883}
884
885
886char* GetDalvikDisassembly(CompilationUnit* cu, const MIR* mir)
887{
888 DecodedInstruction insn = mir->dalvikInsn;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]889 std::string str;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]890 int flags = 0;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]891 int opcode = insn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]892 char* ret;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]893 bool nop = false;
894 SSARepresentation* ssa_rep = mir->ssa_rep;
895 Instruction::Format dalvik_format = Instruction::k10x; // Default to no-operand format
896 int defs = (ssa_rep != NULL) ? ssa_rep->num_defs : 0;
897 int uses = (ssa_rep != NULL) ? ssa_rep->num_uses : 0;
898
899 // Handle special cases.
900 if ((opcode == kMirOpCheck) || (opcode == kMirOpCheckPart2)) {
901 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
902 str.append(": ");
903 // Recover the original Dex instruction
904 insn = mir->meta.throw_insn->dalvikInsn;
905 ssa_rep = mir->meta.throw_insn->ssa_rep;
906 defs = ssa_rep->num_defs;
907 uses = ssa_rep->num_uses;
908 opcode = insn.opcode;
909 } else if (opcode == kMirOpNop) {
910 str.append("[");
911 insn.opcode = mir->meta.original_opcode;
912 opcode = mir->meta.original_opcode;
913 nop = true;
914 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]915
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]916 if (opcode >= kMirOpFirst) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]917 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]918 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]919 dalvik_format = Instruction::FormatOf(insn.opcode);
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]920 flags = Instruction::FlagsOf(insn.opcode);
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]921 str.append(Instruction::Name(insn.opcode));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]922 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]923
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]924 if (opcode == kMirOpPhi) {
925 int* incoming = reinterpret_cast<int*>(insn.vB);
926 str.append(StringPrintf(" %s = (%s",
927 GetSSANameWithConst(cu, ssa_rep->defs[0], true).c_str(),
928 GetSSANameWithConst(cu, ssa_rep->uses[0], true).c_str()));
929 str.append(StringPrintf(":%d",incoming[0]));
930 int i;
931 for (i = 1; i < uses; i++) {
932 str.append(StringPrintf(", %s:%d",
933 GetSSANameWithConst(cu, ssa_rep->uses[i], true).c_str(),
934 incoming[i]));
935 }
936 str.append(")");
937 } else if (flags & Instruction::kBranch) {
938 // For branches, decode the instructions to print out the branch targets.
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]939 int offset = 0;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]940 switch (dalvik_format) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]941 case Instruction::k21t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]942 str.append(StringPrintf(" %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]943 offset = insn.vB;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]944 break;
945 case Instruction::k22t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]946 str.append(StringPrintf(" %s, %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str(),
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]947 GetSSANameWithConst(cu, ssa_rep->uses[1], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]948 offset = insn.vC;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]949 break;
950 case Instruction::k10t:
951 case Instruction::k20t:
952 case Instruction::k30t:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]953 offset = insn.vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]954 break;
955 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]956 LOG(FATAL) << "Unexpected branch format " << dalvik_format << " from " << insn.opcode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]957 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]958 str.append(StringPrintf(" 0x%x (%c%x)", mir->offset + offset,
959 offset > 0 ? '+' : '-', offset > 0 ? offset : -offset));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]960 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]961 // For invokes-style formats, treat wide regs as a pair of singles
962 bool show_singles = ((dalvik_format == Instruction::k35c) ||
963 (dalvik_format == Instruction::k3rc));
964 if (defs != 0) {
965 str.append(StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->defs[0], false).c_str()));
966 if (uses != 0) {
967 str.append(", ");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]968 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]969 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]970 for (int i = 0; i < uses; i++) {
971 str.append(
972 StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->uses[i], show_singles).c_str()));
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]973 if (!show_singles && (cu->reg_location != NULL) && cu->reg_location[i].wide) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]974 // For the listing, skip the high sreg.
975 i++;
976 }
977 if (i != (uses -1)) {
978 str.append(",");
979 }
980 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]981 switch (dalvik_format) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]982 case Instruction::k11n: // Add one immediate from vB
983 case Instruction::k21s:
984 case Instruction::k31i:
985 case Instruction::k21h:
986 str.append(StringPrintf(", #%d", insn.vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]987 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]988 case Instruction::k51l: // Add one wide immediate
989 str.append(StringPrintf(", #%lld", insn.vB_wide));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]990 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]991 case Instruction::k21c: // One register, one string/type/method index
992 case Instruction::k31c:
993 str.append(StringPrintf(", index #%d", insn.vB));
994 break;
995 case Instruction::k22c: // Two registers, one string/type/method index
996 str.append(StringPrintf(", index #%d", insn.vC));
997 break;
998 case Instruction::k22s: // Add one immediate from vC
999 case Instruction::k22b:
1000 str.append(StringPrintf(", #%d", insn.vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1001 break;
1002 default:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]1003 ; // Nothing left to print
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1004 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1005 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]1006 if (nop) {
1007 str.append("]--optimized away");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1008 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1009 int length = str.length() + 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1010 ret = static_cast<char*>(NewMem(cu, length, false, kAllocDFInfo));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1011 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1012 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1013}
1014
1015/* Any register that is used before being defined is considered live-in */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1016static void HandleLiveInUse(CompilationUnit* cu, ArenaBitVector* use_v, ArenaBitVector* def_v,
1017 ArenaBitVector* live_in_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1018{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1019 SetBit(cu, use_v, dalvik_reg_id);
1020 if (!IsBitSet(def_v, dalvik_reg_id)) {
1021 SetBit(cu, live_in_v, dalvik_reg_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1022 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1023}
1024
1025/* Mark a reg as being defined */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1026static void HandleDef(CompilationUnit* cu, ArenaBitVector* def_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1027{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1028 SetBit(cu, def_v, dalvik_reg_id);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1029}
1030
1031/*
1032 * Find out live-in variables for natural loops. Variables that are live-in in
1033 * the main loop body are considered to be defined in the entry block.
1034 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1035bool FindLocalLiveIn(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1036{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1037 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1038 ArenaBitVector *use_v, *def_v, *live_in_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1039
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1040 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1041
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1042 use_v = bb->data_flow_info->use_v =
1043 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapUse);
1044 def_v = bb->data_flow_info->def_v =
1045 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapDef);
1046 live_in_v = bb->data_flow_info->live_in_v =
1047 AllocBitVector(cu, cu->num_dalvik_registers, false,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1048 kBitMapLiveIn);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1049
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1050 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1051 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1052 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1053
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1054 if (df_attributes & DF_HAS_USES) {
1055 if (df_attributes & DF_UA) {
1056 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA);
1057 if (df_attributes & DF_A_WIDE) {
1058 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1059 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1060 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1061 if (df_attributes & DF_UB) {
1062 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB);
1063 if (df_attributes & DF_B_WIDE) {
1064 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1065 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1066 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1067 if (df_attributes & DF_UC) {
1068 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC);
1069 if (df_attributes & DF_C_WIDE) {
1070 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1071 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1072 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1073 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1074 if (df_attributes & DF_FORMAT_35C) {
1075 for (unsigned int i = 0; i < d_insn->vA; i++) {
1076 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->arg[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1077 }
1078 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1079 if (df_attributes & DF_FORMAT_3RC) {
1080 for (unsigned int i = 0; i < d_insn->vA; i++) {
1081 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1082 }
1083 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1084 if (df_attributes & DF_HAS_DEFS) {
1085 HandleDef(cu, def_v, d_insn->vA);
1086 if (df_attributes & DF_A_WIDE) {
1087 HandleDef(cu, def_v, d_insn->vA+1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1088 }
1089 }
1090 }
1091 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1092}
1093
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1094static int AddNewSReg(CompilationUnit* cu, int v_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1095{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1096 // Compiler temps always have a subscript of 0
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1097 int subscript = (v_reg < 0) ? 0 : ++cu->ssa_last_defs[v_reg];
1098 int ssa_reg = cu->num_ssa_regs++;
1099 InsertGrowableList(cu, cu->ssa_base_vregs, v_reg);
1100 InsertGrowableList(cu, cu->ssa_subscripts, subscript);
1101 std::string ssa_name = GetSSAName(cu, ssa_reg);
1102 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, false, kAllocDFInfo));
1103 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1104 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
1105 DCHECK_EQ(cu->ssa_base_vregs->num_used, cu->ssa_subscripts->num_used);
1106 return ssa_reg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1107}
1108
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1109/* Find out the latest SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1110static void HandleSSAUse(CompilationUnit* cu, int* uses, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1111{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1112 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1113 uses[reg_index] = cu->vreg_to_ssa_map[dalvik_reg];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1114}
1115
1116/* Setup a new SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1117static void HandleSSADef(CompilationUnit* cu, int* defs, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1118{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1119 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1120 int ssa_reg = AddNewSReg(cu, dalvik_reg);
1121 cu->vreg_to_ssa_map[dalvik_reg] = ssa_reg;
1122 defs[reg_index] = ssa_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1123}
1124
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1125/* Look up new SSA names for format_35c instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1126static void DataFlowSSAFormat35C(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1127{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1128 DecodedInstruction *d_insn = &mir->dalvikInsn;
1129 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1130 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1131
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1132 mir->ssa_rep->num_uses = num_uses;
1133 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1134 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1135 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1136 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1137
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1138 for (i = 0; i < num_uses; i++) {
1139 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->arg[i], i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1140 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1141}
1142
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1143/* Look up new SSA names for format_3rc instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1144static void DataFlowSSAFormat3RC(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1145{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1146 DecodedInstruction *d_insn = &mir->dalvikInsn;
1147 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1148 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1149
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1150 mir->ssa_rep->num_uses = num_uses;
1151 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1152 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1153 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1154 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1155
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1156 for (i = 0; i < num_uses; i++) {
1157 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+i, i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1158 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1159}
1160
1161/* Entry function to convert a block into SSA representation */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1162bool DoSSAConversion(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1163{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1164 MIR* mir;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1165
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1166 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1167
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1168 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1169 mir->ssa_rep = static_cast<struct SSARepresentation *>(NewMem(cu, sizeof(SSARepresentation),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1170 true, kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1171
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1172 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1173
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1174 // If not a pseudo-op, note non-leaf or can throw
1175 if (static_cast<int>(mir->dalvikInsn.opcode) <
1176 static_cast<int>(kNumPackedOpcodes)) {
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]1177 int flags = Instruction::FlagsOf(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1178
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1179 if (flags & Instruction::kThrow) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1180 cu->attrs &= ~METHOD_IS_THROW_FREE;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1181 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1182
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1183 if (flags & Instruction::kInvoke) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1184 cu->attrs &= ~METHOD_IS_LEAF;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1185 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1186 }
1187
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1188 int num_uses = 0;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1189
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1190 if (df_attributes & DF_FORMAT_35C) {
1191 DataFlowSSAFormat35C(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1192 continue;
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1193 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1194
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1195 if (df_attributes & DF_FORMAT_3RC) {
1196 DataFlowSSAFormat3RC(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1197 continue;
1198 }
1199
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1200 if (df_attributes & DF_HAS_USES) {
1201 if (df_attributes & DF_UA) {
1202 num_uses++;
1203 if (df_attributes & DF_A_WIDE) {
1204 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1205 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1206 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1207 if (df_attributes & DF_UB) {
1208 num_uses++;
1209 if (df_attributes & DF_B_WIDE) {
1210 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1211 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1212 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1213 if (df_attributes & DF_UC) {
1214 num_uses++;
1215 if (df_attributes & DF_C_WIDE) {
1216 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1217 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1218 }
1219 }
1220
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1221 if (num_uses) {
1222 mir->ssa_rep->num_uses = num_uses;
1223 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1224 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1225 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1226 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1227 }
1228
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1229 int num_defs = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1230
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1231 if (df_attributes & DF_HAS_DEFS) {
1232 num_defs++;
1233 if (df_attributes & DF_A_WIDE) {
1234 num_defs++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1235 }
1236 }
1237
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1238 if (num_defs) {
1239 mir->ssa_rep->num_defs = num_defs;
1240 mir->ssa_rep->defs = static_cast<int*>(NewMem(cu, sizeof(int) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1241 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1242 mir->ssa_rep->fp_def = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1243 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1244 }
1245
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1246 DecodedInstruction *d_insn = &mir->dalvikInsn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1247
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1248 if (df_attributes & DF_HAS_USES) {
1249 num_uses = 0;
1250 if (df_attributes & DF_UA) {
1251 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1252 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA, num_uses++);
1253 if (df_attributes & DF_A_WIDE) {
1254 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1255 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1256 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1257 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1258 if (df_attributes & DF_UB) {
1259 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1260 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB, num_uses++);
1261 if (df_attributes & DF_B_WIDE) {
1262 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1263 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1264 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1265 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1266 if (df_attributes & DF_UC) {
1267 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1268 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC, num_uses++);
1269 if (df_attributes & DF_C_WIDE) {
1270 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1271 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1272 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1273 }
1274 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1275 if (df_attributes & DF_HAS_DEFS) {
1276 mir->ssa_rep->fp_def[0] = df_attributes & DF_FP_A;
1277 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA, 0);
1278 if (df_attributes & DF_A_WIDE) {
1279 mir->ssa_rep->fp_def[1] = df_attributes & DF_FP_A;
1280 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA+1, 1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1281 }
1282 }
1283 }
1284
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1285 if (!cu->disable_dataflow) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1286 /*
1287 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
1288 * input to PHI nodes can be derived from the snapshot of all
1289 * predecessor blocks.
1290 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1291 bb->data_flow_info->vreg_to_ssa_map =
1292 static_cast<int*>(NewMem(cu, sizeof(int) * cu->num_dalvik_registers, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1293 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1294
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1295 memcpy(bb->data_flow_info->vreg_to_ssa_map, cu->vreg_to_ssa_map,
1296 sizeof(int) * cu->num_dalvik_registers);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1297 }
1298 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1299}
1300
1301/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1302static void SetConstant(CompilationUnit* cu, int32_t ssa_reg, int value)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1303{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1304 SetBit(cu, cu->is_constant_v, ssa_reg);
1305 cu->constant_values[ssa_reg] = value;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1306}
1307
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1308static void SetConstantWide(CompilationUnit* cu, int ssa_reg, int64_t value)
1309{
1310 SetBit(cu, cu->is_constant_v, ssa_reg);
1311 cu->constant_values[ssa_reg] = Low32Bits(value);
1312 cu->constant_values[ssa_reg + 1] = High32Bits(value);
1313}
1314
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1315bool DoConstantPropogation(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1316{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1317 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1318 ArenaBitVector *is_constant_v = cu->is_constant_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1319
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1320 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1321 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1322
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1323 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1324
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1325 if (!(df_attributes & DF_HAS_DEFS)) continue;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1326
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1327 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1328 if (df_attributes & DF_SETS_CONST) {
1329 if (df_attributes & DF_DA) {
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1330 int32_t vB = static_cast<int32_t>(d_insn->vB);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1331 switch (d_insn->opcode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1332 case Instruction::CONST_4:
1333 case Instruction::CONST_16:
1334 case Instruction::CONST:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1335 SetConstant(cu, mir->ssa_rep->defs[0], vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1336 break;
1337 case Instruction::CONST_HIGH16:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1338 SetConstant(cu, mir->ssa_rep->defs[0], vB << 16);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1339 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1340 case Instruction::CONST_WIDE_16:
1341 case Instruction::CONST_WIDE_32:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1342 SetConstantWide(cu, mir->ssa_rep->defs[0], static_cast<int64_t>(vB));
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1343 break;
1344 case Instruction::CONST_WIDE:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1345 SetConstantWide(cu, mir->ssa_rep->defs[0],d_insn->vB_wide);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1346 break;
1347 case Instruction::CONST_WIDE_HIGH16:
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1348 SetConstantWide(cu, mir->ssa_rep->defs[0], static_cast<int64_t>(vB) << 48);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1349 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1350 default:
1351 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1352 }
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1353 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1354 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1355 } else if (df_attributes & DF_IS_MOVE) {
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1356 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1357
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1358 for (i = 0; i < mir->ssa_rep->num_uses; i++) {
1359 if (!IsBitSet(is_constant_v, mir->ssa_rep->uses[i])) break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1360 }
1361 /* Move a register holding a constant to another register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1362 if (i == mir->ssa_rep->num_uses) {
1363 SetConstant(cu, mir->ssa_rep->defs[0],
1364 cu->constant_values[mir->ssa_rep->uses[0]]);
1365 if (df_attributes & DF_A_WIDE) {
1366 SetConstant(cu, mir->ssa_rep->defs[1],
1367 cu->constant_values[mir->ssa_rep->uses[1]]);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1368 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1369 }
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1370 } else if (df_attributes & DF_NULL_TRANSFER_N) {
1371 /*
1372 * Mark const sregs that appear in merges. Need to flush those to home location.
1373 * TUNING: instead of flushing on def, we could insert a flush on the appropriate
1374 * edge[s].
1375 */
1376 DCHECK_EQ(static_cast<int32_t>(d_insn->opcode), kMirOpPhi);
1377 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
1378 if (IsConst(cu, mir->ssa_rep->uses[i])) {
1379 SetBit(cu, cu->must_flush_constant_v, mir->ssa_rep->uses[i]);
1380 }
1381 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1382 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1383 }
1384 /* TODO: implement code to handle arithmetic operations */
1385 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1386}
1387
1388/* Setup the basic data structures for SSA conversion */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1389void CompilerInitializeSSAConversion(CompilationUnit* cu)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1390{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1391 int i;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1392 int num_dalvik_reg = cu->num_dalvik_registers;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1393
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1394 cu->ssa_base_vregs =
1395 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1396 cu->ssa_subscripts =
1397 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1398 cu->ssa_strings =
1399 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1400 // Create the ssa mappings, estimating the max size
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1401 CompilerInitGrowableList(cu, cu->ssa_base_vregs,
1402 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1403 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1404 CompilerInitGrowableList(cu, cu->ssa_subscripts,
1405 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1406 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1407 CompilerInitGrowableList(cu, cu->ssa_strings,
1408 num_dalvik_reg + cu->def_count + 128,
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1409 kListSSAtoDalvikMap);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1410 /*
1411 * Initial number of SSA registers is equal to the number of Dalvik
1412 * registers.
1413 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1414 cu->num_ssa_regs = num_dalvik_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1415
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1416 /*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1417 * Initialize the SSA2Dalvik map list. For the first num_dalvik_reg elements,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1418 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
1419 * into "(0 << 16) | i"
1420 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1421 for (i = 0; i < num_dalvik_reg; i++) {
1422 InsertGrowableList(cu, cu->ssa_base_vregs, i);
1423 InsertGrowableList(cu, cu->ssa_subscripts, 0);
1424 std::string ssa_name = GetSSAName(cu, i);
1425 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, true, kAllocDFInfo));
1426 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1427 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1428 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1429
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1430 /*
1431 * Initialize the DalvikToSSAMap map. There is one entry for each
1432 * Dalvik register, and the SSA names for those are the same.
1433 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1434 cu->vreg_to_ssa_map =
1435 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1436 /* Keep track of the higest def for each dalvik reg */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1437 cu->ssa_last_defs =
1438 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1439
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1440 for (i = 0; i < num_dalvik_reg; i++) {
1441 cu->vreg_to_ssa_map[i] = i;
1442 cu->ssa_last_defs[i] = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1443 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1444
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1445 /* Add ssa reg for Method* */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1446 cu->method_sreg = AddNewSReg(cu, SSA_METHOD_BASEREG);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1447
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1448 /*
1449 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
1450 */
1451 GrowableListIterator iterator;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1452
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1453 GrowableListIteratorInit(&cu->block_list, &iterator);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1454
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1455 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1456 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1457 if (bb == NULL) break;
1458 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1459 if (bb->block_type == kDalvikByteCode ||
1460 bb->block_type == kEntryBlock ||
1461 bb->block_type == kExitBlock) {
1462 bb->data_flow_info = static_cast<BasicBlockDataFlow*>(NewMem(cu, sizeof(BasicBlockDataFlow),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1463 true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1464 }
1465 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1466}
1467
1468/* Clear the visited flag for each BB */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1469bool ClearVisitedFlag(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1470{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1471 bb->visited = false;
1472 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1473}
1474
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1475void DataFlowAnalysisDispatcher(CompilationUnit* cu,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1476 bool (*func)(CompilationUnit*, BasicBlock*),
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1477 DataFlowAnalysisMode dfa_mode,
1478 bool is_iterative)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1479{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1480 bool change = true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1481
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1482 while (change) {
1483 change = false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1484
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1485 switch (dfa_mode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1486 /* Scan all blocks and perform the operations specified in func */
1487 case kAllNodes:
1488 {
1489 GrowableListIterator iterator;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1490 GrowableListIteratorInit(&cu->block_list, &iterator);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1491 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1492 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1493 if (bb == NULL) break;
1494 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1495 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1496 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1497 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1498 break;
1499 /* Scan reachable blocks and perform the ops specified in func. */
1500 case kReachableNodes:
1501 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1502 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1503 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1504 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1505
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1506 for (idx = 0; idx < num_reachable_blocks; idx++) {
1507 int block_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1508 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1509 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, block_idx));
1510 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1511 }
1512 }
1513 break;
1514
1515 /* Scan reachable blocks by pre-order dfs and invoke func on each. */
1516 case kPreOrderDFSTraversal:
1517 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1518 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1519 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1520 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1521
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1522 for (idx = 0; idx < num_reachable_blocks; idx++) {
1523 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1524 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1525 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, dfs_idx));
1526 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1527 }
1528 }
1529 break;
1530 /* Scan reachable blocks post-order dfs and invoke func on each. */
1531 case kPostOrderDFSTraversal:
1532 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1533 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1534 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1535 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1536
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1537 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1538 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1539 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1540 reinterpret_cast<BasicBlock *>( GrowableListGetElement(block_list, dfs_idx));
1541 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1542 }
1543 }
1544 break;
1545 /* Scan reachable post-order dom tree and invoke func on each. */
1546 case kPostOrderDOMTraversal:
1547 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1548 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1549 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1550 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1551
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1552 for (idx = 0; idx < num_reachable_blocks; idx++) {
1553 int dom_idx = cu->dom_post_order_traversal.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1554 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1555 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, dom_idx));
1556 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1557 }
1558 }
1559 break;
1560 /* Scan reachable blocks reverse post-order dfs, invoke func on each */
1561 case kReversePostOrderTraversal:
1562 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1563 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1564 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1565 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1566
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1567 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1568 int rev_idx = cu->dfs_post_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1569 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1570 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, rev_idx));
1571 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1572 }
1573 }
1574 break;
1575 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1576 LOG(FATAL) << "Unknown traversal mode: " << dfa_mode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1577 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1578 /* If is_iterative is false, exit the loop after the first iteration */
1579 change &= is_iterative;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1580 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1581}
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1582
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1583/* Advance to next strictly dominated MIR node in an extended basic block */
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1584static MIR* AdvanceMIR(CompilationUnit* cu, BasicBlock** p_bb, MIR* mir)
1585{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1586 BasicBlock* bb = *p_bb;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1587 if (mir != NULL) {
1588 mir = mir->next;
1589 if (mir == NULL) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1590 bb = bb->fall_through;
1591 if ((bb == NULL) || bb->predecessors->num_used != 1) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1592 mir = NULL;
1593 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1594 *p_bb = bb;
1595 mir = bb->first_mir_insn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1596 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1597 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1598 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1599 return mir;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1600}
1601
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1602/*
1603 * To be used at an invoke mir. If the logically next mir node represents
1604 * a move-result, return it. Else, return NULL. If a move-result exists,
1605 * it is required to immediately follow the invoke with no intervening
1606 * opcodes or incoming arcs. However, if the result of the invoke is not
1607 * used, a move-result may not be present.
1608 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1609MIR* FindMoveResult(CompilationUnit* cu, BasicBlock* bb, MIR* mir)
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1610{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1611 BasicBlock* tbb = bb;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1612 mir = AdvanceMIR(cu, &tbb, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1613 while (mir != NULL) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1614 int opcode = mir->dalvikInsn.opcode;
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1615 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
buzbee52ed7762012-06-13 23:43:14 -0700[diff] [blame]1616 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1617 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1618 break;
1619 }
1620 // Keep going if pseudo op, otherwise terminate
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1621 if (opcode < kNumPackedOpcodes) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1622 mir = NULL;
1623 } else {
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1624 mir = AdvanceMIR(cu, &tbb, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1625 }
1626 }
1627 return mir;
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1628}
1629
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1630static BasicBlock* NextDominatedBlock(CompilationUnit* cu, BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1631{
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1632 DCHECK((bb->block_type == kEntryBlock) || (bb->block_type == kDalvikByteCode)
1633 || (bb->block_type == kExitBlock));
1634 bb = bb->fall_through;
1635 if (bb == NULL || (bb->predecessors->num_used != 1)) {
1636 return NULL;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1637 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1638 DCHECK((bb->block_type == kDalvikByteCode) || (bb->block_type == kExitBlock));
1639 return bb;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1640}
1641
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1642/* Do some MIR-level extended basic block optimizations */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1643static bool BasicBlockOpt(CompilationUnit* cu, BasicBlock* bb)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1644{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1645 int num_temps = 0;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1646 BBOpt bb_opt(cu);
1647 while (bb != NULL) {
1648 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
1649 // TUNING: use the returned value number for CSE.
1650 bb_opt.GetValueNumber(mir);
1651 // Look for interesting opcodes, skip otherwise
1652 Instruction::Code opcode = mir->dalvikInsn.opcode;
1653 switch (opcode) {
1654 case Instruction::CMPL_FLOAT:
1655 case Instruction::CMPL_DOUBLE:
1656 case Instruction::CMPG_FLOAT:
1657 case Instruction::CMPG_DOUBLE:
1658 case Instruction::CMP_LONG:
1659 if (cu->gen_bitcode) {
1660 // Bitcode doesn't allow this optimization.
1661 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1662 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1663 if (mir->next != NULL) {
1664 MIR* mir_next = mir->next;
1665 Instruction::Code br_opcode = mir_next->dalvikInsn.opcode;
1666 ConditionCode ccode = kCondNv;
1667 switch(br_opcode) {
1668 case Instruction::IF_EQZ:
1669 ccode = kCondEq;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1670 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1671 case Instruction::IF_NEZ:
1672 ccode = kCondNe;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1673 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1674 case Instruction::IF_LTZ:
1675 ccode = kCondLt;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1676 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1677 case Instruction::IF_GEZ:
1678 ccode = kCondGe;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1679 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1680 case Instruction::IF_GTZ:
1681 ccode = kCondGt;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1682 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1683 case Instruction::IF_LEZ:
1684 ccode = kCondLe;
1685 break;
1686 default:
1687 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1688 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1689 // Make sure result of cmp is used by next insn and nowhere else
1690 if ((ccode != kCondNv) &&
1691 (mir->ssa_rep->defs[0] == mir_next->ssa_rep->uses[0]) &&
1692 (GetSSAUseCount(cu, mir->ssa_rep->defs[0]) == 1)) {
1693 mir_next->dalvikInsn.arg[0] = ccode;
1694 switch(opcode) {
1695 case Instruction::CMPL_FLOAT:
1696 mir_next->dalvikInsn.opcode =
1697 static_cast<Instruction::Code>(kMirOpFusedCmplFloat);
1698 break;
1699 case Instruction::CMPL_DOUBLE:
1700 mir_next->dalvikInsn.opcode =
1701 static_cast<Instruction::Code>(kMirOpFusedCmplDouble);
1702 break;
1703 case Instruction::CMPG_FLOAT:
1704 mir_next->dalvikInsn.opcode =
1705 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat);
1706 break;
1707 case Instruction::CMPG_DOUBLE:
1708 mir_next->dalvikInsn.opcode =
1709 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble);
1710 break;
1711 case Instruction::CMP_LONG:
1712 mir_next->dalvikInsn.opcode =
1713 static_cast<Instruction::Code>(kMirOpFusedCmpLong);
1714 break;
1715 default: LOG(ERROR) << "Unexpected opcode: " << opcode;
1716 }
1717 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
1718 mir_next->ssa_rep->num_uses = mir->ssa_rep->num_uses;
1719 mir_next->ssa_rep->uses = mir->ssa_rep->uses;
1720 mir_next->ssa_rep->fp_use = mir->ssa_rep->fp_use;
1721 mir_next->ssa_rep->num_defs = 0;
1722 mir->ssa_rep->num_uses = 0;
1723 mir->ssa_rep->num_defs = 0;
1724 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1725 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1726 break;
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]1727 case Instruction::GOTO:
1728 case Instruction::GOTO_16:
1729 case Instruction::GOTO_32:
1730 case Instruction::IF_EQ:
1731 case Instruction::IF_NE:
1732 case Instruction::IF_LT:
1733 case Instruction::IF_GE:
1734 case Instruction::IF_GT:
1735 case Instruction::IF_LE:
1736 case Instruction::IF_EQZ:
1737 case Instruction::IF_NEZ:
1738 case Instruction::IF_LTZ:
1739 case Instruction::IF_GEZ:
1740 case Instruction::IF_GTZ:
1741 case Instruction::IF_LEZ:
1742 if (bb->taken->dominates_return) {
1743 mir->optimization_flags |= MIR_IGNORE_SUSPEND_CHECK;
1744 if (cu->verbose) {
1745 LOG(INFO) << "Suppressed suspend check at 0x" << std::hex << mir->offset;
1746 }
1747 }
1748 break;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1749 default:
1750 break;
1751 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1752 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]1753 bb = NextDominatedBlock(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1754 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1755
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1756 if (num_temps > cu->num_compiler_temps) {
1757 cu->num_compiler_temps = num_temps;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1758 }
1759 return true;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1760}
1761
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1762static bool NullCheckEliminationInit(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1763{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1764 if (bb->data_flow_info == NULL) return false;
1765 bb->data_flow_info->ending_null_check_v =
1766 AllocBitVector(cu, cu->num_ssa_regs, false, kBitMapNullCheck);
1767 ClearAllBits(bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1768 return true;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1769}
1770
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1771/* Collect stats on number of checks removed */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1772static bool CountChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1773{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1774 if (bb->data_flow_info == NULL) return false;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1775 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1776 if (mir->ssa_rep == NULL) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1777 continue;
1778 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1779 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1780 if (df_attributes & DF_HAS_NULL_CHKS) {
1781 cu->checkstats->null_checks++;
1782 if (mir->optimization_flags & MIR_IGNORE_NULL_CHECK) {
1783 cu->checkstats->null_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1784 }
1785 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1786 if (df_attributes & DF_HAS_RANGE_CHKS) {
1787 cu->checkstats->range_checks++;
1788 if (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK) {
1789 cu->checkstats->range_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1790 }
1791 }
1792 }
1793 return false;
1794}
1795
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1796/* Try to make common case the fallthrough path */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1797static bool LayoutBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1798{
1799 // TODO: For now, just looking for direct throws. Consider generalizing for profile feedback
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1800 if (!bb->explicit_throw) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1801 return false;
1802 }
1803 BasicBlock* walker = bb;
1804 while (true) {
1805 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1806 if ((walker->block_type == kEntryBlock) || (walker->predecessors->num_used != 1)) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1807 break;
1808 }
1809 BasicBlock* prev = GET_ELEM_N(walker->predecessors, BasicBlock*, 0);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1810 if (prev->conditional_branch) {
1811 if (prev->fall_through == walker) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1812 // Already done - return
1813 break;
1814 }
1815 DCHECK_EQ(walker, prev->taken);
1816 // Got one. Flip it and exit
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1817 Instruction::Code opcode = prev->last_mir_insn->dalvikInsn.opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1818 switch (opcode) {
1819 case Instruction::IF_EQ: opcode = Instruction::IF_NE; break;
1820 case Instruction::IF_NE: opcode = Instruction::IF_EQ; break;
1821 case Instruction::IF_LT: opcode = Instruction::IF_GE; break;
1822 case Instruction::IF_GE: opcode = Instruction::IF_LT; break;
1823 case Instruction::IF_GT: opcode = Instruction::IF_LE; break;
1824 case Instruction::IF_LE: opcode = Instruction::IF_GT; break;
1825 case Instruction::IF_EQZ: opcode = Instruction::IF_NEZ; break;
1826 case Instruction::IF_NEZ: opcode = Instruction::IF_EQZ; break;
1827 case Instruction::IF_LTZ: opcode = Instruction::IF_GEZ; break;
1828 case Instruction::IF_GEZ: opcode = Instruction::IF_LTZ; break;
1829 case Instruction::IF_GTZ: opcode = Instruction::IF_LEZ; break;
1830 case Instruction::IF_LEZ: opcode = Instruction::IF_GTZ; break;
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1831 default: LOG(FATAL) << "Unexpected opcode " << opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1832 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1833 prev->last_mir_insn->dalvikInsn.opcode = opcode;
1834 BasicBlock* t_bb = prev->taken;
1835 prev->taken = prev->fall_through;
1836 prev->fall_through = t_bb;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1837 break;
1838 }
1839 walker = prev;
1840 }
1841 return false;
1842}
1843
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1844/* Combine any basic blocks terminated by instructions that we now know can't throw */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1845static bool CombineBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1846{
1847 // Loop here to allow combining a sequence of blocks
1848 while (true) {
1849 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1850 if ((bb->first_mir_insn == NULL)
1851 || (bb->data_flow_info == NULL)
1852 || (bb->block_type == kExceptionHandling)
1853 || (bb->block_type == kExitBlock)
1854 || (bb->block_type == kDead)
1855 || ((bb->taken == NULL) || (bb->taken->block_type != kExceptionHandling))
1856 || (bb->successor_block_list.block_list_type != kNotUsed)
1857 || (static_cast<int>(bb->last_mir_insn->dalvikInsn.opcode) != kMirOpCheck)) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1858 break;
1859 }
1860
1861 // Test the kMirOpCheck instruction
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1862 MIR* mir = bb->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1863 // Grab the attributes from the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1864 MIR* throw_insn = mir->meta.throw_insn;
1865 int df_attributes = oat_data_flow_attributes[throw_insn->dalvikInsn.opcode];
1866 bool can_combine = true;
1867 if (df_attributes & DF_HAS_NULL_CHKS) {
1868 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_NULL_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1869 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1870 if (df_attributes & DF_HAS_RANGE_CHKS) {
1871 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_RANGE_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1872 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1873 if (!can_combine) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1874 break;
1875 }
1876 // OK - got one. Combine
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1877 BasicBlock* bb_next = bb->fall_through;
1878 DCHECK(!bb_next->catch_entry);
1879 DCHECK_EQ(bb_next->predecessors->num_used, 1U);
1880 MIR* t_mir = bb->last_mir_insn->prev;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1881 // Overwrite the kOpCheck insn with the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1882 DCHECK_EQ(bb_next->first_mir_insn, throw_insn);
1883 *bb->last_mir_insn = *throw_insn;
1884 bb->last_mir_insn->prev = t_mir;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1885 // Use the successor info from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1886 bb->successor_block_list = bb_next->successor_block_list;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1887 // Use the ending block linkage from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1888 bb->fall_through = bb_next->fall_through;
1889 bb->taken->block_type = kDead; // Kill the unused exception block
1890 bb->taken = bb_next->taken;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1891 // Include the rest of the instructions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1892 bb->last_mir_insn = bb_next->last_mir_insn;
buzbeebbdd0532013-02-07 09:33:02 -0800[diff] [blame]1893 /*
1894 * If lower-half of pair of blocks to combine contained a return, move the flag
1895 * to the newly combined block.
1896 */
1897 bb->terminated_by_return = bb_next->terminated_by_return;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1898
1899 /*
1900 * NOTE: we aren't updating all dataflow info here. Should either make sure this pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1901 * happens after uses of i_dominated, dom_frontier or update the dataflow info here.
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1902 */
1903
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1904 // Kill bb_next and remap now-dead id to parent
1905 bb_next->block_type = kDead;
1906 cu->block_id_map.Overwrite(bb_next->id, bb->id);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1907
1908 // Now, loop back and see if we can keep going
1909 }
1910 return false;
1911}
1912
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1913/* Eliminate unnecessary null checks for a basic block. */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1914static bool EliminateNullChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1915{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1916 if (bb->data_flow_info == NULL) return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1917
1918 /*
1919 * Set initial state. Be conservative with catch
1920 * blocks and start with no assumptions about null check
1921 * status (except for "this").
1922 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1923 if ((bb->block_type == kEntryBlock) | bb->catch_entry) {
1924 ClearAllBits(cu->temp_ssa_register_v);
1925 if ((cu->access_flags & kAccStatic) == 0) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1926 // If non-static method, mark "this" as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1927 int this_reg = cu->num_dalvik_registers - cu->num_ins;
1928 SetBit(cu, cu->temp_ssa_register_v, this_reg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1929 }
1930 } else {
1931 // Starting state is intesection of all incoming arcs
1932 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1933 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1934 BasicBlock* pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
1935 DCHECK(pred_bb != NULL);
1936 CopyBitVector(cu->temp_ssa_register_v,
1937 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1938 while (true) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1939 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
1940 if (!pred_bb) break;
1941 if ((pred_bb->data_flow_info == NULL) ||
1942 (pred_bb->data_flow_info->ending_null_check_v == NULL)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1943 continue;
1944 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1945 IntersectBitVectors(cu->temp_ssa_register_v,
1946 cu->temp_ssa_register_v,
1947 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1948 }
1949 }
1950
1951 // Walk through the instruction in the block, updating as necessary
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1952 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1953 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1954 continue;
1955 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1956 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1957
1958 // Mark target of NEW* as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1959 if (df_attributes & DF_NON_NULL_DST) {
1960 SetBit(cu, cu->temp_ssa_register_v, mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1961 }
1962
1963 // Mark non-null returns from invoke-style NEW*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1964 if (df_attributes & DF_NON_NULL_RET) {
1965 MIR* next_mir = mir->next;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1966 // Next should be an MOVE_RESULT_OBJECT
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1967 if (next_mir &&
1968 next_mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1969 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1970 SetBit(cu, cu->temp_ssa_register_v, next_mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1971 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1972 if (next_mir) {
1973 LOG(WARNING) << "Unexpected opcode following new: " << next_mir->dalvikInsn.opcode;
1974 } else if (bb->fall_through) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1975 // Look in next basic block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1976 struct BasicBlock* next_bb = bb->fall_through;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1977 for (MIR* tmir = next_bb->first_mir_insn; tmir != NULL;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1978 tmir =tmir->next) {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1979 if (static_cast<int>(tmir->dalvikInsn.opcode) >= static_cast<int>(kMirOpFirst)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1980 continue;
1981 }
1982 // First non-pseudo should be MOVE_RESULT_OBJECT
1983 if (tmir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
1984 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1985 SetBit(cu, cu->temp_ssa_register_v, tmir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1986 } else {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1987 LOG(WARNING) << "Unexpected op after new: " << tmir->dalvikInsn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1988 }
1989 break;
1990 }
1991 }
1992 }
1993 }
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1994
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1995 /*
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1996 * Propagate nullcheck state on register copies (including
1997 * Phi pseudo copies. For the latter, nullcheck state is
1998 * the "and" of all the Phi's operands.
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1999 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2000 if (df_attributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
2001 int tgt_sreg = mir->ssa_rep->defs[0];
2002 int operands = (df_attributes & DF_NULL_TRANSFER_0) ? 1 :
2003 mir->ssa_rep->num_uses;
2004 bool null_checked = true;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2005 for (int i = 0; i < operands; i++) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2006 null_checked &= IsBitSet(cu->temp_ssa_register_v,
2007 mir->ssa_rep->uses[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2008 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2009 if (null_checked) {
2010 SetBit(cu, cu->temp_ssa_register_v, tgt_sreg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2011 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2012 }
2013
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2014 // Already nullchecked?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2015 if ((df_attributes & DF_HAS_NULL_CHKS) && !(mir->optimization_flags & MIR_IGNORE_NULL_CHECK)) {
2016 int src_idx;
2017 if (df_attributes & DF_NULL_CHK_1) {
2018 src_idx = 1;
2019 } else if (df_attributes & DF_NULL_CHK_2) {
2020 src_idx = 2;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2021 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2022 src_idx = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2023 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2024 int src_sreg = mir->ssa_rep->uses[src_idx];
2025 if (IsBitSet(cu->temp_ssa_register_v, src_sreg)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2026 // Eliminate the null check
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2027 mir->optimization_flags |= MIR_IGNORE_NULL_CHECK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2028 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2029 // Mark s_reg as null-checked
2030 SetBit(cu, cu->temp_ssa_register_v, src_sreg);
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2031 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2032 }
2033 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2034
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2035 // Did anything change?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2036 bool res = CompareBitVectors(bb->data_flow_info->ending_null_check_v,
2037 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2038 if (res) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2039 CopyBitVector(bb->data_flow_info->ending_null_check_v,
2040 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2041 }
2042 return res;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2043}
2044
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2045void NullCheckElimination(CompilationUnit *cu)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2046{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2047 if (!(cu->disable_opt & (1 << kNullCheckElimination))) {
2048 DCHECK(cu->temp_ssa_register_v != NULL);
2049 DataFlowAnalysisDispatcher(cu, NullCheckEliminationInit, kAllNodes,
2050 false /* is_iterative */);
2051 DataFlowAnalysisDispatcher(cu, EliminateNullChecks,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2052 kPreOrderDFSTraversal,
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2053 true /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2054 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2055}
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2056
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2057void BasicBlockCombine(CompilationUnit* cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2058{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2059 DataFlowAnalysisDispatcher(cu, CombineBlocks, kPreOrderDFSTraversal, false);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2060}
2061
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2062void CodeLayout(CompilationUnit* cu)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2063{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2064 DataFlowAnalysisDispatcher(cu, LayoutBlocks, kAllNodes, false);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2065}
2066
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2067void DumpCheckStats(CompilationUnit *cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2068{
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2069 Checkstats* stats =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2070 static_cast<Checkstats*>(NewMem(cu, sizeof(Checkstats), true, kAllocDFInfo));
2071 cu->checkstats = stats;
2072 DataFlowAnalysisDispatcher(cu, CountChecks, kAllNodes, false /* is_iterative */);
2073 if (stats->null_checks > 0) {
2074 float eliminated = static_cast<float>(stats->null_checks_eliminated);
2075 float checks = static_cast<float>(stats->null_checks);
2076 LOG(INFO) << "Null Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2077 << stats->null_checks_eliminated << " of " << stats->null_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2078 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2079 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2080 if (stats->range_checks > 0) {
2081 float eliminated = static_cast<float>(stats->range_checks_eliminated);
2082 float checks = static_cast<float>(stats->range_checks);
2083 LOG(INFO) << "Range Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2084 << stats->range_checks_eliminated << " of " << stats->range_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2085 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2086 }
2087}
2088
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2089bool BuildExtendedBBList(struct CompilationUnit* cu, struct BasicBlock* bb)
2090{
2091 if (bb->visited) return false;
2092 if (!((bb->block_type == kEntryBlock) || (bb->block_type == kDalvikByteCode)
2093 || (bb->block_type == kExitBlock))) {
2094 // Ignore special blocks
2095 bb->visited = true;
2096 return false;
2097 }
2098 // Must be head of extended basic block.
2099 if (cu->verbose) {
2100 LOG(INFO) << "Extended bb head " << bb->id;
2101 }
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]2102 BasicBlock* start_bb = bb;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2103 cu->extended_basic_blocks.push_back(bb);
buzbeebbdd0532013-02-07 09:33:02 -0800[diff] [blame]2104 bool terminated_by_return = false;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2105 // Visit blocks strictly dominated by this head.
2106 while (bb != NULL) {
2107 bb->visited = true;
buzbeebbdd0532013-02-07 09:33:02 -0800[diff] [blame]2108 terminated_by_return |= bb->terminated_by_return;
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2109 bb = NextDominatedBlock(cu, bb);
2110 if (cu->verbose && (bb != NULL)) {
2111 LOG(INFO) << "...added bb " << bb->id;
2112 }
2113 }
buzbeebbdd0532013-02-07 09:33:02 -0800[diff] [blame]2114 if (terminated_by_return) {
buzbee4ef3e452012-12-14 13:35:28 -0800[diff] [blame]2115 // This extended basic block contains a return, so mark all members.
2116 bb = start_bb;
2117 while (bb != NULL) {
2118 bb->dominates_return = true;
2119 bb = NextDominatedBlock(cu, bb);
2120 }
2121 }
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2122 return false; // Not iterative - return value will be ignored
2123}
2124
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2125void BasicBlockOptimization(CompilationUnit *cu)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2126{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2127 if (!(cu->disable_opt & (1 << kBBOpt))) {
2128 CompilerInitGrowableList(cu, &cu->compiler_temps, 6, kListMisc);
2129 DCHECK_EQ(cu->num_compiler_temps, 0);
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2130 // Mark all blocks as not visited
2131 DataFlowAnalysisDispatcher(cu, ClearVisitedFlag,
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2132 kAllNodes, false /* is_iterative */);
buzbee2502e002012-12-31 16:05:53 -0800[diff] [blame]2133 DataFlowAnalysisDispatcher(cu, BuildExtendedBBList,
2134 kPreOrderDFSTraversal,
2135 false /* is_iterative */);
2136 // Perform extended basic block optimizations.
2137 for (unsigned int i = 0; i < cu->extended_basic_blocks.size(); i++) {
2138 BasicBlockOpt(cu, cu->extended_basic_blocks[i]);
2139 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2140 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2141}
2142
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2143static void AddLoopHeader(CompilationUnit* cu, BasicBlock* header,
2144 BasicBlock* back_edge)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2145{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2146 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2147 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2148 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2149 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2150 if (loop->header == header) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2151 InsertGrowableList(cu, &loop->incoming_back_edges,
2152 reinterpret_cast<uintptr_t>(back_edge));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2153 return;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2154 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2155 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2156 LoopInfo* info = static_cast<LoopInfo*>(NewMem(cu, sizeof(LoopInfo), true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2157 info->header = header;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2158 CompilerInitGrowableList(cu, &info->incoming_back_edges, 2, kListMisc);
2159 InsertGrowableList(cu, &info->incoming_back_edges, reinterpret_cast<uintptr_t>(back_edge));
2160 InsertGrowableList(cu, &cu->loop_headers, reinterpret_cast<uintptr_t>(info));
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2161}
2162
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2163static bool FindBackEdges(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2164{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2165 if ((bb->data_flow_info == NULL) || (bb->last_mir_insn == NULL)) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2166 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2167 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2168 Instruction::Code opcode = bb->last_mir_insn->dalvikInsn.opcode;
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]2169 if (Instruction::FlagsOf(opcode) & Instruction::kBranch) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2170 if (bb->taken && (bb->taken->start_offset <= bb->start_offset)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2171 DCHECK(bb->dominators != NULL);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2172 if (IsBitSet(bb->dominators, bb->taken->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2173 if (cu->verbose) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2174 LOG(INFO) << "Loop backedge from 0x"
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2175 << std::hex << bb->last_mir_insn->offset
2176 << " to 0x" << std::hex << bb->taken->start_offset;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2177 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2178 AddLoopHeader(cu, bb->taken, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2179 }
2180 }
2181 }
2182 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2183}
2184
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2185static void AddBlocksToLoop(CompilationUnit* cu, ArenaBitVector* blocks,
2186 BasicBlock* bb, int head_id)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2187{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2188 if (!IsBitSet(bb->dominators, head_id) ||
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2189 IsBitSet(blocks, bb->id)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2190 return;
2191 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2192 SetBit(cu, blocks, bb->id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2193 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2194 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2195 BasicBlock* pred_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2196 for (pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); pred_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2197 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2198 AddBlocksToLoop(cu, blocks, pred_bb, head_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2199 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2200}
2201
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2202static void DumpLoops(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2203{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2204 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2205 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2206 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2207 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2208 LOG(INFO) << "Loop head block id " << loop->header->id
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2209 << ", offset 0x" << std::hex << loop->header->start_offset
2210 << ", Depth: " << loop->header->nesting_depth;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2211 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2212 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2213 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2214 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2215 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2216 LOG(INFO) << " Backedge block id " << edge_bb->id
2217 << ", offset 0x" << std::hex << edge_bb->start_offset;
2218 ArenaBitVectorIterator b_iter;
2219 BitVectorIteratorInit(loop->blocks, &b_iter);
2220 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2221 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2222 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2223 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2224 LOG(INFO) << " (" << bb->id << ", 0x" << std::hex
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2225 << bb->start_offset << ")";
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2226 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2227 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2228 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2229}
2230
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2231void LoopDetection(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2232{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2233 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2234 return;
2235 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2236 CompilerInitGrowableList(cu, &cu->loop_headers, 6, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2237 // Find the loop headers
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2238 DataFlowAnalysisDispatcher(cu, FindBackEdges, kAllNodes, false /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2239 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2240 GrowableListIteratorInit(&cu->loop_headers, &iter);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2241 // Add blocks to each header
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2242 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2243 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2244 loop->blocks = AllocBitVector(cu, cu->num_blocks, true,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2245 kBitMapMisc);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2246 SetBit(cu, loop->blocks, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2247 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2248 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2249 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2250 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2251 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2252 AddBlocksToLoop(cu, loop->blocks, edge_bb, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2253 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2254 }
2255 // Compute the nesting depth of each header
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2256 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2257 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2258 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2259 GrowableListIterator iter2;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2260 GrowableListIteratorInit(&cu->loop_headers, &iter2);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2261 LoopInfo* loop2;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2262 for (loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2263 loop2 != NULL; loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2))) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2264 if (IsBitSet(loop2->blocks, loop->header->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2265 loop->header->nesting_depth++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2266 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2267 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2268 }
2269 // Assign nesting depth to each block in all loops
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2270 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2271 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2272 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2273 ArenaBitVectorIterator b_iter;
2274 BitVectorIteratorInit(loop->blocks, &b_iter);
2275 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2276 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2277 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2278 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
2279 bb->nesting_depth = std::max(bb->nesting_depth,
2280 loop->header->nesting_depth);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2281 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2282 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2283 if (cu->verbose) {
2284 DumpLoops(cu);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2285 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2286}
2287
2288/*
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2289 * This function will make a best guess at whether the invoke will
2290 * end up using Method*. It isn't critical to get it exactly right,
2291 * and attempting to do would involve more complexity than it's
2292 * worth.
2293 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2294static bool InvokeUsesMethodStar(CompilationUnit* cu, MIR* mir)
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2295{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2296 InvokeType type;
2297 Instruction::Code opcode = mir->dalvikInsn.opcode;
2298 switch (opcode) {
2299 case Instruction::INVOKE_STATIC:
2300 case Instruction::INVOKE_STATIC_RANGE:
2301 type = kStatic;
2302 break;
2303 case Instruction::INVOKE_DIRECT:
2304 case Instruction::INVOKE_DIRECT_RANGE:
2305 type = kDirect;
2306 break;
2307 case Instruction::INVOKE_VIRTUAL:
2308 case Instruction::INVOKE_VIRTUAL_RANGE:
2309 type = kVirtual;
2310 break;
2311 case Instruction::INVOKE_INTERFACE:
2312 case Instruction::INVOKE_INTERFACE_RANGE:
2313 return false;
2314 case Instruction::INVOKE_SUPER_RANGE:
2315 case Instruction::INVOKE_SUPER:
2316 type = kSuper;
2317 break;
2318 default:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2319 LOG(WARNING) << "Unexpected invoke op: " << opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2320 return false;
2321 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2322 OatCompilationUnit m_unit(cu->class_loader, cu->class_linker,
TDYa127dc5daa02013-01-09 21:31:37 +0800[diff] [blame]2323 *cu->dex_file, cu->code_item,
2324 cu->class_def_idx, cu->method_idx,
2325 cu->access_flags);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2326 // TODO: add a flag so we don't counts the stats for this twice
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2327 uint32_t dex_method_idx = mir->dalvikInsn.vB;
2328 int vtable_idx;
2329 uintptr_t direct_code;
2330 uintptr_t direct_method;
2331 bool fast_path =
2332 cu->compiler->ComputeInvokeInfo(dex_method_idx, &m_unit, type,
2333 vtable_idx, direct_code,
2334 direct_method) &&
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2335 !SLOW_INVOKE_PATH;
2336 return (((type == kDirect) || (type == kStatic)) &&
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2337 fast_path && ((direct_code == 0) || (direct_method == 0)));
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2338}
2339
2340/*
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2341 * Count uses, weighting by loop nesting depth. This code only
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2342 * counts explicitly used s_regs. A later phase will add implicit
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2343 * counts for things such as Method*, null-checked references, etc.
2344 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2345static bool CountUses(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2346{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2347 if (bb->block_type != kDalvikByteCode) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2348 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2349 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2350 for (MIR* mir = bb->first_mir_insn; (mir != NULL); mir = mir->next) {
2351 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2352 continue;
2353 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2354 uint32_t weight = std::min(16U, static_cast<uint32_t>(bb->nesting_depth));
2355 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
2356 int s_reg = mir->ssa_rep->uses[i];
2357 DCHECK_LT(s_reg, static_cast<int>(cu->use_counts.num_used));
2358 cu->raw_use_counts.elem_list[s_reg]++;
2359 cu->use_counts.elem_list[s_reg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2360 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2361 if (!(cu->disable_opt & (1 << kPromoteCompilerTemps))) {
2362 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2363 // Implicit use of Method* ? */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2364 if (df_attributes & DF_UMS) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2365 /*
2366 * Some invokes will not use Method* - need to perform test similar
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2367 * to that found in GenInvoke() to decide whether to count refs
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2368 * for Method* on invoke-class opcodes.
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2369 * TODO: refactor for common test here, save results for GenInvoke
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2370 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2371 int uses_method_star = true;
2372 if ((df_attributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) &&
2373 !(df_attributes & DF_NON_NULL_RET)) {
2374 uses_method_star &= InvokeUsesMethodStar(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2375 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2376 if (uses_method_star) {
2377 cu->raw_use_counts.elem_list[cu->method_sreg]++;
2378 cu->use_counts.elem_list[cu->method_sreg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2379 }
2380 }
2381 }
2382 }
2383 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2384}
2385
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2386void MethodUseCount(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2387{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2388 CompilerInitGrowableList(cu, &cu->use_counts, cu->num_ssa_regs + 32, kListMisc);
2389 CompilerInitGrowableList(cu, &cu->raw_use_counts, cu->num_ssa_regs + 32, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2390 // Initialize list
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2391 for (int i = 0; i < cu->num_ssa_regs; i++) {
2392 InsertGrowableList(cu, &cu->use_counts, 0);
2393 InsertGrowableList(cu, &cu->raw_use_counts, 0);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2394 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2395 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2396 return;
2397 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2398 DataFlowAnalysisDispatcher(cu, CountUses,
2399 kAllNodes, false /* is_iterative */);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2400}
2401
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2402} // namespace art