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review.blissroms.org / platform_bionic / c5d6df6f2fe57fd5aadbd9ebb131023234c30a0c / . / libc / arch-mips / bionic / _setjmp.S
blob: d237e6d19246940b68c0fbdac30012c40d1a1600 [file] [log] [blame]
Raghu Gandham405b8022012-07-25 18:16:42 -0700[diff] [blame]1/* $OpenBSD: _setjmp.S,v 1.4 2005/08/07 16:40:15 espie Exp $ */
2
3/*
4 * Copyright (c) 2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
Elliott Hughes851e68a2014-02-19 16:53:20 -0800[diff] [blame]5 *
Raghu Gandham405b8022012-07-25 18:16:42 -0700[diff] [blame]6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. Neither the name of Opsycon AB nor the names of its contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
19 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
22 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 */
31
Elliott Hughes851e68a2014-02-19 16:53:20 -0800[diff] [blame]32#include <private/bionic_asm.h>
Raghu Gandham405b8022012-07-25 18:16:42 -0700[diff] [blame]33#include <machine/regnum.h>
David 'Digit' Turnerc1b44ec2012-10-17 19:10:11 +0200[diff] [blame]34#include <machine/signal.h>
Raghu Gandham405b8022012-07-25 18:16:42 -0700[diff] [blame]35
36/*
37 * _setjmp, _longjmp (not restoring signal state)
38 *
39 * XXX FPSET should probably be taken from SR setting. hmmm...
40 * GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
41 *
42 */
43
44FRAMESZ= MKFSIZ(0,4)
45GPOFF= FRAMESZ-2*REGSZ
46
Raghu Gandham405b8022012-07-25 18:16:42 -0700[diff] [blame]47LEAF(_setjmp, FRAMESZ)
48 PTR_SUBU sp, FRAMESZ
49 SETUP_GP64(GPOFF, _setjmp)
50 SAVE_GP(GPOFF)
51 .set noreorder
52#if defined(__mips64)
53 dli v0, 0xACEDBADE # sigcontext magic number
54#else
55 li v0, 0xACEDBADE # sigcontext magic number
56#endif
57 REG_S v0, SC_REGS+ZERO*REGSZ(a0)
58 REG_S s0, SC_REGS+S0*REGSZ(a0)
59 REG_S s1, SC_REGS+S1*REGSZ(a0)
60 REG_S s2, SC_REGS+S2*REGSZ(a0)
61 REG_S s3, SC_REGS+S3*REGSZ(a0)
62 REG_S s4, SC_REGS+S4*REGSZ(a0)
63 REG_S s5, SC_REGS+S5*REGSZ(a0)
64 REG_S s6, SC_REGS+S6*REGSZ(a0)
65 REG_S s7, SC_REGS+S7*REGSZ(a0)
66 REG_S s8, SC_REGS+S8*REGSZ(a0)
67 REG_L v0, GPOFF(sp)
68 REG_S v0, SC_REGS+GP*REGSZ(a0)
69 PTR_ADDU v0, sp, FRAMESZ
70 REG_S v0, SC_REGS+SP*REGSZ(a0)
71 REG_S ra, SC_PC(a0)
72
73#if !defined(SOFTFLOAT)
74 li v0, 1 # be nice if we could tell
75 REG_S v0, SC_FPUSED(a0) # sc_fpused = 1
76 cfc1 v0, $31
Duane Sanddd372512014-07-14 15:30:14 -0700[diff] [blame]77 s.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
78 s.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
79 s.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
80 s.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
81 s.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
82 s.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
Raghu Gandham405b8022012-07-25 18:16:42 -0700[diff] [blame]83#if _MIPS_FPSET == 32
Duane Sanddd372512014-07-14 15:30:14 -0700[diff] [blame]84 s.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
85 s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
86 s.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
87 s.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
88 s.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
89 s.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
Raghu Gandham405b8022012-07-25 18:16:42 -0700[diff] [blame]90#endif
91 REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
92#endif /* !SOFTFLOAT */
93 RESTORE_GP64
94 PTR_ADDU sp, FRAMESZ
95 j ra
96 move v0, zero
97END(_setjmp)
98
99LEAF(_longjmp, FRAMESZ)
100 PTR_SUBU sp, FRAMESZ
101 SETUP_GP64(GPOFF, _longjmp)
102 SAVE_GP(GPOFF)
103 .set noreorder
104 REG_L v0, SC_REGS+ZERO*REGSZ(a0)
105 bne v0, 0xACEDBADE, botch # jump if error
106 REG_L ra, SC_PC(a0)
107 REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
108 REG_L s0, SC_REGS+S0*REGSZ(a0)
109 REG_L s1, SC_REGS+S1*REGSZ(a0)
110 REG_L s2, SC_REGS+S2*REGSZ(a0)
111 REG_L s3, SC_REGS+S3*REGSZ(a0)
112 REG_L s4, SC_REGS+S4*REGSZ(a0)
113 REG_L s5, SC_REGS+S5*REGSZ(a0)
114 REG_L s6, SC_REGS+S6*REGSZ(a0)
115 REG_L s7, SC_REGS+S7*REGSZ(a0)
116 REG_L s8, SC_REGS+S8*REGSZ(a0)
117 REG_L gp, SC_REGS+GP*REGSZ(a0)
118 REG_L sp, SC_REGS+SP*REGSZ(a0)
119#if !defined(SOFTFLOAT)
120 ctc1 v0, $31
Duane Sanddd372512014-07-14 15:30:14 -0700[diff] [blame]121 l.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
122 l.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
123 l.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
124 l.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
125 l.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
126 l.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
Raghu Gandham405b8022012-07-25 18:16:42 -0700[diff] [blame]127#if _MIPS_FPSET == 32
Duane Sanddd372512014-07-14 15:30:14 -0700[diff] [blame]128 l.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
129 l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
130 l.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
131 l.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
132 l.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
133 l.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
Raghu Gandham405b8022012-07-25 18:16:42 -0700[diff] [blame]134#endif
135#endif /* !SOFTFLOAT */
136 bne a1, zero, 1f
137 nop
138 li a1, 1 # never return 0!
1391:
140 j ra
141 move v0, a1
142
143botch:
144 jal longjmperror
145 nop
146 jal abort
147 nop
148 RESTORE_GP64
149 PTR_ADDU sp, FRAMESZ
150END(_longjmp)