blob: 01d0798eb67a800d0f1fc58ddad25d304d867f43 [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Arun Kumar K.R6c85f052014-01-21 21:47:41 -08002 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Iliyan Malchev202a77d2012-06-11 14:41:12 -070052using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070053using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070054
Naomi Luisa44100c2013-02-08 12:42:03 -080055ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
56
Sushil Chauhan65e26302015-01-14 10:48:57 -080057static void getUBwcWidthAndHeight(int, int, int, int&, int&);
58static unsigned int getUBwcSize(int, int, int, const int, const int);
59
Iliyan Malchev202a77d2012-06-11 14:41:12 -070060//Common functions
Naseer Ahmed29a26812012-06-14 00:56:20 -070061static bool canFallback(int usage, bool triedSystem)
Iliyan Malchev202a77d2012-06-11 14:41:12 -070062{
63 // Fallback to system heap when alloc fails unless
64 // 1. Composition type is MDP
65 // 2. Alloc from system heap was already tried
66 // 3. The heap type is requsted explicitly
67 // 4. The heap type is protected
68 // 5. The buffer is meant for external display only
69
Naseer Ahmeda87da602012-07-01 23:54:19 -070070 if(QCCompositionType::getInstance().getCompositionType() &
71 COMPOSITION_TYPE_MDP)
Iliyan Malchev202a77d2012-06-11 14:41:12 -070072 return false;
73 if(triedSystem)
74 return false;
Sushil Chauhan7651a802013-01-08 16:08:09 -080075 if(usage & (GRALLOC_HEAP_MASK | GRALLOC_USAGE_PROTECTED))
Iliyan Malchev202a77d2012-06-11 14:41:12 -070076 return false;
Naseer Ahmed4c588a22012-07-31 19:12:17 -070077 if(usage & (GRALLOC_HEAP_MASK | GRALLOC_USAGE_PRIVATE_EXTERNAL_ONLY))
Iliyan Malchev202a77d2012-06-11 14:41:12 -070078 return false;
79 //Return true by default
80 return true;
81}
82
Saurabh Shah1adcafe2014-12-19 10:05:41 -080083/* The default policy is to return cached buffers unless the client explicity
84 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
85 * read or written in software. Any combination with a _RARELY_ flag will be
86 * treated as uncached. */
87static bool useUncached(const int& usage) {
88 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
89 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
90 GRALLOC_USAGE_SW_WRITE_RARELY) or
91 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
92 GRALLOC_USAGE_SW_READ_RARELY))
93 return true;
94
95 return false;
96}
97
Naomi Luisa44100c2013-02-08 12:42:03 -080098//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080099AdrenoMemInfo::AdrenoMemInfo()
100{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800101 LINK_adreno_compute_aligned_width_and_height = NULL;
102 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700103 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800104 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800105 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800106
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800107 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
108 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800109 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700110 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
111 *(void **)&LINK_adreno_compute_padding =
112 ::dlsym(libadreno_utils, "compute_surface_padding");
113 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
114 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800115 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
116 ::dlsym(libadreno_utils,
117 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800118 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
119 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800120 }
121}
122
123AdrenoMemInfo::~AdrenoMemInfo()
124{
125 if (libadreno_utils) {
126 ::dlclose(libadreno_utils);
127 }
128}
129
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700130int AdrenoMemInfo::isMacroTilingSupportedByGPU()
131{
132 if ((libadreno_utils)) {
133 if(LINK_adreno_isMacroTilingSupportedByGpu) {
134 return LINK_adreno_isMacroTilingSupportedByGpu();
135 }
136 }
137 return 0;
138}
139
140
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800141void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800142 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800143{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800144
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800145 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700146 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800147 int tileEnabled = isMacroTileEnabled(format, usage);
148 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
149 height, format, tileEnabled, aligned_w, aligned_h);
150 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800151 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800152
153 if (isUBwcEnabled(format, usage)) {
154 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
155 return;
156 }
157
158 aligned_w = width;
159 aligned_h = height;
160 switch (format)
161 {
162 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
163 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
164 case HAL_PIXEL_FORMAT_RAW_SENSOR:
165 aligned_w = ALIGN(width, 32);
166 break;
167 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
168 aligned_w = ALIGN(width, 128);
169 break;
170 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
171 case HAL_PIXEL_FORMAT_YV12:
172 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
173 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
174 case HAL_PIXEL_FORMAT_YCbCr_422_I:
175 case HAL_PIXEL_FORMAT_YCrCb_422_I:
176 aligned_w = ALIGN(width, 16);
177 break;
178 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
179 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
180 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
181 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
182 break;
183 case HAL_PIXEL_FORMAT_BLOB:
184 break;
185 case HAL_PIXEL_FORMAT_NV21_ZSL:
186 aligned_w = ALIGN(width, 64);
187 aligned_h = ALIGN(height, 64);
188 break;
189 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
190 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
191 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
192 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
196 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
197 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
198 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
199 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
200 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
201 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
202 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
203 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
204 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
205 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
206 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
207 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
208 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
209 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
210 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
211 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
212 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
213 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
214 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
215 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
216 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
217 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
218 int bytesPerPixel = 0;
219 int raster_mode = 0; //Adreno unknown raster mode.
220 int padding_threshold = 512; //Threshold for padding
221 //surfaces.
222
223 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
224 width, height, format, 0,raster_mode, padding_threshold,
225 &aligned_w, &aligned_h, &bytesPerPixel);
226 } else {
227 ALOGW("%s: Warning!! Symbols" \
228 " compute_compressedfmt_aligned_width_and_height" \
229 " not found", __FUNCTION__);
230 }
231 break;
232 default: break;
233 }
234}
235
236void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
237 int tile_enabled, int& aligned_w, int& aligned_h)
238{
239 aligned_w = ALIGN(width, 32);
240 aligned_h = ALIGN(height, 32);
241
242 // Don't add any additional padding if debug.gralloc.map_fb_memory
243 // is enabled
244 char property[PROPERTY_VALUE_MAX];
245 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
246 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
247 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
248 return;
249 }
250
251 int bpp = 4;
252 switch(format)
253 {
254 case HAL_PIXEL_FORMAT_RGB_888:
255 bpp = 3;
256 break;
257 case HAL_PIXEL_FORMAT_RGB_565:
258 case HAL_PIXEL_FORMAT_RGBA_5551:
259 case HAL_PIXEL_FORMAT_RGBA_4444:
260 bpp = 2;
261 break;
262 default: break;
263 }
264
265 if (libadreno_utils) {
266 int raster_mode = 0; // Adreno unknown raster mode.
267 int padding_threshold = 512; // Threshold for padding surfaces.
268 // the function below computes aligned width and aligned height
269 // based on linear or macro tile mode selected.
270 if(LINK_adreno_compute_aligned_width_and_height) {
271 LINK_adreno_compute_aligned_width_and_height(width,
272 height, bpp, tile_enabled,
273 raster_mode, padding_threshold,
274 &aligned_w, &aligned_h);
275
276 } else if(LINK_adreno_compute_padding) {
277 int surface_tile_height = 1; // Linear surface
278 aligned_w = LINK_adreno_compute_padding(width, bpp,
279 surface_tile_height, raster_mode,
280 padding_threshold);
281 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
282 __FUNCTION__);
283 } else {
284 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
285 "compute_aligned_width_and_height not found", __FUNCTION__);
286 }
287 }
288}
289
290int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
291{
Sushil Chauhan082acd62015-01-14 16:49:29 -0800292 if (libadreno_utils) {
293 if (LINK_adreno_isUBWCSupportedByGpu) {
294 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
295 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
296 }
297 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800298 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800299}
300
Sushil Chauhan082acd62015-01-14 16:49:29 -0800301ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
302{
303 switch (hal_format) {
304 case HAL_PIXEL_FORMAT_RGBA_8888:
305 return ADRENO_PIXELFORMAT_R8G8B8A8;
306 case HAL_PIXEL_FORMAT_RGB_565:
307 return ADRENO_PIXELFORMAT_B5G6R5;
308 case HAL_PIXEL_FORMAT_sRGB_A_8888:
309 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
310 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
311 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
312 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
313 return ADRENO_PIXELFORMAT_NV12;
314 default:
315 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
316 break;
317 }
318 return ADRENO_PIXELFORMAT_UNKNOWN;
319}
320
Naomi Luisa44100c2013-02-08 12:42:03 -0800321//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700322IAllocController* IAllocController::sController = NULL;
323IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700324{
325 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700326 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700327 }
328 return sController;
329}
330
331
332//-------------- IonController-----------------------//
333IonController::IonController()
334{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530335 allocateIonMem();
336}
337
338void IonController::allocateIonMem()
339{
340 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700341}
342
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700343int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700344{
345 int ionFlags = 0;
346 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700347
348 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700349 data.allocType = 0;
350
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500351 if(usage & GRALLOC_USAGE_PRIVATE_SYSTEM_HEAP)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700352 ionFlags |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700353
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500354 if(usage & GRALLOC_USAGE_PRIVATE_IOMMU_HEAP)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700355 ionFlags |= ION_HEAP(ION_IOMMU_HEAP_ID);
356
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530357 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530358 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500359 ionFlags |= ION_HEAP(ION_CP_MM_HEAP_ID);
360 ionFlags |= ION_SECURE;
Shalaj Jain13cdf812014-12-02 16:20:54 -0800361#ifdef ION_FLAG_ALLOW_NON_CONTIG
362 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
363 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
364 }
365#endif
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530366 } else {
367 // for targets/OEMs which do not need HW level protection
368 // do not set ion secure flag & MM heap. Fallback to IOMMU heap.
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500369 ionFlags |= ION_HEAP(ION_IOMMU_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530370 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500371 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530372 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
373 //MM Heap is exclusively a secure heap.
374 //If it is used for non secure cases, fallback to IOMMU heap
375 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
376 cannot be used as an insecure heap!\
377 trying to use IOMMU instead !!");
378 ionFlags |= ION_HEAP(ION_IOMMU_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500379 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700380
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700381 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
382 ionFlags |= ION_HEAP(ION_CAMERA_HEAP_ID);
383
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700384 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
385 ionFlags |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700386
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530387 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500388 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700389
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700390 // if no flags are set, default to
391 // SF + IOMMU heaps, so that bypass can work
392 // we can fall back to system heap if
393 // we run out.
394 if(!ionFlags)
395 ionFlags = ION_HEAP(ION_SF_HEAP_ID) | ION_HEAP(ION_IOMMU_HEAP_ID);
396
397 data.flags = ionFlags;
398 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700399
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700400 // Fallback
Naseer Ahmed29a26812012-06-14 00:56:20 -0700401 if(ret < 0 && canFallback(usage,
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700402 (ionFlags & ION_SYSTEM_HEAP_ID)))
403 {
404 ALOGW("Falling back to system heap");
405 data.flags = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700406 ret = mIonAlloc->alloc_buffer(data);
407 }
408
409 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700410 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700411 }
412
413 return ret;
414}
415
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700416IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700417{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700418 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700419 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
420 memalloc = mIonAlloc;
421 } else {
422 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
423 }
424
425 return memalloc;
426}
427
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700428bool isMacroTileEnabled(int format, int usage)
429{
430 bool tileEnabled = false;
431
432 // Check whether GPU & MDSS supports MacroTiling feature
433 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
434 qdutils::MDPVersion::getInstance().supportsMacroTile())
435 {
436 // check the format
437 switch(format)
438 {
439 case HAL_PIXEL_FORMAT_RGBA_8888:
440 case HAL_PIXEL_FORMAT_RGBX_8888:
441 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800442 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700443 {
444 tileEnabled = true;
445 // check the usage flags
446 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
447 GRALLOC_USAGE_SW_WRITE_MASK)) {
448 // Application intends to use CPU for rendering
449 tileEnabled = false;
450 }
451 break;
452 }
453 default:
454 break;
455 }
456 }
457 return tileEnabled;
458}
459
460// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800461unsigned int getSize(int format, int width, int height, int usage,
462 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700463
Sushil Chauhan65e26302015-01-14 10:48:57 -0800464 if (isUBwcEnabled(format, usage)) {
465 return getUBwcSize(width, height, format, alignedw, alignedh);
466 }
467
468 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700469 switch (format) {
470 case HAL_PIXEL_FORMAT_RGBA_8888:
471 case HAL_PIXEL_FORMAT_RGBX_8888:
472 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700473 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700474 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700475 size = alignedw * alignedh * 4;
476 break;
477 case HAL_PIXEL_FORMAT_RGB_888:
478 size = alignedw * alignedh * 3;
479 break;
480 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700481 case HAL_PIXEL_FORMAT_RGBA_5551:
482 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400483 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700484 size = alignedw * alignedh * 2;
485 break;
486
487 // adreno formats
488 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
489 size = ALIGN(alignedw*alignedh, 4096);
490 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
491 break;
492 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
493 // The chroma plane is subsampled,
494 // but the pitch in bytes is unchanged
495 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700496 size = ALIGN( alignedw * alignedh, 8192);
497 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
498 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700499 case HAL_PIXEL_FORMAT_YV12:
500 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
501 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800502 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700503 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400504 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700505 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700506 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700507 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800508 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
509 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400510 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800511 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700512 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
513 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700514 case HAL_PIXEL_FORMAT_YCbCr_422_I:
515 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700516 if(width & 1) {
517 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800518 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700519 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700520 size = ALIGN(alignedw * alignedh * 2, 4096);
521 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700522 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400523 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700524 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700525 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400526 case HAL_PIXEL_FORMAT_BLOB:
527 if(height != 1) {
528 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
529 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800530 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400531 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400532 size = width;
533 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700534 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700535 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
536 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500537 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
538 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
539 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
540 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
541 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
542 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
543 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
544 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
545 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
546 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
547 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
548 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
549 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
550 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
551 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
552 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
553 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
554 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
555 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
556 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
557 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
558 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
559 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
560 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
561 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
562 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
563 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800564 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500565 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
566 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700567 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800568 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800569 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700570 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700571 return size;
572}
573
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700574unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700575 int& alignedw, int &alignedh)
576{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700577 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700578
579 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
580 height,
581 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800582 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700583 alignedw,
584 alignedh);
585
Sushil Chauhan65e26302015-01-14 10:48:57 -0800586 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700587
588 return size;
589}
590
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700591
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700592unsigned int getBufferSizeAndDimensions(int width, int height, int format,
593 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700594{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700595 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700596
597 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
598 height,
599 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800600 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700601 alignedw,
602 alignedh);
603
Sushil Chauhan65e26302015-01-14 10:48:57 -0800604 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700605
606 return size;
607}
608
609
610void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700611 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700612{
613 tileEnabled = isMacroTileEnabled(format, usage);
614
615 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
616 height,
617 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800618 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700619 alignedw,
620 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800621 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700622}
623
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400624int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
625{
626 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700627 int width = hnd->width;
628 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700629 unsigned int ystride, cstride;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700630
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400631 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
632
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700633 // Check metadata if the geometry has been updated.
634 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
635 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
636 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
637 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
638 }
639
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400640 // Get the chroma offsets from the handle width/height. We take advantage
641 // of the fact the width _is_ the stride
642 switch (hnd->format) {
643 //Semiplanar
644 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
645 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
646 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
647 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700648 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400649 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700650 ycbcr->cb = (void*)(hnd->base + ystride * height);
651 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400652 ycbcr->ystride = ystride;
653 ycbcr->cstride = cstride;
654 ycbcr->chroma_step = 2;
655 break;
656
657 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
658 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
659 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
660 case HAL_PIXEL_FORMAT_NV21_ZSL:
661 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700662 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400663 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700664 ycbcr->cr = (void*)(hnd->base + ystride * height);
665 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400666 ycbcr->ystride = ystride;
667 ycbcr->cstride = cstride;
668 ycbcr->chroma_step = 2;
669 break;
670
671 //Planar
672 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700673 ystride = width;
674 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400675 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700676 ycbcr->cr = (void*)(hnd->base + ystride * height);
677 ycbcr->cb = (void*)(hnd->base + ystride * height +
678 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400679 ycbcr->ystride = ystride;
680 ycbcr->cstride = cstride;
681 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400682 break;
683 //Unsupported formats
684 case HAL_PIXEL_FORMAT_YCbCr_422_I:
685 case HAL_PIXEL_FORMAT_YCrCb_422_I:
686 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
687 default:
688 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
689 hnd->format);
690 err = -EINVAL;
691 }
692 return err;
693
694}
695
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700696
697
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700698// Allocate buffer from width, height and format into a
699// private_handle_t. It is the responsibility of the caller
700// to free the buffer using the free_buffer function
701int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
702{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700703 alloc_data data;
704 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700705 gralloc::IAllocController* sAlloc =
706 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700707 data.base = 0;
708 data.fd = -1;
709 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700710 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
711 alignedh);
712
Naseer Ahmed29a26812012-06-14 00:56:20 -0700713 data.align = getpagesize();
714 data.uncached = useUncached(usage);
715 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700716
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700717 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700718 if (0 != err) {
719 ALOGE("%s: allocate failed", __FUNCTION__);
720 return -ENOMEM;
721 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700722
Naseer Ahmed29a26812012-06-14 00:56:20 -0700723 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700724 data.allocType, 0, format,
725 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700726 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700727 hnd->offset = data.offset;
728 hnd->gpuaddr = 0;
729 *pHnd = hnd;
730 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700731}
732
733void free_buffer(private_handle_t *hnd)
734{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700735 gralloc::IAllocController* sAlloc =
736 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700737 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700738 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700739 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
740 }
741 if(hnd)
742 delete hnd;
743
744}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800745
746// UBWC helper functions
747static bool isUBwcFormat(int format)
748{
749 // Explicitly defined UBWC formats
750 switch(format)
751 {
752 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
753 return true;
754 default:
755 return false;
756 }
757}
758
759static bool isUBwcSupported(int format)
760{
761 // Existing HAL formats with UBWC support
762 switch(format)
763 {
764 case HAL_PIXEL_FORMAT_RGB_565:
765 case HAL_PIXEL_FORMAT_RGBA_8888:
766 case HAL_PIXEL_FORMAT_sRGB_A_8888:
767 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
768 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
769 return true;
770 default:
771 return false;
772 }
773}
774
775bool isUBwcEnabled(int format, int usage)
776{
777 if (isUBwcFormat(format) ||
778 ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format)))
779 {
780 // Allow UBWC, only if GPU supports it and CPU usage flags are not set
781 if (AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format) &&
782 !(usage & (GRALLOC_USAGE_SW_READ_MASK |
783 GRALLOC_USAGE_SW_WRITE_MASK))) {
784 return true;
785 }
786 }
787 return false;
788}
789
790static void getUBwcWidthAndHeight(int width, int height, int format,
791 int& aligned_w, int& aligned_h)
792{
793 switch (format)
794 {
795 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
796 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
797 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
798 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
799 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
800 break;
801 default:
802 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
803 aligned_w = 0;
804 aligned_h = 0;
805 break;
806 }
807}
808
809static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
810{
811 block_width = 0;
812 block_height = 0;
813
814 switch(bpp)
815 {
816 case 2:
817 case 4:
818 block_width = 16;
819 block_height = 4;
820 break;
821 case 8:
822 block_width = 8;
823 block_height = 4;
824 break;
825 case 16:
826 block_width = 4;
827 block_height = 4;
828 break;
829 default:
830 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
831 break;
832 }
833}
834
835static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
836{
837 unsigned int size = 0;
838 int meta_width, meta_height;
839 int block_width, block_height;
840
841 getUBwcBlockSize(bpp, block_width, block_height);
842
843 if (!block_width || !block_height) {
844 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
845 return size;
846 }
847
848 // Align meta buffer height to 16 blocks
849 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
850
851 // Align meta buffer width to 64 blocks
852 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
853
854 // Align meta buffer size to 4K
855 size = ((meta_width * meta_height), 4096);
856 return size;
857}
858
859static unsigned int getUBwcSize(int width, int height, int format,
860 const int alignedw, const int alignedh) {
861
862 unsigned int size = 0;
863 switch (format) {
864 case HAL_PIXEL_FORMAT_RGB_565:
865 size = alignedw * alignedh * 2;
866 size += getUBwcMetaBufferSize(width, height, 2);
867 break;
868 case HAL_PIXEL_FORMAT_RGBA_8888:
869 case HAL_PIXEL_FORMAT_sRGB_A_8888:
870 size = alignedw * alignedh * 4;
871 size += getUBwcMetaBufferSize(width, height, 4);
872 break;
873 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
874 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
875 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
876 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
877 break;
878 default:
879 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
880 break;
881 }
882 return size;
883}