blob: a69ae1ab366d50c2e5daf5e1e8add6fab0f32fbf [file] [log] [blame]
Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
2* Copyright (c) 2017, The Linux Foundation. All rights reserved.
3*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
13* * Neither the name of The Linux Foundation nor the names of its
14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070041
42namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080043
44typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
45
Saurabh Shah66c941b2016-07-06 17:34:05 -070046/*
47 * Drm Atomic Operation Codes
48 */
49enum struct DRMOps {
50 /*
51 * Op: Sets plane source crop
52 * Arg: uint32_t - Plane ID
53 * DRMRect - Source Rectangle
54 */
55 PLANE_SET_SRC_RECT,
56 /*
57 * Op: Sets plane destination rect
58 * Arg: uint32_t - Plane ID
59 * DRMRect - Dst Rectangle
60 */
61 PLANE_SET_DST_RECT,
62 /*
63 * Op: Sets plane zorder
64 * Arg: uint32_t - Plane ID
65 * uint32_t - zorder
66 */
67 PLANE_SET_ZORDER,
68 /*
69 * Op: Sets plane rotation flags
70 * Arg: uint32_t - Plane ID
71 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
72 */
73 PLANE_SET_ROTATION,
74 /*
75 * Op: Sets plane alpha
76 * Arg: uint32_t - Plane ID
77 * uint32_t - alpha value
78 */
79 PLANE_SET_ALPHA,
80 /*
81 * Op: Sets the blend type
82 * Arg: uint32_t - Plane ID
83 * uint32_t - blend type (see DRMBlendType)
84 */
85 PLANE_SET_BLEND_TYPE,
86 /*
87 * Op: Sets horizontal decimation
88 * Arg: uint32_t - Plane ID
89 * uint32_t - decimation factor
90 */
91 PLANE_SET_H_DECIMATION,
92 /*
93 * Op: Sets vertical decimation
94 * Arg: uint32_t - Plane ID
95 * uint32_t - decimation factor
96 */
97 PLANE_SET_V_DECIMATION,
98 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -080099 * Op: Sets source config flags
100 * Arg: uint32_t - Plane ID
101 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
102 */
103 PLANE_SET_SRC_CONFIG,
104 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700105 * Op: Sets frame buffer ID for plane. Set together with CRTC.
106 * Arg: uint32_t - Plane ID
107 * uint32_t - Framebuffer ID
108 */
109 PLANE_SET_FB_ID,
110 /*
111 * Op: Sets the crtc for this plane. Set together with FB_ID.
112 * Arg: uint32_t - Plane ID
113 * uint32_t - CRTC ID
114 */
115 PLANE_SET_CRTC,
116 /*
117 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
118 * Arg: uint32_t - Plane ID
119 * uint32_t - Input fence
120 */
121 PLANE_SET_INPUT_FENCE,
122 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800123 * Op: Sets scaler config on this plane.
124 * Arg: uint32_t - Plane ID
125 * uint64_t - Address of the scaler config object (version based)
126 */
127 PLANE_SET_SCALER_CONFIG,
128 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800129 * Op: Sets plane rotation destination rect
130 * Arg: uint32_t - Plane ID
131 * DRMRect - rotator dst Rectangle
132 */
133 PLANE_SET_ROTATION_DST_RECT,
134 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700135 * Op: Sets FB Secure mode for this plane.
136 * Arg: uint32_t - Plane ID
137 * uint32_t - Value of the FB Secure mode.
138 */
139 PLANE_SET_FB_SECURE_MODE,
140 /*
Ping Li8d6dd622017-07-03 12:05:15 -0700141 * Op: Sets csc config on this plane.
142 * Arg: uint32_t - Plane ID
143 * uint32_t* - pointer to csc type
144 */
145 PLANE_SET_CSC_CONFIG,
146 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700147 * Op: Activate or deactivate a CRTC
148 * Arg: uint32_t - CRTC ID
149 * uint32_t - 1 to enable, 0 to disable
150 */
151 CRTC_SET_ACTIVE,
152 /*
153 * Op: Sets display mode
154 * Arg: uint32_t - CRTC ID
155 * drmModeModeInfo* - Pointer to display mode
156 */
157 CRTC_SET_MODE,
158 /*
159 * Op: Sets an offset indicating when a release fence should be signalled.
160 * Arg: uint32_t - offset
161 * 0: non-speculative, default
162 * 1: speculative
163 */
164 CRTC_SET_OUTPUT_FENCE_OFFSET,
165 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800166 * Op: Sets overall SDE core clock
167 * Arg: uint32_t - CRTC ID
168 * uint32_t - core_clk
169 */
170 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700171 /*
172 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800173 * Arg: uint32_t - CRTC ID
174 * uint32_t - core_ab
175 */
176 CRTC_SET_CORE_AB,
177 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700178 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800179 * Arg: uint32_t - CRTC ID
180 * uint32_t - core_ib
181 */
182 CRTC_SET_CORE_IB,
183 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700184 * Op: Sets LLCC Bus average bandwidth
185 * Arg: uint32_t - CRTC ID
186 * uint32_t - llcc_ab
187 */
188 CRTC_SET_LLCC_AB,
189 /*
190 * Op: Sets LLCC Bus instantaneous bandwidth
191 * Arg: uint32_t - CRTC ID
192 * uint32_t - llcc_ib
193 */
194 CRTC_SET_LLCC_IB,
195 /*
196 * Op: Sets DRAM bus average bandwidth
197 * Arg: uint32_t - CRTC ID
198 * uint32_t - dram_ab
199 */
200 CRTC_SET_DRAM_AB,
201 /*
202 * Op: Sets DRAM bus instantaneous bandwidth
203 * Arg: uint32_t - CRTC ID
204 * uint32_t - dram_ib
205 */
206 CRTC_SET_DRAM_IB,
207 /*
208 * Op: Sets rotator clock for inline rotation
209 * Arg: uint32_t - CRTC ID
210 * uint32_t - rot_clk
211 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530212 CRTC_SET_ROT_CLK,
213 /*
214 * Op: Sets destination scalar data
215 * Arg: uint32_t - CRTC ID
216 * uint64_t - Pointer to destination scalar data
217 */
218 CRTC_SET_DEST_SCALER_CONFIG,
219 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700220 * Op: Returns release fence for this frame. Should be called after Commit() on
221 * DRMAtomicReqInterface.
222 * Arg: uint32_t - CRTC ID
223 * int * - Pointer to an integer that will hold the returned fence
224 */
225 CRTC_GET_RELEASE_FENCE,
226 /*
Ping Li281f48d2017-01-16 12:45:40 -0800227 * Op: Sets PP feature
228 * Arg: uint32_t - CRTC ID
229 * DRMPPFeatureInfo * - PP feature data pointer
230 */
231 CRTC_SET_POST_PROC,
232 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800233 * Op: Sets CRTC ROIs.
234 * Arg: uint32_t - CRTC ID
235 * uint32_t - number of ROIs
236 * DRMRect * - Array of CRTC ROIs
237 */
238 CRTC_SET_ROI,
239 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700240 * Op: Sets Security level for CRTC.
241 * Arg: uint32_t - CRTC ID
242 * uint32_t - Security level
243 */
244 CRTC_SET_SECURITY_LEVEL,
245 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700246 * Op: sets solid fill stages
247 * Arg: uint32_t - CRTC ID
248 * Vector of DRMSolidfillStage
249 */
250 CRTC_SET_SOLIDFILL_STAGES,
251 /*
Anjaneya Prasad Musunurie8c67f22017-07-01 16:16:13 +0530252 * Op: Sets idle timeout.
253 * Arg: uint32_t - CRTC ID
254 * uint32_t - idle timeout in ms
255 */
256 CRTC_SET_IDLE_TIMEOUT,
257 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700258 * Op: Returns retire fence for this commit. Should be called after Commit() on
259 * DRMAtomicReqInterface.
260 * Arg: uint32_t - Connector ID
261 * int * - Pointer to an integer that will hold the returned fence
262 */
263 CONNECTOR_GET_RETIRE_FENCE,
264 /*
265 * Op: Sets writeback connector destination rect
266 * Arg: uint32_t - Connector ID
267 * DRMRect - Dst Rectangle
268 */
269 CONNECTOR_SET_OUTPUT_RECT,
270 /*
271 * Op: Sets frame buffer ID for writeback connector.
272 * Arg: uint32_t - Connector ID
273 * uint32_t - Framebuffer ID
274 */
275 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700276 /*
277 * Op: Sets power mode for connector.
278 * Arg: uint32_t - Connector ID
279 * uint32_t - Power Mode
280 */
281 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800282 /*
283 * Op: Sets panel ROIs.
284 * Arg: uint32_t - Connector ID
285 * uint32_t - number of ROIs
286 * DRMRect * - Array of Connector ROIs
287 */
288 CONNECTOR_SET_ROI,
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700289 /*
290 * Op: Set FB secure mode for Writeback connector.
291 * Arg: uint32_t - Connector ID
292 * uint32_t - FB Secure mode
293 */
294 CONNECTOR_SET_FB_SECURE_MODE,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700295};
296
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700297enum struct DRMRotation {
298 FLIP_H = 0x1,
299 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700300 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700301 ROT_90 = 0x4,
302};
303
Sushil Chauhan3396e202017-04-14 18:34:22 -0700304enum struct DRMPowerMode {
305 ON,
306 DOZE,
307 DOZE_SUSPEND,
308 OFF,
309};
310
Saurabh Shah66c941b2016-07-06 17:34:05 -0700311enum struct DRMBlendType {
312 UNDEFINED = 0,
313 OPAQUE = 1,
314 PREMULTIPLIED = 2,
315 COVERAGE = 3,
316};
317
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800318enum struct DRMSrcConfig {
319 DEINTERLACE = 0,
320};
321
Saurabh Shah66c941b2016-07-06 17:34:05 -0700322/* Display type to identify a suitable connector */
323enum struct DRMDisplayType {
324 PERIPHERAL,
325 TV,
326 VIRTUAL,
327};
328
329struct DRMRect {
330 uint32_t left; // Left-most pixel coordinate.
331 uint32_t top; // Top-most pixel coordinate.
332 uint32_t right; // Right-most pixel coordinate.
333 uint32_t bottom; // Bottom-most pixel coordinate.
334};
335
336//------------------------------------------------------------------------
337// DRM Info Query Types
338//------------------------------------------------------------------------
339
340enum struct QSEEDVersion {
341 V1,
342 V2,
343 V3,
344};
345
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700346/* QSEED3 Step version */
347enum struct QSEEDStepVersion {
348 V2,
349 V3,
350 V4,
351};
352
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700353enum struct SmartDMARevision {
354 V1,
355 V2,
356};
357
Saurabh Shah66c941b2016-07-06 17:34:05 -0700358/* Per CRTC Resource Info*/
359struct DRMCrtcInfo {
360 bool has_src_split;
361 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700362 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700363 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700364 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800365 float ib_fudge_factor;
366 float clk_fudge_factor;
367 uint32_t dest_scale_prefill_lines;
368 uint32_t undersized_prefill_lines;
369 uint32_t macrotile_prefill_lines;
370 uint32_t nv12_prefill_lines;
371 uint32_t linear_prefill_lines;
372 uint32_t downscale_prefill_lines;
373 uint32_t extra_prefill_lines;
374 uint32_t amortized_threshold;
375 uint64_t max_bandwidth_low;
376 uint64_t max_bandwidth_high;
377 uint32_t max_sde_clk;
378 CompRatioMap comp_ratio_rt_map;
379 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700380 uint32_t hw_version;
Ramkumar Radhakrishnanb4486322017-08-14 18:53:47 -0700381 uint64_t min_core_ib;
382 uint64_t min_llcc_ib;
383 uint64_t min_dram_ib;
Namit Solanki24921ab2017-05-23 20:16:25 +0530384 uint32_t dest_scaler_count = 0;
385 uint32_t max_dest_scaler_input_width = 0;
386 uint32_t max_dest_scaler_output_width = 0;
387 uint32_t max_dest_scale_up = 1;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700388};
389
390enum struct DRMPlaneType {
391 // Has CSC and scaling capability
392 VIG = 0,
393 // Has scaling capability but no CSC
394 RGB,
395 // No scaling support
396 DMA,
397 // Supports a small dimension and doesn't use a CRTC stage
398 CURSOR,
399 MAX,
400};
401
402struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700403 DRMPlaneType type;
404 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700405 // FourCC format enum and modifier
406 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
407 uint32_t max_linewidth;
408 uint32_t max_upscale;
409 uint32_t max_downscale;
410 uint32_t max_horizontal_deci;
411 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800412 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800413 uint32_t cache_size; // cache size in bytes for inline rotation support.
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700414 QSEEDStepVersion qseed3_version;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700415};
416
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700417// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
418typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700419
420enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700421 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700422 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700423 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700424 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700425 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700426 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700427 DUAL_LM_MERGE_DSC,
428 DUAL_LM_DSCMERGE,
429 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700430};
431
432enum struct DRMPanelMode {
433 VIDEO,
434 COMMAND,
435};
436
437/* Per Connector Info*/
438struct DRMConnectorInfo {
439 uint32_t mmWidth;
440 uint32_t mmHeight;
441 uint32_t type;
Saurabh Shahe618eb02017-07-27 14:32:10 -0700442 std::vector<drmModeModeInfo> modes;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700443 DRMTopology topology;
444 std::string panel_name;
445 DRMPanelMode panel_mode;
446 bool is_primary;
447 // Valid only if DRMPanelMode is VIDEO
448 bool dynamic_fps;
449 // FourCC format enum and modifier
450 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
451 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
452 uint32_t max_linewidth;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800453 // Valid only if mode is command
454 int num_roi;
455 int xstart;
456 int ystart;
457 int walign;
458 int halign;
459 int wmin;
460 int hmin;
461 bool roi_merge;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700462 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700463 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700464 uint32_t transfer_time_us;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700465};
466
467/* Identifier token for a display */
468struct DRMDisplayToken {
469 uint32_t conn_id;
470 uint32_t crtc_id;
471};
472
Ping Li281f48d2017-01-16 12:45:40 -0800473enum DRMPPFeatureID {
474 kFeaturePcc,
475 kFeatureIgc,
476 kFeaturePgc,
477 kFeatureMixerGc,
478 kFeaturePaV2,
479 kFeatureDither,
480 kFeatureGamut,
481 kFeaturePADither,
482 kPPFeaturesMax,
483};
484
485enum DRMPPPropType {
486 kPropEnum,
487 kPropRange,
488 kPropBlob,
489 kPropTypeMax,
490};
491
492struct DRMPPFeatureInfo {
493 DRMPPFeatureID id;
494 DRMPPPropType type;
495 uint32_t version;
496 uint32_t payload_size;
497 void *payload;
498};
499
Ping Li8d6dd622017-07-03 12:05:15 -0700500enum DRMCscType {
501 kCscYuv2Rgb601L,
502 kCscYuv2Rgb601FR,
503 kCscYuv2Rgb709L,
504 kCscYuv2Rgb2020L,
505 kCscYuv2Rgb2020FR,
506 kCscTypeMax,
507};
508
Saurabh Shah0ffee302016-11-22 10:42:11 -0800509struct DRMScalerLUTInfo {
510 uint32_t dir_lut_size = 0;
511 uint32_t cir_lut_size = 0;
512 uint32_t sep_lut_size = 0;
513 uint64_t dir_lut = 0;
514 uint64_t cir_lut = 0;
515 uint64_t sep_lut = 0;
516};
517
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700518enum struct DRMSecureMode {
519 NON_SECURE,
520 SECURE,
521 NON_SECURE_DIR_TRANSLATION,
522 SECURE_DIR_TRANSLATION,
523};
524
525enum struct DRMSecurityLevel {
526 SECURE_NON_SECURE,
527 SECURE_ONLY,
528};
529
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700530struct DRMSolidfillStage {
531 DRMRect bounding_rect {};
532 bool is_exclusion_rect = false;
533 uint32_t color = 0xff000000; // in 8bit argb
Gopikrishnaiah Anandancc123062017-07-31 17:21:03 -0700534 uint32_t red = 0;
535 uint32_t blue = 0;
536 uint32_t green = 0;
537 uint32_t alpha = 0xff;
538 uint32_t color_bit_depth = 0;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700539 uint32_t z_order = 0;
540 uint32_t plane_alpha = 0xff;
541};
542
Saurabh Shah66c941b2016-07-06 17:34:05 -0700543/* DRM Atomic Request Property Set.
544 *
545 * Helper class to create and populate atomic properties of DRM components
546 * when rendered in DRM atomic mode */
547class DRMAtomicReqInterface {
548 public:
549 virtual ~DRMAtomicReqInterface() {}
550 /* Perform request operation.
551 *
552 * [input]: opcode: operation code from DRMOps list.
553 * var_arg: arguments for DRMOps's can differ in number and
554 * data type. Refer above DRMOps to details.
555 * [return]: Error code if the API fails, 0 on success.
556 */
557 virtual int Perform(DRMOps opcode, ...) = 0;
558
559 /*
560 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
561 * called every frame.
562 * [input]: synchronous: Determines if the call should block until a h/w flip
Saurabh Shaha917aa72017-09-15 13:27:24 -0700563 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming
564 * planes but still need the previously staged ones to not be unstaged
Saurabh Shah66c941b2016-07-06 17:34:05 -0700565 * [return]: Error code if the API fails, 0 on success.
566 */
Saurabh Shaha917aa72017-09-15 13:27:24 -0700567 virtual int Commit(bool synchronous, bool retain_planes) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700568 /*
569 * Validate the params set via Perform().
570 * [return]: Error code if the API fails, 0 on success.
571 */
572 virtual int Validate() = 0;
573};
574
575class DRMManagerInterface;
576
577/* Populates a singleton instance of DRMManager */
578typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
579
580/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800581typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700582
583/*
584 * DRM Manager Interface - Any class which plans to implement helper function for vendor
585 * specific DRM driver implementation must implement the below interface routines to work
586 * with SDM.
587 */
588
589class DRMManagerInterface {
590 public:
591 virtual ~DRMManagerInterface() {}
592
593 /*
594 * Since SDM completely manages the planes. GetPlanesInfo will provide all
595 * the plane information.
596 * [output]: DRMPlanesInfo: Resource Info for planes.
597 */
598 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
599
600 /*
601 * Will provide all the information of a selected crtc.
602 * [input]: Use crtc id 0 to obtain system wide info
603 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
604 */
605 virtual void GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
606
607 /*
608 * Will provide all the information of a selected connector.
609 * [output]: DRMConnectorInfo: Resource Info for the given connector id
610 */
611 virtual void GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
612
613 /*
Ping Li281f48d2017-01-16 12:45:40 -0800614 * Will query post propcessing feature info of a CRTC.
615 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
616 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530617 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0;
Ping Li281f48d2017-01-16 12:45:40 -0800618 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700619 * Register a logical display to receive a token.
620 * Each display pipeline in DRM is identified by its CRTC and Connector(s).
621 * On display connect(bootup or hotplug), clients should invoke this interface to
622 * establish the pipeline for the display and should get a DisplayToken
623 * populated with crtc and connnector(s) id's. Here onwards, Client should
624 * use this token to represent the display for any Perform operations if
625 * needed.
626 *
627 * [input]: disp_type - Peripheral / TV / Virtual
628 * [output]: DRMDisplayToken - CRTC and Connector id's for the display
629 * [return]: 0 on success, a negative error value otherwise
630 */
631 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
632
633 /* Client should invoke this interface on display disconnect.
634 * [input]: DRMDisplayToken - identifier for the display.
635 */
636 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
637
638 /*
639 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
640 * returned as part of RegisterDisplay API. Needs to be called per display.
641 * [input]: DRMDisplayToken that identifies a display pipeline
642 * [output]: Pointer to an instance of DRMAtomicReqInterface.
643 * [return]: Error code if the API fails, 0 on success.
644 */
645 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
646
647 /*
648 * Destroys the instance of DRMAtomicReqInterface
649 * [input]: Pointer to a DRMAtomicReqInterface
650 * [return]: Error code if the API fails, 0 on success.
651 */
652 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Saurabh Shah0ffee302016-11-22 10:42:11 -0800653 /*
654 * Sets the global scaler LUT
655 * [input]: LUT Info
656 * [return]: Error code if the API fails, 0 on success.
657 */
658 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700659};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800660
Saurabh Shah66c941b2016-07-06 17:34:05 -0700661} // namespace sde_drm
662#endif // __DRM_INTERFACE_H__