blob: 01981ca85bc68a9e54d691ac16301606e25e9be0 [file] [log] [blame]
Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
2* Copyright (c) 2017, The Linux Foundation. All rights reserved.
3*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
13* * Neither the name of The Linux Foundation nor the names of its
14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070041
42namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080043
44typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
45
Saurabh Shah66c941b2016-07-06 17:34:05 -070046/*
47 * Drm Atomic Operation Codes
48 */
49enum struct DRMOps {
50 /*
51 * Op: Sets plane source crop
52 * Arg: uint32_t - Plane ID
53 * DRMRect - Source Rectangle
54 */
55 PLANE_SET_SRC_RECT,
56 /*
57 * Op: Sets plane destination rect
58 * Arg: uint32_t - Plane ID
59 * DRMRect - Dst Rectangle
60 */
61 PLANE_SET_DST_RECT,
62 /*
63 * Op: Sets plane zorder
64 * Arg: uint32_t - Plane ID
65 * uint32_t - zorder
66 */
67 PLANE_SET_ZORDER,
68 /*
69 * Op: Sets plane rotation flags
70 * Arg: uint32_t - Plane ID
71 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
72 */
73 PLANE_SET_ROTATION,
74 /*
75 * Op: Sets plane alpha
76 * Arg: uint32_t - Plane ID
77 * uint32_t - alpha value
78 */
79 PLANE_SET_ALPHA,
80 /*
81 * Op: Sets the blend type
82 * Arg: uint32_t - Plane ID
83 * uint32_t - blend type (see DRMBlendType)
84 */
85 PLANE_SET_BLEND_TYPE,
86 /*
87 * Op: Sets horizontal decimation
88 * Arg: uint32_t - Plane ID
89 * uint32_t - decimation factor
90 */
91 PLANE_SET_H_DECIMATION,
92 /*
93 * Op: Sets vertical decimation
94 * Arg: uint32_t - Plane ID
95 * uint32_t - decimation factor
96 */
97 PLANE_SET_V_DECIMATION,
98 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -080099 * Op: Sets source config flags
100 * Arg: uint32_t - Plane ID
101 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
102 */
103 PLANE_SET_SRC_CONFIG,
104 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700105 * Op: Sets frame buffer ID for plane. Set together with CRTC.
106 * Arg: uint32_t - Plane ID
107 * uint32_t - Framebuffer ID
108 */
109 PLANE_SET_FB_ID,
110 /*
111 * Op: Sets the crtc for this plane. Set together with FB_ID.
112 * Arg: uint32_t - Plane ID
113 * uint32_t - CRTC ID
114 */
115 PLANE_SET_CRTC,
116 /*
117 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
118 * Arg: uint32_t - Plane ID
119 * uint32_t - Input fence
120 */
121 PLANE_SET_INPUT_FENCE,
122 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800123 * Op: Sets scaler config on this plane.
124 * Arg: uint32_t - Plane ID
125 * uint64_t - Address of the scaler config object (version based)
126 */
127 PLANE_SET_SCALER_CONFIG,
128 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800129 * Op: Sets plane rotation destination rect
130 * Arg: uint32_t - Plane ID
131 * DRMRect - rotator dst Rectangle
132 */
133 PLANE_SET_ROTATION_DST_RECT,
134 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700135 * Op: Sets FB Secure mode for this plane.
136 * Arg: uint32_t - Plane ID
137 * uint32_t - Value of the FB Secure mode.
138 */
139 PLANE_SET_FB_SECURE_MODE,
140 /*
Ping Li8d6dd622017-07-03 12:05:15 -0700141 * Op: Sets csc config on this plane.
142 * Arg: uint32_t - Plane ID
143 * uint32_t* - pointer to csc type
144 */
145 PLANE_SET_CSC_CONFIG,
146 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700147 * Op: Activate or deactivate a CRTC
148 * Arg: uint32_t - CRTC ID
149 * uint32_t - 1 to enable, 0 to disable
150 */
151 CRTC_SET_ACTIVE,
152 /*
153 * Op: Sets display mode
154 * Arg: uint32_t - CRTC ID
155 * drmModeModeInfo* - Pointer to display mode
156 */
157 CRTC_SET_MODE,
158 /*
159 * Op: Sets an offset indicating when a release fence should be signalled.
160 * Arg: uint32_t - offset
161 * 0: non-speculative, default
162 * 1: speculative
163 */
164 CRTC_SET_OUTPUT_FENCE_OFFSET,
165 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800166 * Op: Sets overall SDE core clock
167 * Arg: uint32_t - CRTC ID
168 * uint32_t - core_clk
169 */
170 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700171 /*
172 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800173 * Arg: uint32_t - CRTC ID
174 * uint32_t - core_ab
175 */
176 CRTC_SET_CORE_AB,
177 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700178 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800179 * Arg: uint32_t - CRTC ID
180 * uint32_t - core_ib
181 */
182 CRTC_SET_CORE_IB,
183 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700184 * Op: Sets LLCC Bus average bandwidth
185 * Arg: uint32_t - CRTC ID
186 * uint32_t - llcc_ab
187 */
188 CRTC_SET_LLCC_AB,
189 /*
190 * Op: Sets LLCC Bus instantaneous bandwidth
191 * Arg: uint32_t - CRTC ID
192 * uint32_t - llcc_ib
193 */
194 CRTC_SET_LLCC_IB,
195 /*
196 * Op: Sets DRAM bus average bandwidth
197 * Arg: uint32_t - CRTC ID
198 * uint32_t - dram_ab
199 */
200 CRTC_SET_DRAM_AB,
201 /*
202 * Op: Sets DRAM bus instantaneous bandwidth
203 * Arg: uint32_t - CRTC ID
204 * uint32_t - dram_ib
205 */
206 CRTC_SET_DRAM_IB,
207 /*
208 * Op: Sets rotator clock for inline rotation
209 * Arg: uint32_t - CRTC ID
210 * uint32_t - rot_clk
211 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530212 CRTC_SET_ROT_CLK,
213 /*
214 * Op: Sets destination scalar data
215 * Arg: uint32_t - CRTC ID
216 * uint64_t - Pointer to destination scalar data
217 */
218 CRTC_SET_DEST_SCALER_CONFIG,
219 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700220 * Op: Returns release fence for this frame. Should be called after Commit() on
221 * DRMAtomicReqInterface.
222 * Arg: uint32_t - CRTC ID
223 * int * - Pointer to an integer that will hold the returned fence
224 */
225 CRTC_GET_RELEASE_FENCE,
226 /*
Ping Li281f48d2017-01-16 12:45:40 -0800227 * Op: Sets PP feature
228 * Arg: uint32_t - CRTC ID
229 * DRMPPFeatureInfo * - PP feature data pointer
230 */
231 CRTC_SET_POST_PROC,
232 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800233 * Op: Sets CRTC ROIs.
234 * Arg: uint32_t - CRTC ID
235 * uint32_t - number of ROIs
236 * DRMRect * - Array of CRTC ROIs
237 */
238 CRTC_SET_ROI,
239 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700240 * Op: Sets Security level for CRTC.
241 * Arg: uint32_t - CRTC ID
242 * uint32_t - Security level
243 */
244 CRTC_SET_SECURITY_LEVEL,
245 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700246 * Op: sets solid fill stages
247 * Arg: uint32_t - CRTC ID
248 * Vector of DRMSolidfillStage
249 */
250 CRTC_SET_SOLIDFILL_STAGES,
251 /*
Anjaneya Prasad Musunurie8c67f22017-07-01 16:16:13 +0530252 * Op: Sets idle timeout.
253 * Arg: uint32_t - CRTC ID
254 * uint32_t - idle timeout in ms
255 */
256 CRTC_SET_IDLE_TIMEOUT,
257 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700258 * Op: Returns retire fence for this commit. Should be called after Commit() on
259 * DRMAtomicReqInterface.
260 * Arg: uint32_t - Connector ID
261 * int * - Pointer to an integer that will hold the returned fence
262 */
263 CONNECTOR_GET_RETIRE_FENCE,
264 /*
265 * Op: Sets writeback connector destination rect
266 * Arg: uint32_t - Connector ID
267 * DRMRect - Dst Rectangle
268 */
269 CONNECTOR_SET_OUTPUT_RECT,
270 /*
271 * Op: Sets frame buffer ID for writeback connector.
272 * Arg: uint32_t - Connector ID
273 * uint32_t - Framebuffer ID
274 */
275 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700276 /*
277 * Op: Sets power mode for connector.
278 * Arg: uint32_t - Connector ID
279 * uint32_t - Power Mode
280 */
281 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800282 /*
283 * Op: Sets panel ROIs.
284 * Arg: uint32_t - Connector ID
285 * uint32_t - number of ROIs
286 * DRMRect * - Array of Connector ROIs
287 */
288 CONNECTOR_SET_ROI,
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700289 /*
Saurabh Shahf3635952017-10-16 17:08:18 -0700290 * Op: Sets the connector to autorefresh mode.
291 * Arg: uint32_t - Connector ID
292 * uint32_t - Enable-1, Disable-0
293 */
294 CONNECTOR_SET_AUTOREFRESH,
295 /*
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700296 * Op: Set FB secure mode for Writeback connector.
297 * Arg: uint32_t - Connector ID
298 * uint32_t - FB Secure mode
299 */
300 CONNECTOR_SET_FB_SECURE_MODE,
Saurabh Shah82b06f42017-09-06 16:43:49 -0700301 /*
302 * Op: Sets a crtc id to this connector
303 * Arg: uint32_t - Connector ID
304 * uint32_t - CRTC ID
305 */
306 CONNECTOR_SET_CRTC,
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700307 /*
308 * Op: Sets connector hdr metadata
309 * Arg: uint32_t - Connector ID
310 * drm_msm_ext_hdr_metadata - hdr_metadata
311 */
312 CONNECTOR_SET_HDR_METADATA,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700313};
314
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700315enum struct DRMRotation {
316 FLIP_H = 0x1,
317 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700318 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700319 ROT_90 = 0x4,
320};
321
Sushil Chauhan3396e202017-04-14 18:34:22 -0700322enum struct DRMPowerMode {
323 ON,
324 DOZE,
325 DOZE_SUSPEND,
326 OFF,
327};
328
Saurabh Shah66c941b2016-07-06 17:34:05 -0700329enum struct DRMBlendType {
330 UNDEFINED = 0,
331 OPAQUE = 1,
332 PREMULTIPLIED = 2,
333 COVERAGE = 3,
334};
335
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800336enum struct DRMSrcConfig {
337 DEINTERLACE = 0,
338};
339
Saurabh Shah66c941b2016-07-06 17:34:05 -0700340/* Display type to identify a suitable connector */
341enum struct DRMDisplayType {
342 PERIPHERAL,
343 TV,
344 VIRTUAL,
345};
346
347struct DRMRect {
348 uint32_t left; // Left-most pixel coordinate.
349 uint32_t top; // Top-most pixel coordinate.
350 uint32_t right; // Right-most pixel coordinate.
351 uint32_t bottom; // Bottom-most pixel coordinate.
352};
353
354//------------------------------------------------------------------------
355// DRM Info Query Types
356//------------------------------------------------------------------------
357
358enum struct QSEEDVersion {
359 V1,
360 V2,
361 V3,
362};
363
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700364/* QSEED3 Step version */
365enum struct QSEEDStepVersion {
366 V2,
367 V3,
368 V4,
369};
370
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700371enum struct SmartDMARevision {
372 V1,
373 V2,
374};
375
Saurabh Shah66c941b2016-07-06 17:34:05 -0700376/* Per CRTC Resource Info*/
377struct DRMCrtcInfo {
378 bool has_src_split;
Srikanth Rajagopalan49380782017-07-06 15:23:12 -0700379 bool has_hdr;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700380 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700381 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700382 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700383 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800384 float ib_fudge_factor;
385 float clk_fudge_factor;
386 uint32_t dest_scale_prefill_lines;
387 uint32_t undersized_prefill_lines;
388 uint32_t macrotile_prefill_lines;
389 uint32_t nv12_prefill_lines;
390 uint32_t linear_prefill_lines;
391 uint32_t downscale_prefill_lines;
392 uint32_t extra_prefill_lines;
393 uint32_t amortized_threshold;
394 uint64_t max_bandwidth_low;
395 uint64_t max_bandwidth_high;
396 uint32_t max_sde_clk;
397 CompRatioMap comp_ratio_rt_map;
398 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700399 uint32_t hw_version;
Namit Solanki24921ab2017-05-23 20:16:25 +0530400 uint32_t dest_scaler_count = 0;
401 uint32_t max_dest_scaler_input_width = 0;
402 uint32_t max_dest_scaler_output_width = 0;
403 uint32_t max_dest_scale_up = 1;
Pullakavi Srinivas3e2c0402017-12-05 17:50:15 +0530404 uint32_t min_prefill_lines = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700405};
406
407enum struct DRMPlaneType {
408 // Has CSC and scaling capability
409 VIG = 0,
410 // Has scaling capability but no CSC
411 RGB,
412 // No scaling support
413 DMA,
414 // Supports a small dimension and doesn't use a CRTC stage
415 CURSOR,
416 MAX,
417};
418
419struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700420 DRMPlaneType type;
421 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700422 // FourCC format enum and modifier
423 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
424 uint32_t max_linewidth;
425 uint32_t max_upscale;
426 uint32_t max_downscale;
427 uint32_t max_horizontal_deci;
428 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800429 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800430 uint32_t cache_size; // cache size in bytes for inline rotation support.
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700431 QSEEDStepVersion qseed3_version;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700432};
433
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700434// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
435typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700436
437enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700438 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700439 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700440 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700441 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700442 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700443 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700444 DUAL_LM_MERGE_DSC,
445 DUAL_LM_DSCMERGE,
446 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700447};
448
449enum struct DRMPanelMode {
450 VIDEO,
451 COMMAND,
452};
453
Saurabh Shah7e16c932017-11-03 17:55:36 -0700454/* Per mode info */
455struct DRMModeInfo {
456 drmModeModeInfo mode;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700457 DRMTopology topology;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800458 // Valid only if mode is command
459 int num_roi;
460 int xstart;
461 int ystart;
462 int walign;
463 int halign;
464 int wmin;
465 int hmin;
466 bool roi_merge;
Saurabh Shah7e16c932017-11-03 17:55:36 -0700467};
468
469/* Per Connector Info*/
470struct DRMConnectorInfo {
471 uint32_t mmWidth;
472 uint32_t mmHeight;
473 uint32_t type;
474 std::vector<DRMModeInfo> modes;
475 std::string panel_name;
476 DRMPanelMode panel_mode;
477 bool is_primary;
478 // Valid only if DRMPanelMode is VIDEO
479 bool dynamic_fps;
480 // FourCC format enum and modifier
481 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
482 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
483 uint32_t max_linewidth;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700484 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700485 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700486 uint32_t transfer_time_us;
Srikanth Rajagopalance0f7cb2017-06-12 15:14:26 -0700487 drm_msm_ext_hdr_properties ext_hdr_prop;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700488};
489
490/* Identifier token for a display */
491struct DRMDisplayToken {
492 uint32_t conn_id;
493 uint32_t crtc_id;
494};
495
Ping Li281f48d2017-01-16 12:45:40 -0800496enum DRMPPFeatureID {
497 kFeaturePcc,
498 kFeatureIgc,
499 kFeaturePgc,
500 kFeatureMixerGc,
501 kFeaturePaV2,
502 kFeatureDither,
503 kFeatureGamut,
504 kFeaturePADither,
Rajesh Yadavd30b0cc2017-09-22 00:26:54 +0530505 kFeaturePAHsic,
506 kFeaturePASixZone,
Rajesh Yadav99535ac2017-08-28 16:33:04 +0530507 kFeaturePAMemColSkin,
508 kFeaturePAMemColSky,
509 kFeaturePAMemColFoliage,
510 kFeaturePAMemColProt,
Ping Li281f48d2017-01-16 12:45:40 -0800511 kPPFeaturesMax,
512};
513
514enum DRMPPPropType {
515 kPropEnum,
516 kPropRange,
517 kPropBlob,
518 kPropTypeMax,
519};
520
521struct DRMPPFeatureInfo {
522 DRMPPFeatureID id;
523 DRMPPPropType type;
524 uint32_t version;
525 uint32_t payload_size;
526 void *payload;
527};
528
Ping Li8d6dd622017-07-03 12:05:15 -0700529enum DRMCscType {
530 kCscYuv2Rgb601L,
531 kCscYuv2Rgb601FR,
532 kCscYuv2Rgb709L,
533 kCscYuv2Rgb2020L,
534 kCscYuv2Rgb2020FR,
535 kCscTypeMax,
536};
537
Saurabh Shah0ffee302016-11-22 10:42:11 -0800538struct DRMScalerLUTInfo {
539 uint32_t dir_lut_size = 0;
540 uint32_t cir_lut_size = 0;
541 uint32_t sep_lut_size = 0;
542 uint64_t dir_lut = 0;
543 uint64_t cir_lut = 0;
544 uint64_t sep_lut = 0;
545};
546
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700547enum struct DRMSecureMode {
548 NON_SECURE,
549 SECURE,
550 NON_SECURE_DIR_TRANSLATION,
551 SECURE_DIR_TRANSLATION,
552};
553
554enum struct DRMSecurityLevel {
555 SECURE_NON_SECURE,
556 SECURE_ONLY,
557};
558
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700559struct DRMSolidfillStage {
560 DRMRect bounding_rect {};
561 bool is_exclusion_rect = false;
562 uint32_t color = 0xff000000; // in 8bit argb
Gopikrishnaiah Anandancc123062017-07-31 17:21:03 -0700563 uint32_t red = 0;
564 uint32_t blue = 0;
565 uint32_t green = 0;
566 uint32_t alpha = 0xff;
567 uint32_t color_bit_depth = 0;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700568 uint32_t z_order = 0;
569 uint32_t plane_alpha = 0xff;
570};
571
Saurabh Shah66c941b2016-07-06 17:34:05 -0700572/* DRM Atomic Request Property Set.
573 *
574 * Helper class to create and populate atomic properties of DRM components
575 * when rendered in DRM atomic mode */
576class DRMAtomicReqInterface {
577 public:
578 virtual ~DRMAtomicReqInterface() {}
579 /* Perform request operation.
580 *
581 * [input]: opcode: operation code from DRMOps list.
582 * var_arg: arguments for DRMOps's can differ in number and
583 * data type. Refer above DRMOps to details.
584 * [return]: Error code if the API fails, 0 on success.
585 */
586 virtual int Perform(DRMOps opcode, ...) = 0;
587
588 /*
589 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
590 * called every frame.
591 * [input]: synchronous: Determines if the call should block until a h/w flip
Saurabh Shaha917aa72017-09-15 13:27:24 -0700592 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming
593 * planes but still need the previously staged ones to not be unstaged
Saurabh Shah66c941b2016-07-06 17:34:05 -0700594 * [return]: Error code if the API fails, 0 on success.
595 */
Saurabh Shaha917aa72017-09-15 13:27:24 -0700596 virtual int Commit(bool synchronous, bool retain_planes) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700597 /*
598 * Validate the params set via Perform().
599 * [return]: Error code if the API fails, 0 on success.
600 */
601 virtual int Validate() = 0;
602};
603
604class DRMManagerInterface;
605
606/* Populates a singleton instance of DRMManager */
607typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
608
609/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800610typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700611
612/*
613 * DRM Manager Interface - Any class which plans to implement helper function for vendor
614 * specific DRM driver implementation must implement the below interface routines to work
615 * with SDM.
616 */
617
618class DRMManagerInterface {
619 public:
620 virtual ~DRMManagerInterface() {}
621
622 /*
623 * Since SDM completely manages the planes. GetPlanesInfo will provide all
624 * the plane information.
625 * [output]: DRMPlanesInfo: Resource Info for planes.
626 */
627 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
628
629 /*
630 * Will provide all the information of a selected crtc.
631 * [input]: Use crtc id 0 to obtain system wide info
632 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
633 */
634 virtual void GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
635
636 /*
637 * Will provide all the information of a selected connector.
638 * [output]: DRMConnectorInfo: Resource Info for the given connector id
639 */
640 virtual void GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
641
642 /*
Ping Li281f48d2017-01-16 12:45:40 -0800643 * Will query post propcessing feature info of a CRTC.
644 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
645 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530646 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0;
Ping Li281f48d2017-01-16 12:45:40 -0800647 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700648 * Register a logical display to receive a token.
649 * Each display pipeline in DRM is identified by its CRTC and Connector(s).
650 * On display connect(bootup or hotplug), clients should invoke this interface to
651 * establish the pipeline for the display and should get a DisplayToken
652 * populated with crtc and connnector(s) id's. Here onwards, Client should
653 * use this token to represent the display for any Perform operations if
654 * needed.
655 *
656 * [input]: disp_type - Peripheral / TV / Virtual
657 * [output]: DRMDisplayToken - CRTC and Connector id's for the display
658 * [return]: 0 on success, a negative error value otherwise
659 */
660 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
661
662 /* Client should invoke this interface on display disconnect.
663 * [input]: DRMDisplayToken - identifier for the display.
664 */
665 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
666
667 /*
668 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
669 * returned as part of RegisterDisplay API. Needs to be called per display.
670 * [input]: DRMDisplayToken that identifies a display pipeline
671 * [output]: Pointer to an instance of DRMAtomicReqInterface.
672 * [return]: Error code if the API fails, 0 on success.
673 */
674 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
675
676 /*
677 * Destroys the instance of DRMAtomicReqInterface
678 * [input]: Pointer to a DRMAtomicReqInterface
679 * [return]: Error code if the API fails, 0 on success.
680 */
681 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Saurabh Shah0ffee302016-11-22 10:42:11 -0800682 /*
683 * Sets the global scaler LUT
684 * [input]: LUT Info
685 * [return]: Error code if the API fails, 0 on success.
686 */
687 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700688};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800689
Saurabh Shah66c941b2016-07-06 17:34:05 -0700690} // namespace sde_drm
691#endif // __DRM_INTERFACE_H__