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Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
2* Copyright (c) 2017, The Linux Foundation. All rights reserved.
3*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
13* * Neither the name of The Linux Foundation nor the names of its
14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070041
42namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080043
44typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
45
Saurabh Shah66c941b2016-07-06 17:34:05 -070046/*
47 * Drm Atomic Operation Codes
48 */
49enum struct DRMOps {
50 /*
51 * Op: Sets plane source crop
52 * Arg: uint32_t - Plane ID
53 * DRMRect - Source Rectangle
54 */
55 PLANE_SET_SRC_RECT,
56 /*
57 * Op: Sets plane destination rect
58 * Arg: uint32_t - Plane ID
59 * DRMRect - Dst Rectangle
60 */
61 PLANE_SET_DST_RECT,
62 /*
63 * Op: Sets plane zorder
64 * Arg: uint32_t - Plane ID
65 * uint32_t - zorder
66 */
67 PLANE_SET_ZORDER,
68 /*
69 * Op: Sets plane rotation flags
70 * Arg: uint32_t - Plane ID
71 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
72 */
73 PLANE_SET_ROTATION,
74 /*
75 * Op: Sets plane alpha
76 * Arg: uint32_t - Plane ID
77 * uint32_t - alpha value
78 */
79 PLANE_SET_ALPHA,
80 /*
81 * Op: Sets the blend type
82 * Arg: uint32_t - Plane ID
83 * uint32_t - blend type (see DRMBlendType)
84 */
85 PLANE_SET_BLEND_TYPE,
86 /*
87 * Op: Sets horizontal decimation
88 * Arg: uint32_t - Plane ID
89 * uint32_t - decimation factor
90 */
91 PLANE_SET_H_DECIMATION,
92 /*
93 * Op: Sets vertical decimation
94 * Arg: uint32_t - Plane ID
95 * uint32_t - decimation factor
96 */
97 PLANE_SET_V_DECIMATION,
98 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -080099 * Op: Sets source config flags
100 * Arg: uint32_t - Plane ID
101 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
102 */
103 PLANE_SET_SRC_CONFIG,
104 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700105 * Op: Sets frame buffer ID for plane. Set together with CRTC.
106 * Arg: uint32_t - Plane ID
107 * uint32_t - Framebuffer ID
108 */
109 PLANE_SET_FB_ID,
110 /*
111 * Op: Sets the crtc for this plane. Set together with FB_ID.
112 * Arg: uint32_t - Plane ID
113 * uint32_t - CRTC ID
114 */
115 PLANE_SET_CRTC,
116 /*
117 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
118 * Arg: uint32_t - Plane ID
119 * uint32_t - Input fence
120 */
121 PLANE_SET_INPUT_FENCE,
122 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800123 * Op: Sets scaler config on this plane.
124 * Arg: uint32_t - Plane ID
125 * uint64_t - Address of the scaler config object (version based)
126 */
127 PLANE_SET_SCALER_CONFIG,
128 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800129 * Op: Sets plane rotation destination rect
130 * Arg: uint32_t - Plane ID
131 * DRMRect - rotator dst Rectangle
132 */
133 PLANE_SET_ROTATION_DST_RECT,
134 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700135 * Op: Sets FB Secure mode for this plane.
136 * Arg: uint32_t - Plane ID
137 * uint32_t - Value of the FB Secure mode.
138 */
139 PLANE_SET_FB_SECURE_MODE,
140 /*
Ping Li8d6dd622017-07-03 12:05:15 -0700141 * Op: Sets csc config on this plane.
142 * Arg: uint32_t - Plane ID
143 * uint32_t* - pointer to csc type
144 */
145 PLANE_SET_CSC_CONFIG,
146 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700147 * Op: Activate or deactivate a CRTC
148 * Arg: uint32_t - CRTC ID
149 * uint32_t - 1 to enable, 0 to disable
150 */
151 CRTC_SET_ACTIVE,
152 /*
153 * Op: Sets display mode
154 * Arg: uint32_t - CRTC ID
155 * drmModeModeInfo* - Pointer to display mode
156 */
157 CRTC_SET_MODE,
158 /*
159 * Op: Sets an offset indicating when a release fence should be signalled.
160 * Arg: uint32_t - offset
161 * 0: non-speculative, default
162 * 1: speculative
163 */
164 CRTC_SET_OUTPUT_FENCE_OFFSET,
165 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800166 * Op: Sets overall SDE core clock
167 * Arg: uint32_t - CRTC ID
168 * uint32_t - core_clk
169 */
170 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700171 /*
172 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800173 * Arg: uint32_t - CRTC ID
174 * uint32_t - core_ab
175 */
176 CRTC_SET_CORE_AB,
177 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700178 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800179 * Arg: uint32_t - CRTC ID
180 * uint32_t - core_ib
181 */
182 CRTC_SET_CORE_IB,
183 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700184 * Op: Sets LLCC Bus average bandwidth
185 * Arg: uint32_t - CRTC ID
186 * uint32_t - llcc_ab
187 */
188 CRTC_SET_LLCC_AB,
189 /*
190 * Op: Sets LLCC Bus instantaneous bandwidth
191 * Arg: uint32_t - CRTC ID
192 * uint32_t - llcc_ib
193 */
194 CRTC_SET_LLCC_IB,
195 /*
196 * Op: Sets DRAM bus average bandwidth
197 * Arg: uint32_t - CRTC ID
198 * uint32_t - dram_ab
199 */
200 CRTC_SET_DRAM_AB,
201 /*
202 * Op: Sets DRAM bus instantaneous bandwidth
203 * Arg: uint32_t - CRTC ID
204 * uint32_t - dram_ib
205 */
206 CRTC_SET_DRAM_IB,
207 /*
208 * Op: Sets rotator clock for inline rotation
209 * Arg: uint32_t - CRTC ID
210 * uint32_t - rot_clk
211 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530212 CRTC_SET_ROT_CLK,
213 /*
214 * Op: Sets destination scalar data
215 * Arg: uint32_t - CRTC ID
216 * uint64_t - Pointer to destination scalar data
217 */
218 CRTC_SET_DEST_SCALER_CONFIG,
219 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700220 * Op: Returns release fence for this frame. Should be called after Commit() on
221 * DRMAtomicReqInterface.
222 * Arg: uint32_t - CRTC ID
223 * int * - Pointer to an integer that will hold the returned fence
224 */
225 CRTC_GET_RELEASE_FENCE,
226 /*
Ping Li281f48d2017-01-16 12:45:40 -0800227 * Op: Sets PP feature
228 * Arg: uint32_t - CRTC ID
229 * DRMPPFeatureInfo * - PP feature data pointer
230 */
231 CRTC_SET_POST_PROC,
232 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800233 * Op: Sets CRTC ROIs.
234 * Arg: uint32_t - CRTC ID
235 * uint32_t - number of ROIs
236 * DRMRect * - Array of CRTC ROIs
237 */
238 CRTC_SET_ROI,
239 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700240 * Op: Sets Security level for CRTC.
241 * Arg: uint32_t - CRTC ID
242 * uint32_t - Security level
243 */
244 CRTC_SET_SECURITY_LEVEL,
245 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700246 * Op: sets solid fill stages
247 * Arg: uint32_t - CRTC ID
248 * Vector of DRMSolidfillStage
249 */
250 CRTC_SET_SOLIDFILL_STAGES,
251 /*
Anjaneya Prasad Musunurie8c67f22017-07-01 16:16:13 +0530252 * Op: Sets idle timeout.
253 * Arg: uint32_t - CRTC ID
254 * uint32_t - idle timeout in ms
255 */
256 CRTC_SET_IDLE_TIMEOUT,
257 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700258 * Op: Returns retire fence for this commit. Should be called after Commit() on
259 * DRMAtomicReqInterface.
260 * Arg: uint32_t - Connector ID
261 * int * - Pointer to an integer that will hold the returned fence
262 */
263 CONNECTOR_GET_RETIRE_FENCE,
264 /*
265 * Op: Sets writeback connector destination rect
266 * Arg: uint32_t - Connector ID
267 * DRMRect - Dst Rectangle
268 */
269 CONNECTOR_SET_OUTPUT_RECT,
270 /*
271 * Op: Sets frame buffer ID for writeback connector.
272 * Arg: uint32_t - Connector ID
273 * uint32_t - Framebuffer ID
274 */
275 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700276 /*
277 * Op: Sets power mode for connector.
278 * Arg: uint32_t - Connector ID
279 * uint32_t - Power Mode
280 */
281 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800282 /*
283 * Op: Sets panel ROIs.
284 * Arg: uint32_t - Connector ID
285 * uint32_t - number of ROIs
286 * DRMRect * - Array of Connector ROIs
287 */
288 CONNECTOR_SET_ROI,
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700289 /*
Saurabh Shahf3635952017-10-16 17:08:18 -0700290 * Op: Sets the connector to autorefresh mode.
291 * Arg: uint32_t - Connector ID
292 * uint32_t - Enable-1, Disable-0
293 */
294 CONNECTOR_SET_AUTOREFRESH,
295 /*
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700296 * Op: Set FB secure mode for Writeback connector.
297 * Arg: uint32_t - Connector ID
298 * uint32_t - FB Secure mode
299 */
300 CONNECTOR_SET_FB_SECURE_MODE,
Saurabh Shah82b06f42017-09-06 16:43:49 -0700301 /*
302 * Op: Sets a crtc id to this connector
303 * Arg: uint32_t - Connector ID
304 * uint32_t - CRTC ID
305 */
306 CONNECTOR_SET_CRTC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700307};
308
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700309enum struct DRMRotation {
310 FLIP_H = 0x1,
311 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700312 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700313 ROT_90 = 0x4,
314};
315
Sushil Chauhan3396e202017-04-14 18:34:22 -0700316enum struct DRMPowerMode {
317 ON,
318 DOZE,
319 DOZE_SUSPEND,
320 OFF,
321};
322
Saurabh Shah66c941b2016-07-06 17:34:05 -0700323enum struct DRMBlendType {
324 UNDEFINED = 0,
325 OPAQUE = 1,
326 PREMULTIPLIED = 2,
327 COVERAGE = 3,
328};
329
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800330enum struct DRMSrcConfig {
331 DEINTERLACE = 0,
332};
333
Saurabh Shah66c941b2016-07-06 17:34:05 -0700334/* Display type to identify a suitable connector */
335enum struct DRMDisplayType {
336 PERIPHERAL,
337 TV,
338 VIRTUAL,
339};
340
341struct DRMRect {
342 uint32_t left; // Left-most pixel coordinate.
343 uint32_t top; // Top-most pixel coordinate.
344 uint32_t right; // Right-most pixel coordinate.
345 uint32_t bottom; // Bottom-most pixel coordinate.
346};
347
348//------------------------------------------------------------------------
349// DRM Info Query Types
350//------------------------------------------------------------------------
351
352enum struct QSEEDVersion {
353 V1,
354 V2,
355 V3,
356};
357
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700358/* QSEED3 Step version */
359enum struct QSEEDStepVersion {
360 V2,
361 V3,
362 V4,
363};
364
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700365enum struct SmartDMARevision {
366 V1,
367 V2,
368};
369
Saurabh Shah66c941b2016-07-06 17:34:05 -0700370/* Per CRTC Resource Info*/
371struct DRMCrtcInfo {
372 bool has_src_split;
373 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700374 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700375 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700376 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800377 float ib_fudge_factor;
378 float clk_fudge_factor;
379 uint32_t dest_scale_prefill_lines;
380 uint32_t undersized_prefill_lines;
381 uint32_t macrotile_prefill_lines;
382 uint32_t nv12_prefill_lines;
383 uint32_t linear_prefill_lines;
384 uint32_t downscale_prefill_lines;
385 uint32_t extra_prefill_lines;
386 uint32_t amortized_threshold;
387 uint64_t max_bandwidth_low;
388 uint64_t max_bandwidth_high;
389 uint32_t max_sde_clk;
390 CompRatioMap comp_ratio_rt_map;
391 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700392 uint32_t hw_version;
Namit Solanki24921ab2017-05-23 20:16:25 +0530393 uint32_t dest_scaler_count = 0;
394 uint32_t max_dest_scaler_input_width = 0;
395 uint32_t max_dest_scaler_output_width = 0;
396 uint32_t max_dest_scale_up = 1;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700397};
398
399enum struct DRMPlaneType {
400 // Has CSC and scaling capability
401 VIG = 0,
402 // Has scaling capability but no CSC
403 RGB,
404 // No scaling support
405 DMA,
406 // Supports a small dimension and doesn't use a CRTC stage
407 CURSOR,
408 MAX,
409};
410
411struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700412 DRMPlaneType type;
413 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700414 // FourCC format enum and modifier
415 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
416 uint32_t max_linewidth;
417 uint32_t max_upscale;
418 uint32_t max_downscale;
419 uint32_t max_horizontal_deci;
420 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800421 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800422 uint32_t cache_size; // cache size in bytes for inline rotation support.
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700423 QSEEDStepVersion qseed3_version;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700424};
425
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700426// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
427typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700428
429enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700430 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700431 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700432 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700433 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700434 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700435 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700436 DUAL_LM_MERGE_DSC,
437 DUAL_LM_DSCMERGE,
438 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700439};
440
441enum struct DRMPanelMode {
442 VIDEO,
443 COMMAND,
444};
445
446/* Per Connector Info*/
447struct DRMConnectorInfo {
448 uint32_t mmWidth;
449 uint32_t mmHeight;
450 uint32_t type;
Saurabh Shahe618eb02017-07-27 14:32:10 -0700451 std::vector<drmModeModeInfo> modes;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700452 DRMTopology topology;
453 std::string panel_name;
454 DRMPanelMode panel_mode;
455 bool is_primary;
456 // Valid only if DRMPanelMode is VIDEO
457 bool dynamic_fps;
458 // FourCC format enum and modifier
459 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
460 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
461 uint32_t max_linewidth;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800462 // Valid only if mode is command
463 int num_roi;
464 int xstart;
465 int ystart;
466 int walign;
467 int halign;
468 int wmin;
469 int hmin;
470 bool roi_merge;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700471 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700472 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700473 uint32_t transfer_time_us;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700474};
475
476/* Identifier token for a display */
477struct DRMDisplayToken {
478 uint32_t conn_id;
479 uint32_t crtc_id;
480};
481
Ping Li281f48d2017-01-16 12:45:40 -0800482enum DRMPPFeatureID {
483 kFeaturePcc,
484 kFeatureIgc,
485 kFeaturePgc,
486 kFeatureMixerGc,
487 kFeaturePaV2,
488 kFeatureDither,
489 kFeatureGamut,
490 kFeaturePADither,
Rajesh Yadavd30b0cc2017-09-22 00:26:54 +0530491 kFeaturePAHsic,
492 kFeaturePASixZone,
Rajesh Yadav99535ac2017-08-28 16:33:04 +0530493 kFeaturePAMemColSkin,
494 kFeaturePAMemColSky,
495 kFeaturePAMemColFoliage,
496 kFeaturePAMemColProt,
Ping Li281f48d2017-01-16 12:45:40 -0800497 kPPFeaturesMax,
498};
499
500enum DRMPPPropType {
501 kPropEnum,
502 kPropRange,
503 kPropBlob,
504 kPropTypeMax,
505};
506
507struct DRMPPFeatureInfo {
508 DRMPPFeatureID id;
509 DRMPPPropType type;
510 uint32_t version;
511 uint32_t payload_size;
512 void *payload;
513};
514
Ping Li8d6dd622017-07-03 12:05:15 -0700515enum DRMCscType {
516 kCscYuv2Rgb601L,
517 kCscYuv2Rgb601FR,
518 kCscYuv2Rgb709L,
519 kCscYuv2Rgb2020L,
520 kCscYuv2Rgb2020FR,
521 kCscTypeMax,
522};
523
Saurabh Shah0ffee302016-11-22 10:42:11 -0800524struct DRMScalerLUTInfo {
525 uint32_t dir_lut_size = 0;
526 uint32_t cir_lut_size = 0;
527 uint32_t sep_lut_size = 0;
528 uint64_t dir_lut = 0;
529 uint64_t cir_lut = 0;
530 uint64_t sep_lut = 0;
531};
532
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700533enum struct DRMSecureMode {
534 NON_SECURE,
535 SECURE,
536 NON_SECURE_DIR_TRANSLATION,
537 SECURE_DIR_TRANSLATION,
538};
539
540enum struct DRMSecurityLevel {
541 SECURE_NON_SECURE,
542 SECURE_ONLY,
543};
544
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700545struct DRMSolidfillStage {
546 DRMRect bounding_rect {};
547 bool is_exclusion_rect = false;
548 uint32_t color = 0xff000000; // in 8bit argb
Gopikrishnaiah Anandancc123062017-07-31 17:21:03 -0700549 uint32_t red = 0;
550 uint32_t blue = 0;
551 uint32_t green = 0;
552 uint32_t alpha = 0xff;
553 uint32_t color_bit_depth = 0;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700554 uint32_t z_order = 0;
555 uint32_t plane_alpha = 0xff;
556};
557
Saurabh Shah66c941b2016-07-06 17:34:05 -0700558/* DRM Atomic Request Property Set.
559 *
560 * Helper class to create and populate atomic properties of DRM components
561 * when rendered in DRM atomic mode */
562class DRMAtomicReqInterface {
563 public:
564 virtual ~DRMAtomicReqInterface() {}
565 /* Perform request operation.
566 *
567 * [input]: opcode: operation code from DRMOps list.
568 * var_arg: arguments for DRMOps's can differ in number and
569 * data type. Refer above DRMOps to details.
570 * [return]: Error code if the API fails, 0 on success.
571 */
572 virtual int Perform(DRMOps opcode, ...) = 0;
573
574 /*
575 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
576 * called every frame.
577 * [input]: synchronous: Determines if the call should block until a h/w flip
Saurabh Shaha917aa72017-09-15 13:27:24 -0700578 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming
579 * planes but still need the previously staged ones to not be unstaged
Saurabh Shah66c941b2016-07-06 17:34:05 -0700580 * [return]: Error code if the API fails, 0 on success.
581 */
Saurabh Shaha917aa72017-09-15 13:27:24 -0700582 virtual int Commit(bool synchronous, bool retain_planes) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700583 /*
584 * Validate the params set via Perform().
585 * [return]: Error code if the API fails, 0 on success.
586 */
587 virtual int Validate() = 0;
588};
589
590class DRMManagerInterface;
591
592/* Populates a singleton instance of DRMManager */
593typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
594
595/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800596typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700597
598/*
599 * DRM Manager Interface - Any class which plans to implement helper function for vendor
600 * specific DRM driver implementation must implement the below interface routines to work
601 * with SDM.
602 */
603
604class DRMManagerInterface {
605 public:
606 virtual ~DRMManagerInterface() {}
607
608 /*
609 * Since SDM completely manages the planes. GetPlanesInfo will provide all
610 * the plane information.
611 * [output]: DRMPlanesInfo: Resource Info for planes.
612 */
613 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
614
615 /*
616 * Will provide all the information of a selected crtc.
617 * [input]: Use crtc id 0 to obtain system wide info
618 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
619 */
620 virtual void GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
621
622 /*
623 * Will provide all the information of a selected connector.
624 * [output]: DRMConnectorInfo: Resource Info for the given connector id
625 */
626 virtual void GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
627
628 /*
Ping Li281f48d2017-01-16 12:45:40 -0800629 * Will query post propcessing feature info of a CRTC.
630 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
631 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530632 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0;
Ping Li281f48d2017-01-16 12:45:40 -0800633 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700634 * Register a logical display to receive a token.
635 * Each display pipeline in DRM is identified by its CRTC and Connector(s).
636 * On display connect(bootup or hotplug), clients should invoke this interface to
637 * establish the pipeline for the display and should get a DisplayToken
638 * populated with crtc and connnector(s) id's. Here onwards, Client should
639 * use this token to represent the display for any Perform operations if
640 * needed.
641 *
642 * [input]: disp_type - Peripheral / TV / Virtual
643 * [output]: DRMDisplayToken - CRTC and Connector id's for the display
644 * [return]: 0 on success, a negative error value otherwise
645 */
646 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
647
648 /* Client should invoke this interface on display disconnect.
649 * [input]: DRMDisplayToken - identifier for the display.
650 */
651 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
652
653 /*
654 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
655 * returned as part of RegisterDisplay API. Needs to be called per display.
656 * [input]: DRMDisplayToken that identifies a display pipeline
657 * [output]: Pointer to an instance of DRMAtomicReqInterface.
658 * [return]: Error code if the API fails, 0 on success.
659 */
660 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
661
662 /*
663 * Destroys the instance of DRMAtomicReqInterface
664 * [input]: Pointer to a DRMAtomicReqInterface
665 * [return]: Error code if the API fails, 0 on success.
666 */
667 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Saurabh Shah0ffee302016-11-22 10:42:11 -0800668 /*
669 * Sets the global scaler LUT
670 * [input]: LUT Info
671 * [return]: Error code if the API fails, 0 on success.
672 */
673 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700674};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800675
Saurabh Shah66c941b2016-07-06 17:34:05 -0700676} // namespace sde_drm
677#endif // __DRM_INTERFACE_H__