blob: 508564a5acbd25a3c1acbe905af25ad7d574d7ab [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Arun Kumar K.R6c85f052014-01-21 21:47:41 -08002 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Iliyan Malchev202a77d2012-06-11 14:41:12 -070052using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070053using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070054
Naomi Luisa44100c2013-02-08 12:42:03 -080055ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
56
Sushil Chauhan65e26302015-01-14 10:48:57 -080057static void getUBwcWidthAndHeight(int, int, int, int&, int&);
58static unsigned int getUBwcSize(int, int, int, const int, const int);
59
Iliyan Malchev202a77d2012-06-11 14:41:12 -070060//Common functions
Naseer Ahmed29a26812012-06-14 00:56:20 -070061static bool canFallback(int usage, bool triedSystem)
Iliyan Malchev202a77d2012-06-11 14:41:12 -070062{
63 // Fallback to system heap when alloc fails unless
64 // 1. Composition type is MDP
65 // 2. Alloc from system heap was already tried
66 // 3. The heap type is requsted explicitly
67 // 4. The heap type is protected
68 // 5. The buffer is meant for external display only
69
Naseer Ahmeda87da602012-07-01 23:54:19 -070070 if(QCCompositionType::getInstance().getCompositionType() &
71 COMPOSITION_TYPE_MDP)
Iliyan Malchev202a77d2012-06-11 14:41:12 -070072 return false;
73 if(triedSystem)
74 return false;
Sushil Chauhan7651a802013-01-08 16:08:09 -080075 if(usage & (GRALLOC_HEAP_MASK | GRALLOC_USAGE_PROTECTED))
Iliyan Malchev202a77d2012-06-11 14:41:12 -070076 return false;
Naseer Ahmed4c588a22012-07-31 19:12:17 -070077 if(usage & (GRALLOC_HEAP_MASK | GRALLOC_USAGE_PRIVATE_EXTERNAL_ONLY))
Iliyan Malchev202a77d2012-06-11 14:41:12 -070078 return false;
79 //Return true by default
80 return true;
81}
82
Saurabh Shah1adcafe2014-12-19 10:05:41 -080083/* The default policy is to return cached buffers unless the client explicity
84 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
85 * read or written in software. Any combination with a _RARELY_ flag will be
86 * treated as uncached. */
87static bool useUncached(const int& usage) {
88 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
89 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
90 GRALLOC_USAGE_SW_WRITE_RARELY) or
91 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
92 GRALLOC_USAGE_SW_READ_RARELY))
93 return true;
94
95 return false;
96}
97
Naomi Luisa44100c2013-02-08 12:42:03 -080098//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080099AdrenoMemInfo::AdrenoMemInfo()
100{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800101 LINK_adreno_compute_aligned_width_and_height = NULL;
102 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700103 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800104 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800105 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800106
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800107 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
108 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800109 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700110 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
111 *(void **)&LINK_adreno_compute_padding =
112 ::dlsym(libadreno_utils, "compute_surface_padding");
113 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
114 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800115 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
116 ::dlsym(libadreno_utils,
117 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800118 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
119 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800120 }
121}
122
123AdrenoMemInfo::~AdrenoMemInfo()
124{
125 if (libadreno_utils) {
126 ::dlclose(libadreno_utils);
127 }
128}
129
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700130int AdrenoMemInfo::isMacroTilingSupportedByGPU()
131{
132 if ((libadreno_utils)) {
133 if(LINK_adreno_isMacroTilingSupportedByGpu) {
134 return LINK_adreno_isMacroTilingSupportedByGpu();
135 }
136 }
137 return 0;
138}
139
140
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800141void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800142 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800143{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800144
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800145 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700146 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800147 int tileEnabled = isMacroTileEnabled(format, usage);
148 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
149 height, format, tileEnabled, aligned_w, aligned_h);
150 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800151 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800152
153 if (isUBwcEnabled(format, usage)) {
154 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
155 return;
156 }
157
158 aligned_w = width;
159 aligned_h = height;
160 switch (format)
161 {
162 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
163 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
164 case HAL_PIXEL_FORMAT_RAW_SENSOR:
165 aligned_w = ALIGN(width, 32);
166 break;
167 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
168 aligned_w = ALIGN(width, 128);
169 break;
170 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
171 case HAL_PIXEL_FORMAT_YV12:
172 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
173 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
174 case HAL_PIXEL_FORMAT_YCbCr_422_I:
175 case HAL_PIXEL_FORMAT_YCrCb_422_I:
176 aligned_w = ALIGN(width, 16);
177 break;
178 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
179 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
180 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
181 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
182 break;
183 case HAL_PIXEL_FORMAT_BLOB:
184 break;
185 case HAL_PIXEL_FORMAT_NV21_ZSL:
186 aligned_w = ALIGN(width, 64);
187 aligned_h = ALIGN(height, 64);
188 break;
189 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
190 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
191 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
192 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
196 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
197 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
198 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
199 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
200 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
201 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
202 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
203 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
204 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
205 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
206 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
207 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
208 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
209 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
210 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
211 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
212 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
213 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
214 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
215 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
216 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
217 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
218 int bytesPerPixel = 0;
219 int raster_mode = 0; //Adreno unknown raster mode.
220 int padding_threshold = 512; //Threshold for padding
221 //surfaces.
222
223 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
224 width, height, format, 0,raster_mode, padding_threshold,
225 &aligned_w, &aligned_h, &bytesPerPixel);
226 } else {
227 ALOGW("%s: Warning!! Symbols" \
228 " compute_compressedfmt_aligned_width_and_height" \
229 " not found", __FUNCTION__);
230 }
231 break;
232 default: break;
233 }
234}
235
236void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
237 int tile_enabled, int& aligned_w, int& aligned_h)
238{
239 aligned_w = ALIGN(width, 32);
240 aligned_h = ALIGN(height, 32);
241
242 // Don't add any additional padding if debug.gralloc.map_fb_memory
243 // is enabled
244 char property[PROPERTY_VALUE_MAX];
245 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
246 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
247 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
248 return;
249 }
250
251 int bpp = 4;
252 switch(format)
253 {
254 case HAL_PIXEL_FORMAT_RGB_888:
255 bpp = 3;
256 break;
257 case HAL_PIXEL_FORMAT_RGB_565:
258 case HAL_PIXEL_FORMAT_RGBA_5551:
259 case HAL_PIXEL_FORMAT_RGBA_4444:
260 bpp = 2;
261 break;
262 default: break;
263 }
264
265 if (libadreno_utils) {
266 int raster_mode = 0; // Adreno unknown raster mode.
267 int padding_threshold = 512; // Threshold for padding surfaces.
268 // the function below computes aligned width and aligned height
269 // based on linear or macro tile mode selected.
270 if(LINK_adreno_compute_aligned_width_and_height) {
271 LINK_adreno_compute_aligned_width_and_height(width,
272 height, bpp, tile_enabled,
273 raster_mode, padding_threshold,
274 &aligned_w, &aligned_h);
275
276 } else if(LINK_adreno_compute_padding) {
277 int surface_tile_height = 1; // Linear surface
278 aligned_w = LINK_adreno_compute_padding(width, bpp,
279 surface_tile_height, raster_mode,
280 padding_threshold);
281 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
282 __FUNCTION__);
283 } else {
284 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
285 "compute_aligned_width_and_height not found", __FUNCTION__);
286 }
287 }
288}
289
290int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
291{
Sushil Chauhan082acd62015-01-14 16:49:29 -0800292 if (libadreno_utils) {
293 if (LINK_adreno_isUBWCSupportedByGpu) {
294 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
295 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
296 }
297 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800298 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800299}
300
Sushil Chauhan082acd62015-01-14 16:49:29 -0800301ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
302{
303 switch (hal_format) {
304 case HAL_PIXEL_FORMAT_RGBA_8888:
305 return ADRENO_PIXELFORMAT_R8G8B8A8;
306 case HAL_PIXEL_FORMAT_RGB_565:
307 return ADRENO_PIXELFORMAT_B5G6R5;
308 case HAL_PIXEL_FORMAT_sRGB_A_8888:
309 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
310 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800311 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800312 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
313 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800314 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800315 default:
316 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
317 break;
318 }
319 return ADRENO_PIXELFORMAT_UNKNOWN;
320}
321
Naomi Luisa44100c2013-02-08 12:42:03 -0800322//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700323IAllocController* IAllocController::sController = NULL;
324IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700325{
326 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700327 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700328 }
329 return sController;
330}
331
332
333//-------------- IonController-----------------------//
334IonController::IonController()
335{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530336 allocateIonMem();
337}
338
339void IonController::allocateIonMem()
340{
341 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700342}
343
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700344int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700345{
346 int ionFlags = 0;
347 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700348
349 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700350 data.allocType = 0;
351
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500352 if(usage & GRALLOC_USAGE_PRIVATE_SYSTEM_HEAP)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700353 ionFlags |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700354
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500355 if(usage & GRALLOC_USAGE_PRIVATE_IOMMU_HEAP)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700356 ionFlags |= ION_HEAP(ION_IOMMU_HEAP_ID);
357
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530358 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530359 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500360 ionFlags |= ION_HEAP(ION_CP_MM_HEAP_ID);
361 ionFlags |= ION_SECURE;
Shalaj Jain13cdf812014-12-02 16:20:54 -0800362#ifdef ION_FLAG_ALLOW_NON_CONTIG
363 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
364 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
365 }
366#endif
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530367 } else {
368 // for targets/OEMs which do not need HW level protection
369 // do not set ion secure flag & MM heap. Fallback to IOMMU heap.
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500370 ionFlags |= ION_HEAP(ION_IOMMU_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530371 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500372 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530373 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
374 //MM Heap is exclusively a secure heap.
375 //If it is used for non secure cases, fallback to IOMMU heap
376 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
377 cannot be used as an insecure heap!\
378 trying to use IOMMU instead !!");
379 ionFlags |= ION_HEAP(ION_IOMMU_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500380 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700381
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700382 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
383 ionFlags |= ION_HEAP(ION_CAMERA_HEAP_ID);
384
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700385 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
386 ionFlags |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700387
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530388 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500389 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700390
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700391 // if no flags are set, default to
392 // SF + IOMMU heaps, so that bypass can work
393 // we can fall back to system heap if
394 // we run out.
395 if(!ionFlags)
396 ionFlags = ION_HEAP(ION_SF_HEAP_ID) | ION_HEAP(ION_IOMMU_HEAP_ID);
397
398 data.flags = ionFlags;
399 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700400
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700401 // Fallback
Naseer Ahmed29a26812012-06-14 00:56:20 -0700402 if(ret < 0 && canFallback(usage,
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700403 (ionFlags & ION_SYSTEM_HEAP_ID)))
404 {
405 ALOGW("Falling back to system heap");
406 data.flags = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700407 ret = mIonAlloc->alloc_buffer(data);
408 }
409
410 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700411 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700412 }
413
414 return ret;
415}
416
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700417IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700418{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700419 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700420 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
421 memalloc = mIonAlloc;
422 } else {
423 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
424 }
425
426 return memalloc;
427}
428
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700429bool isMacroTileEnabled(int format, int usage)
430{
431 bool tileEnabled = false;
432
433 // Check whether GPU & MDSS supports MacroTiling feature
434 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
435 qdutils::MDPVersion::getInstance().supportsMacroTile())
436 {
437 // check the format
438 switch(format)
439 {
440 case HAL_PIXEL_FORMAT_RGBA_8888:
441 case HAL_PIXEL_FORMAT_RGBX_8888:
442 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800443 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700444 {
445 tileEnabled = true;
446 // check the usage flags
447 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
448 GRALLOC_USAGE_SW_WRITE_MASK)) {
449 // Application intends to use CPU for rendering
450 tileEnabled = false;
451 }
452 break;
453 }
454 default:
455 break;
456 }
457 }
458 return tileEnabled;
459}
460
461// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800462unsigned int getSize(int format, int width, int height, int usage,
463 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700464
Sushil Chauhan65e26302015-01-14 10:48:57 -0800465 if (isUBwcEnabled(format, usage)) {
466 return getUBwcSize(width, height, format, alignedw, alignedh);
467 }
468
469 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700470 switch (format) {
471 case HAL_PIXEL_FORMAT_RGBA_8888:
472 case HAL_PIXEL_FORMAT_RGBX_8888:
473 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700474 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700475 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700476 size = alignedw * alignedh * 4;
477 break;
478 case HAL_PIXEL_FORMAT_RGB_888:
479 size = alignedw * alignedh * 3;
480 break;
481 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700482 case HAL_PIXEL_FORMAT_RGBA_5551:
483 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400484 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700485 size = alignedw * alignedh * 2;
486 break;
487
488 // adreno formats
489 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
490 size = ALIGN(alignedw*alignedh, 4096);
491 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
492 break;
493 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
494 // The chroma plane is subsampled,
495 // but the pitch in bytes is unchanged
496 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700497 size = ALIGN( alignedw * alignedh, 8192);
498 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
499 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700500 case HAL_PIXEL_FORMAT_YV12:
501 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
502 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800503 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700504 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400505 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700506 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700507 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700508 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800509 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
510 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400511 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800512 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700513 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
514 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700515 case HAL_PIXEL_FORMAT_YCbCr_422_I:
516 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700517 if(width & 1) {
518 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800519 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700520 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700521 size = ALIGN(alignedw * alignedh * 2, 4096);
522 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700523 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400524 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700525 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700526 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400527 case HAL_PIXEL_FORMAT_BLOB:
528 if(height != 1) {
529 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
530 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800531 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400532 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400533 size = width;
534 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700535 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700536 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
537 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500538 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
539 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
540 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
541 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
542 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
543 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
544 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
545 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
546 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
547 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
548 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
549 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
550 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
551 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
552 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
553 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
554 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
555 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
556 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
557 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
558 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
559 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
560 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
561 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
562 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
563 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
564 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800565 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500566 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
567 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700568 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800569 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800570 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700571 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700572 return size;
573}
574
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700575unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700576 int& alignedw, int &alignedh)
577{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700578 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700579
580 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
581 height,
582 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800583 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700584 alignedw,
585 alignedh);
586
Sushil Chauhan65e26302015-01-14 10:48:57 -0800587 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700588
589 return size;
590}
591
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700592
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700593unsigned int getBufferSizeAndDimensions(int width, int height, int format,
594 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700595{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700596 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700597
598 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
599 height,
600 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800601 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700602 alignedw,
603 alignedh);
604
Sushil Chauhan65e26302015-01-14 10:48:57 -0800605 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700606
607 return size;
608}
609
610
611void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700612 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700613{
614 tileEnabled = isMacroTileEnabled(format, usage);
615
616 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
617 height,
618 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800619 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700620 alignedw,
621 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800622 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700623}
624
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400625int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
626{
627 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700628 int width = hnd->width;
629 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700630 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800631 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700632
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400633 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
634
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700635 // Check metadata if the geometry has been updated.
636 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
637 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
638 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
639 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
640 }
641
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400642 // Get the chroma offsets from the handle width/height. We take advantage
643 // of the fact the width _is_ the stride
644 switch (hnd->format) {
645 //Semiplanar
646 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
647 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
648 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
649 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700650 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400651 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700652 ycbcr->cb = (void*)(hnd->base + ystride * height);
653 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400654 ycbcr->ystride = ystride;
655 ycbcr->cstride = cstride;
656 ycbcr->chroma_step = 2;
657 break;
658
Sushil Chauhan4686c972015-02-20 15:44:52 -0800659 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
660 // NV12_UBWC buffer has these 4 planes in the following sequence:
661 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
662 unsigned int y_meta_stride, y_meta_height, y_meta_size;
663 unsigned int y_stride, y_height, y_size;
664 unsigned int c_meta_stride, c_meta_height, c_meta_size;
665
666 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
667 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
668 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
669
670 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
671 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
672 y_size = ALIGN((y_stride * y_height), alignment);
673
674 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
675 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
676 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
677
678 ycbcr->y = (void*)(hnd->base + y_meta_size);
679 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
680 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
681 c_meta_size + 1);
682 ycbcr->ystride = y_stride;
683 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
684 ycbcr->chroma_step = 2;
685 break;
686
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400687 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
688 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
689 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
690 case HAL_PIXEL_FORMAT_NV21_ZSL:
691 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700692 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400693 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700694 ycbcr->cr = (void*)(hnd->base + ystride * height);
695 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400696 ycbcr->ystride = ystride;
697 ycbcr->cstride = cstride;
698 ycbcr->chroma_step = 2;
699 break;
700
701 //Planar
702 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700703 ystride = width;
704 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400705 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700706 ycbcr->cr = (void*)(hnd->base + ystride * height);
707 ycbcr->cb = (void*)(hnd->base + ystride * height +
708 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400709 ycbcr->ystride = ystride;
710 ycbcr->cstride = cstride;
711 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400712 break;
713 //Unsupported formats
714 case HAL_PIXEL_FORMAT_YCbCr_422_I:
715 case HAL_PIXEL_FORMAT_YCrCb_422_I:
716 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
717 default:
718 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
719 hnd->format);
720 err = -EINVAL;
721 }
722 return err;
723
724}
725
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700726
727
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700728// Allocate buffer from width, height and format into a
729// private_handle_t. It is the responsibility of the caller
730// to free the buffer using the free_buffer function
731int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
732{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700733 alloc_data data;
734 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700735 gralloc::IAllocController* sAlloc =
736 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700737 data.base = 0;
738 data.fd = -1;
739 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700740 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
741 alignedh);
742
Naseer Ahmed29a26812012-06-14 00:56:20 -0700743 data.align = getpagesize();
744 data.uncached = useUncached(usage);
745 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700746
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700747 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700748 if (0 != err) {
749 ALOGE("%s: allocate failed", __FUNCTION__);
750 return -ENOMEM;
751 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700752
Naseer Ahmed29a26812012-06-14 00:56:20 -0700753 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700754 data.allocType, 0, format,
755 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700756 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700757 hnd->offset = data.offset;
758 hnd->gpuaddr = 0;
759 *pHnd = hnd;
760 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700761}
762
763void free_buffer(private_handle_t *hnd)
764{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700765 gralloc::IAllocController* sAlloc =
766 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700767 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700768 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700769 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
770 }
771 if(hnd)
772 delete hnd;
773
774}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800775
776// UBWC helper functions
777static bool isUBwcFormat(int format)
778{
779 // Explicitly defined UBWC formats
780 switch(format)
781 {
782 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
783 return true;
784 default:
785 return false;
786 }
787}
788
789static bool isUBwcSupported(int format)
790{
791 // Existing HAL formats with UBWC support
792 switch(format)
793 {
794 case HAL_PIXEL_FORMAT_RGB_565:
795 case HAL_PIXEL_FORMAT_RGBA_8888:
796 case HAL_PIXEL_FORMAT_sRGB_A_8888:
797 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
798 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
799 return true;
800 default:
801 return false;
802 }
803}
804
805bool isUBwcEnabled(int format, int usage)
806{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800807 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
808 if (isUBwcFormat(format))
809 return true;
810
811 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
812 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
813 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
814 // Allow UBWC, only if CPU usage flags are not set
815 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800816 GRALLOC_USAGE_SW_WRITE_MASK))) {
817 return true;
818 }
819 }
820 return false;
821}
822
823static void getUBwcWidthAndHeight(int width, int height, int format,
824 int& aligned_w, int& aligned_h)
825{
826 switch (format)
827 {
828 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
829 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
830 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
831 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
832 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
833 break;
834 default:
835 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
836 aligned_w = 0;
837 aligned_h = 0;
838 break;
839 }
840}
841
842static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
843{
844 block_width = 0;
845 block_height = 0;
846
847 switch(bpp)
848 {
849 case 2:
850 case 4:
851 block_width = 16;
852 block_height = 4;
853 break;
854 case 8:
855 block_width = 8;
856 block_height = 4;
857 break;
858 case 16:
859 block_width = 4;
860 block_height = 4;
861 break;
862 default:
863 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
864 break;
865 }
866}
867
868static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
869{
870 unsigned int size = 0;
871 int meta_width, meta_height;
872 int block_width, block_height;
873
874 getUBwcBlockSize(bpp, block_width, block_height);
875
876 if (!block_width || !block_height) {
877 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
878 return size;
879 }
880
881 // Align meta buffer height to 16 blocks
882 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
883
884 // Align meta buffer width to 64 blocks
885 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
886
887 // Align meta buffer size to 4K
888 size = ((meta_width * meta_height), 4096);
889 return size;
890}
891
892static unsigned int getUBwcSize(int width, int height, int format,
893 const int alignedw, const int alignedh) {
894
895 unsigned int size = 0;
896 switch (format) {
897 case HAL_PIXEL_FORMAT_RGB_565:
898 size = alignedw * alignedh * 2;
899 size += getUBwcMetaBufferSize(width, height, 2);
900 break;
901 case HAL_PIXEL_FORMAT_RGBA_8888:
902 case HAL_PIXEL_FORMAT_sRGB_A_8888:
903 size = alignedw * alignedh * 4;
904 size += getUBwcMetaBufferSize(width, height, 4);
905 break;
906 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
907 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
908 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
909 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
910 break;
911 default:
912 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
913 break;
914 }
915 return size;
916}