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Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
Rohit Kulkarni21649ef2018-02-08 14:39:40 -08002* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
Saurabh Shah66c941b2016-07-06 17:34:05 -07003*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
13* * Neither the name of The Linux Foundation nor the names of its
14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070041
42namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080043
44typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
45
Saurabh Shah66c941b2016-07-06 17:34:05 -070046/*
47 * Drm Atomic Operation Codes
48 */
49enum struct DRMOps {
50 /*
51 * Op: Sets plane source crop
52 * Arg: uint32_t - Plane ID
53 * DRMRect - Source Rectangle
54 */
55 PLANE_SET_SRC_RECT,
56 /*
57 * Op: Sets plane destination rect
58 * Arg: uint32_t - Plane ID
59 * DRMRect - Dst Rectangle
60 */
61 PLANE_SET_DST_RECT,
62 /*
Namit Solanki6d0d8062017-11-30 17:29:48 +053063 * Op: Sets plane exclusion rect
64 * Arg: uint32_t - Plane ID
65 * drm_clip_rect - Exclusion Rectangle
66 */
67 PLANE_SET_EXCL_RECT,
68 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -070069 * Op: Sets plane zorder
70 * Arg: uint32_t - Plane ID
71 * uint32_t - zorder
72 */
73 PLANE_SET_ZORDER,
74 /*
75 * Op: Sets plane rotation flags
76 * Arg: uint32_t - Plane ID
77 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
78 */
79 PLANE_SET_ROTATION,
80 /*
81 * Op: Sets plane alpha
82 * Arg: uint32_t - Plane ID
83 * uint32_t - alpha value
84 */
85 PLANE_SET_ALPHA,
86 /*
87 * Op: Sets the blend type
88 * Arg: uint32_t - Plane ID
89 * uint32_t - blend type (see DRMBlendType)
90 */
91 PLANE_SET_BLEND_TYPE,
92 /*
93 * Op: Sets horizontal decimation
94 * Arg: uint32_t - Plane ID
95 * uint32_t - decimation factor
96 */
97 PLANE_SET_H_DECIMATION,
98 /*
99 * Op: Sets vertical decimation
100 * Arg: uint32_t - Plane ID
101 * uint32_t - decimation factor
102 */
103 PLANE_SET_V_DECIMATION,
104 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800105 * Op: Sets source config flags
106 * Arg: uint32_t - Plane ID
107 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
108 */
109 PLANE_SET_SRC_CONFIG,
110 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700111 * Op: Sets frame buffer ID for plane. Set together with CRTC.
112 * Arg: uint32_t - Plane ID
113 * uint32_t - Framebuffer ID
114 */
115 PLANE_SET_FB_ID,
116 /*
117 * Op: Sets the crtc for this plane. Set together with FB_ID.
118 * Arg: uint32_t - Plane ID
119 * uint32_t - CRTC ID
120 */
121 PLANE_SET_CRTC,
122 /*
123 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
124 * Arg: uint32_t - Plane ID
125 * uint32_t - Input fence
126 */
127 PLANE_SET_INPUT_FENCE,
128 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800129 * Op: Sets scaler config on this plane.
130 * Arg: uint32_t - Plane ID
131 * uint64_t - Address of the scaler config object (version based)
132 */
133 PLANE_SET_SCALER_CONFIG,
134 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800135 * Op: Sets plane rotation destination rect
136 * Arg: uint32_t - Plane ID
137 * DRMRect - rotator dst Rectangle
138 */
139 PLANE_SET_ROTATION_DST_RECT,
140 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700141 * Op: Sets FB Secure mode for this plane.
142 * Arg: uint32_t - Plane ID
143 * uint32_t - Value of the FB Secure mode.
144 */
145 PLANE_SET_FB_SECURE_MODE,
146 /*
Ping Li8d6dd622017-07-03 12:05:15 -0700147 * Op: Sets csc config on this plane.
148 * Arg: uint32_t - Plane ID
149 * uint32_t* - pointer to csc type
150 */
151 PLANE_SET_CSC_CONFIG,
152 /*
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800153 * Op: Sets multirect mode on this plane.
154 * Arg: uint32_t - Plane ID
155 * uint32_t - multirect mode
156 */
157 PLANE_SET_MULTIRECT_MODE,
158 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700159 * Op: Activate or deactivate a CRTC
160 * Arg: uint32_t - CRTC ID
161 * uint32_t - 1 to enable, 0 to disable
162 */
163 CRTC_SET_ACTIVE,
164 /*
165 * Op: Sets display mode
166 * Arg: uint32_t - CRTC ID
167 * drmModeModeInfo* - Pointer to display mode
168 */
169 CRTC_SET_MODE,
170 /*
171 * Op: Sets an offset indicating when a release fence should be signalled.
172 * Arg: uint32_t - offset
173 * 0: non-speculative, default
174 * 1: speculative
175 */
176 CRTC_SET_OUTPUT_FENCE_OFFSET,
177 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800178 * Op: Sets overall SDE core clock
179 * Arg: uint32_t - CRTC ID
180 * uint32_t - core_clk
181 */
182 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700183 /*
184 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800185 * Arg: uint32_t - CRTC ID
186 * uint32_t - core_ab
187 */
188 CRTC_SET_CORE_AB,
189 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700190 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800191 * Arg: uint32_t - CRTC ID
192 * uint32_t - core_ib
193 */
194 CRTC_SET_CORE_IB,
195 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700196 * Op: Sets LLCC Bus average bandwidth
197 * Arg: uint32_t - CRTC ID
198 * uint32_t - llcc_ab
199 */
200 CRTC_SET_LLCC_AB,
201 /*
202 * Op: Sets LLCC Bus instantaneous bandwidth
203 * Arg: uint32_t - CRTC ID
204 * uint32_t - llcc_ib
205 */
206 CRTC_SET_LLCC_IB,
207 /*
208 * Op: Sets DRAM bus average bandwidth
209 * Arg: uint32_t - CRTC ID
210 * uint32_t - dram_ab
211 */
212 CRTC_SET_DRAM_AB,
213 /*
214 * Op: Sets DRAM bus instantaneous bandwidth
215 * Arg: uint32_t - CRTC ID
216 * uint32_t - dram_ib
217 */
218 CRTC_SET_DRAM_IB,
219 /*
Ramkumar Radhakrishnanb7910442017-12-11 13:32:47 -0800220 * Op: Sets Rotator BW for inline rotation
221 * Arg: uint32_t - CRTC ID
222 * uint32_t - rot_bw
223 */
224 CRTC_SET_ROT_PREFILL_BW,
225 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700226 * Op: Sets rotator clock for inline rotation
227 * Arg: uint32_t - CRTC ID
228 * uint32_t - rot_clk
229 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530230 CRTC_SET_ROT_CLK,
231 /*
232 * Op: Sets destination scalar data
233 * Arg: uint32_t - CRTC ID
234 * uint64_t - Pointer to destination scalar data
235 */
236 CRTC_SET_DEST_SCALER_CONFIG,
237 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700238 * Op: Returns release fence for this frame. Should be called after Commit() on
239 * DRMAtomicReqInterface.
240 * Arg: uint32_t - CRTC ID
241 * int * - Pointer to an integer that will hold the returned fence
242 */
243 CRTC_GET_RELEASE_FENCE,
244 /*
Ping Li281f48d2017-01-16 12:45:40 -0800245 * Op: Sets PP feature
246 * Arg: uint32_t - CRTC ID
247 * DRMPPFeatureInfo * - PP feature data pointer
248 */
249 CRTC_SET_POST_PROC,
250 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800251 * Op: Sets CRTC ROIs.
252 * Arg: uint32_t - CRTC ID
253 * uint32_t - number of ROIs
254 * DRMRect * - Array of CRTC ROIs
255 */
256 CRTC_SET_ROI,
257 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700258 * Op: Sets Security level for CRTC.
259 * Arg: uint32_t - CRTC ID
260 * uint32_t - Security level
261 */
262 CRTC_SET_SECURITY_LEVEL,
263 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700264 * Op: sets solid fill stages
265 * Arg: uint32_t - CRTC ID
266 * Vector of DRMSolidfillStage
267 */
268 CRTC_SET_SOLIDFILL_STAGES,
269 /*
Anjaneya Prasad Musunurie8c67f22017-07-01 16:16:13 +0530270 * Op: Sets idle timeout.
271 * Arg: uint32_t - CRTC ID
272 * uint32_t - idle timeout in ms
273 */
274 CRTC_SET_IDLE_TIMEOUT,
275 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700276 * Op: Returns retire fence for this commit. Should be called after Commit() on
277 * DRMAtomicReqInterface.
278 * Arg: uint32_t - Connector ID
279 * int * - Pointer to an integer that will hold the returned fence
280 */
281 CONNECTOR_GET_RETIRE_FENCE,
282 /*
283 * Op: Sets writeback connector destination rect
284 * Arg: uint32_t - Connector ID
285 * DRMRect - Dst Rectangle
286 */
287 CONNECTOR_SET_OUTPUT_RECT,
288 /*
289 * Op: Sets frame buffer ID for writeback connector.
290 * Arg: uint32_t - Connector ID
291 * uint32_t - Framebuffer ID
292 */
293 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700294 /*
295 * Op: Sets power mode for connector.
296 * Arg: uint32_t - Connector ID
297 * uint32_t - Power Mode
298 */
299 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800300 /*
301 * Op: Sets panel ROIs.
302 * Arg: uint32_t - Connector ID
303 * uint32_t - number of ROIs
304 * DRMRect * - Array of Connector ROIs
305 */
306 CONNECTOR_SET_ROI,
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700307 /*
Saurabh Shahf3635952017-10-16 17:08:18 -0700308 * Op: Sets the connector to autorefresh mode.
309 * Arg: uint32_t - Connector ID
310 * uint32_t - Enable-1, Disable-0
311 */
312 CONNECTOR_SET_AUTOREFRESH,
313 /*
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700314 * Op: Set FB secure mode for Writeback connector.
315 * Arg: uint32_t - Connector ID
316 * uint32_t - FB Secure mode
317 */
318 CONNECTOR_SET_FB_SECURE_MODE,
Saurabh Shah82b06f42017-09-06 16:43:49 -0700319 /*
320 * Op: Sets a crtc id to this connector
321 * Arg: uint32_t - Connector ID
322 * uint32_t - CRTC ID
323 */
324 CONNECTOR_SET_CRTC,
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700325 /*
326 * Op: Sets connector hdr metadata
327 * Arg: uint32_t - Connector ID
328 * drm_msm_ext_hdr_metadata - hdr_metadata
329 */
330 CONNECTOR_SET_HDR_METADATA,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700331};
332
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700333enum struct DRMRotation {
334 FLIP_H = 0x1,
335 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700336 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700337 ROT_90 = 0x4,
338};
339
Sushil Chauhan3396e202017-04-14 18:34:22 -0700340enum struct DRMPowerMode {
341 ON,
342 DOZE,
343 DOZE_SUSPEND,
344 OFF,
345};
346
Saurabh Shah66c941b2016-07-06 17:34:05 -0700347enum struct DRMBlendType {
348 UNDEFINED = 0,
349 OPAQUE = 1,
350 PREMULTIPLIED = 2,
351 COVERAGE = 3,
352};
353
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800354enum struct DRMSrcConfig {
355 DEINTERLACE = 0,
356};
357
Saurabh Shah66c941b2016-07-06 17:34:05 -0700358/* Display type to identify a suitable connector */
359enum struct DRMDisplayType {
360 PERIPHERAL,
361 TV,
362 VIRTUAL,
363};
364
365struct DRMRect {
366 uint32_t left; // Left-most pixel coordinate.
367 uint32_t top; // Top-most pixel coordinate.
368 uint32_t right; // Right-most pixel coordinate.
369 uint32_t bottom; // Bottom-most pixel coordinate.
370};
371
372//------------------------------------------------------------------------
373// DRM Info Query Types
374//------------------------------------------------------------------------
375
376enum struct QSEEDVersion {
377 V1,
378 V2,
379 V3,
380};
381
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700382/* QSEED3 Step version */
383enum struct QSEEDStepVersion {
384 V2,
385 V3,
386 V4,
387};
388
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700389enum struct SmartDMARevision {
390 V1,
391 V2,
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530392 V2p5
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700393};
394
Saurabh Shah66c941b2016-07-06 17:34:05 -0700395/* Per CRTC Resource Info*/
396struct DRMCrtcInfo {
397 bool has_src_split;
Srikanth Rajagopalan49380782017-07-06 15:23:12 -0700398 bool has_hdr;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700399 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700400 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700401 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700402 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800403 float ib_fudge_factor;
404 float clk_fudge_factor;
405 uint32_t dest_scale_prefill_lines;
406 uint32_t undersized_prefill_lines;
407 uint32_t macrotile_prefill_lines;
408 uint32_t nv12_prefill_lines;
409 uint32_t linear_prefill_lines;
410 uint32_t downscale_prefill_lines;
411 uint32_t extra_prefill_lines;
412 uint32_t amortized_threshold;
413 uint64_t max_bandwidth_low;
414 uint64_t max_bandwidth_high;
415 uint32_t max_sde_clk;
416 CompRatioMap comp_ratio_rt_map;
417 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700418 uint32_t hw_version;
Namit Solanki24921ab2017-05-23 20:16:25 +0530419 uint32_t dest_scaler_count = 0;
420 uint32_t max_dest_scaler_input_width = 0;
421 uint32_t max_dest_scaler_output_width = 0;
422 uint32_t max_dest_scale_up = 1;
Pullakavi Srinivas3e2c0402017-12-05 17:50:15 +0530423 uint32_t min_prefill_lines = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700424};
425
426enum struct DRMPlaneType {
427 // Has CSC and scaling capability
428 VIG = 0,
429 // Has scaling capability but no CSC
430 RGB,
431 // No scaling support
432 DMA,
433 // Supports a small dimension and doesn't use a CRTC stage
434 CURSOR,
435 MAX,
436};
437
438struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700439 DRMPlaneType type;
440 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700441 // FourCC format enum and modifier
442 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
443 uint32_t max_linewidth;
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530444 uint32_t max_scaler_linewidth;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700445 uint32_t max_upscale;
446 uint32_t max_downscale;
447 uint32_t max_horizontal_deci;
448 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800449 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800450 uint32_t cache_size; // cache size in bytes for inline rotation support.
Namit Solanki6d0d8062017-11-30 17:29:48 +0530451 bool has_excl_rect = false;
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700452 QSEEDStepVersion qseed3_version;
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800453 bool multirect_prop_present = false;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700454};
455
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700456// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
457typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700458
459enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700460 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700461 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700462 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700463 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700464 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700465 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700466 DUAL_LM_MERGE_DSC,
467 DUAL_LM_DSCMERGE,
468 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700469};
470
471enum struct DRMPanelMode {
472 VIDEO,
473 COMMAND,
474};
475
Saurabh Shah7e16c932017-11-03 17:55:36 -0700476/* Per mode info */
477struct DRMModeInfo {
478 drmModeModeInfo mode;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700479 DRMTopology topology;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800480 // Valid only if mode is command
481 int num_roi;
482 int xstart;
483 int ystart;
484 int walign;
485 int halign;
486 int wmin;
487 int hmin;
488 bool roi_merge;
Saurabh Shah7e16c932017-11-03 17:55:36 -0700489};
490
491/* Per Connector Info*/
492struct DRMConnectorInfo {
493 uint32_t mmWidth;
494 uint32_t mmHeight;
495 uint32_t type;
496 std::vector<DRMModeInfo> modes;
497 std::string panel_name;
498 DRMPanelMode panel_mode;
499 bool is_primary;
500 // Valid only if DRMPanelMode is VIDEO
501 bool dynamic_fps;
502 // FourCC format enum and modifier
503 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
504 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
505 uint32_t max_linewidth;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700506 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700507 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700508 uint32_t transfer_time_us;
Srikanth Rajagopalance0f7cb2017-06-12 15:14:26 -0700509 drm_msm_ext_hdr_properties ext_hdr_prop;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700510};
511
512/* Identifier token for a display */
513struct DRMDisplayToken {
514 uint32_t conn_id;
515 uint32_t crtc_id;
516};
517
Ping Li281f48d2017-01-16 12:45:40 -0800518enum DRMPPFeatureID {
519 kFeaturePcc,
520 kFeatureIgc,
521 kFeaturePgc,
522 kFeatureMixerGc,
523 kFeaturePaV2,
524 kFeatureDither,
525 kFeatureGamut,
526 kFeaturePADither,
Rajesh Yadavd30b0cc2017-09-22 00:26:54 +0530527 kFeaturePAHsic,
528 kFeaturePASixZone,
Rajesh Yadav99535ac2017-08-28 16:33:04 +0530529 kFeaturePAMemColSkin,
530 kFeaturePAMemColSky,
531 kFeaturePAMemColFoliage,
532 kFeaturePAMemColProt,
Ping Li281f48d2017-01-16 12:45:40 -0800533 kPPFeaturesMax,
534};
535
536enum DRMPPPropType {
537 kPropEnum,
538 kPropRange,
539 kPropBlob,
540 kPropTypeMax,
541};
542
543struct DRMPPFeatureInfo {
544 DRMPPFeatureID id;
545 DRMPPPropType type;
546 uint32_t version;
547 uint32_t payload_size;
548 void *payload;
549};
550
Ping Li8d6dd622017-07-03 12:05:15 -0700551enum DRMCscType {
552 kCscYuv2Rgb601L,
553 kCscYuv2Rgb601FR,
554 kCscYuv2Rgb709L,
555 kCscYuv2Rgb2020L,
556 kCscYuv2Rgb2020FR,
557 kCscTypeMax,
558};
559
Saurabh Shah0ffee302016-11-22 10:42:11 -0800560struct DRMScalerLUTInfo {
561 uint32_t dir_lut_size = 0;
562 uint32_t cir_lut_size = 0;
563 uint32_t sep_lut_size = 0;
564 uint64_t dir_lut = 0;
565 uint64_t cir_lut = 0;
566 uint64_t sep_lut = 0;
567};
568
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700569enum struct DRMSecureMode {
570 NON_SECURE,
571 SECURE,
572 NON_SECURE_DIR_TRANSLATION,
573 SECURE_DIR_TRANSLATION,
574};
575
576enum struct DRMSecurityLevel {
577 SECURE_NON_SECURE,
578 SECURE_ONLY,
579};
580
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800581enum struct DRMMultiRectMode {
582 NONE = 0,
583 PARALLEL = 1,
584 SERIAL = 2,
585};
586
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700587struct DRMSolidfillStage {
588 DRMRect bounding_rect {};
589 bool is_exclusion_rect = false;
590 uint32_t color = 0xff000000; // in 8bit argb
Gopikrishnaiah Anandancc123062017-07-31 17:21:03 -0700591 uint32_t red = 0;
592 uint32_t blue = 0;
593 uint32_t green = 0;
594 uint32_t alpha = 0xff;
595 uint32_t color_bit_depth = 0;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700596 uint32_t z_order = 0;
597 uint32_t plane_alpha = 0xff;
598};
599
Saurabh Shah66c941b2016-07-06 17:34:05 -0700600/* DRM Atomic Request Property Set.
601 *
602 * Helper class to create and populate atomic properties of DRM components
603 * when rendered in DRM atomic mode */
604class DRMAtomicReqInterface {
605 public:
606 virtual ~DRMAtomicReqInterface() {}
607 /* Perform request operation.
608 *
609 * [input]: opcode: operation code from DRMOps list.
610 * var_arg: arguments for DRMOps's can differ in number and
611 * data type. Refer above DRMOps to details.
612 * [return]: Error code if the API fails, 0 on success.
613 */
614 virtual int Perform(DRMOps opcode, ...) = 0;
615
616 /*
617 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
618 * called every frame.
619 * [input]: synchronous: Determines if the call should block until a h/w flip
Saurabh Shaha917aa72017-09-15 13:27:24 -0700620 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming
621 * planes but still need the previously staged ones to not be unstaged
Saurabh Shah66c941b2016-07-06 17:34:05 -0700622 * [return]: Error code if the API fails, 0 on success.
623 */
Saurabh Shaha917aa72017-09-15 13:27:24 -0700624 virtual int Commit(bool synchronous, bool retain_planes) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700625 /*
626 * Validate the params set via Perform().
627 * [return]: Error code if the API fails, 0 on success.
628 */
629 virtual int Validate() = 0;
630};
631
632class DRMManagerInterface;
633
634/* Populates a singleton instance of DRMManager */
635typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
636
637/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800638typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700639
640/*
641 * DRM Manager Interface - Any class which plans to implement helper function for vendor
642 * specific DRM driver implementation must implement the below interface routines to work
643 * with SDM.
644 */
645
646class DRMManagerInterface {
647 public:
648 virtual ~DRMManagerInterface() {}
649
650 /*
651 * Since SDM completely manages the planes. GetPlanesInfo will provide all
652 * the plane information.
653 * [output]: DRMPlanesInfo: Resource Info for planes.
654 */
655 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
656
657 /*
658 * Will provide all the information of a selected crtc.
659 * [input]: Use crtc id 0 to obtain system wide info
660 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
661 */
662 virtual void GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
663
664 /*
665 * Will provide all the information of a selected connector.
666 * [output]: DRMConnectorInfo: Resource Info for the given connector id
667 */
668 virtual void GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
669
670 /*
Ping Li281f48d2017-01-16 12:45:40 -0800671 * Will query post propcessing feature info of a CRTC.
672 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
673 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530674 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0;
Ping Li281f48d2017-01-16 12:45:40 -0800675 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700676 * Register a logical display to receive a token.
677 * Each display pipeline in DRM is identified by its CRTC and Connector(s).
678 * On display connect(bootup or hotplug), clients should invoke this interface to
679 * establish the pipeline for the display and should get a DisplayToken
680 * populated with crtc and connnector(s) id's. Here onwards, Client should
681 * use this token to represent the display for any Perform operations if
682 * needed.
683 *
684 * [input]: disp_type - Peripheral / TV / Virtual
685 * [output]: DRMDisplayToken - CRTC and Connector id's for the display
686 * [return]: 0 on success, a negative error value otherwise
687 */
688 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
689
690 /* Client should invoke this interface on display disconnect.
691 * [input]: DRMDisplayToken - identifier for the display.
692 */
693 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
694
695 /*
696 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
697 * returned as part of RegisterDisplay API. Needs to be called per display.
698 * [input]: DRMDisplayToken that identifies a display pipeline
699 * [output]: Pointer to an instance of DRMAtomicReqInterface.
700 * [return]: Error code if the API fails, 0 on success.
701 */
702 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
703
704 /*
705 * Destroys the instance of DRMAtomicReqInterface
706 * [input]: Pointer to a DRMAtomicReqInterface
707 * [return]: Error code if the API fails, 0 on success.
708 */
709 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Saurabh Shah0ffee302016-11-22 10:42:11 -0800710 /*
711 * Sets the global scaler LUT
712 * [input]: LUT Info
713 * [return]: Error code if the API fails, 0 on success.
714 */
715 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700716};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800717
Saurabh Shah66c941b2016-07-06 17:34:05 -0700718} // namespace sde_drm
719#endif // __DRM_INTERFACE_H__