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Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
Saurabh Shah2d179742018-02-05 15:51:53 -08002* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
Saurabh Shah66c941b2016-07-06 17:34:05 -07003*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
13* * Neither the name of The Linux Foundation nor the names of its
14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070041
42namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080043
44typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
45
Saurabh Shah66c941b2016-07-06 17:34:05 -070046/*
47 * Drm Atomic Operation Codes
48 */
49enum struct DRMOps {
50 /*
51 * Op: Sets plane source crop
52 * Arg: uint32_t - Plane ID
53 * DRMRect - Source Rectangle
54 */
55 PLANE_SET_SRC_RECT,
56 /*
57 * Op: Sets plane destination rect
58 * Arg: uint32_t - Plane ID
59 * DRMRect - Dst Rectangle
60 */
61 PLANE_SET_DST_RECT,
62 /*
63 * Op: Sets plane zorder
64 * Arg: uint32_t - Plane ID
65 * uint32_t - zorder
66 */
67 PLANE_SET_ZORDER,
68 /*
69 * Op: Sets plane rotation flags
70 * Arg: uint32_t - Plane ID
71 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
72 */
73 PLANE_SET_ROTATION,
74 /*
75 * Op: Sets plane alpha
76 * Arg: uint32_t - Plane ID
77 * uint32_t - alpha value
78 */
79 PLANE_SET_ALPHA,
80 /*
81 * Op: Sets the blend type
82 * Arg: uint32_t - Plane ID
83 * uint32_t - blend type (see DRMBlendType)
84 */
85 PLANE_SET_BLEND_TYPE,
86 /*
87 * Op: Sets horizontal decimation
88 * Arg: uint32_t - Plane ID
89 * uint32_t - decimation factor
90 */
91 PLANE_SET_H_DECIMATION,
92 /*
93 * Op: Sets vertical decimation
94 * Arg: uint32_t - Plane ID
95 * uint32_t - decimation factor
96 */
97 PLANE_SET_V_DECIMATION,
98 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -080099 * Op: Sets source config flags
100 * Arg: uint32_t - Plane ID
101 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
102 */
103 PLANE_SET_SRC_CONFIG,
104 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700105 * Op: Sets frame buffer ID for plane. Set together with CRTC.
106 * Arg: uint32_t - Plane ID
107 * uint32_t - Framebuffer ID
108 */
109 PLANE_SET_FB_ID,
110 /*
111 * Op: Sets the crtc for this plane. Set together with FB_ID.
112 * Arg: uint32_t - Plane ID
113 * uint32_t - CRTC ID
114 */
115 PLANE_SET_CRTC,
116 /*
117 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
118 * Arg: uint32_t - Plane ID
119 * uint32_t - Input fence
120 */
121 PLANE_SET_INPUT_FENCE,
122 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800123 * Op: Sets scaler config on this plane.
124 * Arg: uint32_t - Plane ID
125 * uint64_t - Address of the scaler config object (version based)
126 */
127 PLANE_SET_SCALER_CONFIG,
128 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800129 * Op: Sets plane rotation destination rect
130 * Arg: uint32_t - Plane ID
131 * DRMRect - rotator dst Rectangle
132 */
133 PLANE_SET_ROTATION_DST_RECT,
134 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700135 * Op: Sets FB Secure mode for this plane.
136 * Arg: uint32_t - Plane ID
137 * uint32_t - Value of the FB Secure mode.
138 */
139 PLANE_SET_FB_SECURE_MODE,
140 /*
Ping Li8d6dd622017-07-03 12:05:15 -0700141 * Op: Sets csc config on this plane.
142 * Arg: uint32_t - Plane ID
143 * uint32_t* - pointer to csc type
144 */
145 PLANE_SET_CSC_CONFIG,
146 /*
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800147 * Op: Sets multirect mode on this plane.
148 * Arg: uint32_t - Plane ID
149 * uint32_t - multirect mode
150 */
151 PLANE_SET_MULTIRECT_MODE,
152 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700153 * Op: Activate or deactivate a CRTC
154 * Arg: uint32_t - CRTC ID
155 * uint32_t - 1 to enable, 0 to disable
156 */
157 CRTC_SET_ACTIVE,
158 /*
159 * Op: Sets display mode
160 * Arg: uint32_t - CRTC ID
161 * drmModeModeInfo* - Pointer to display mode
162 */
163 CRTC_SET_MODE,
164 /*
165 * Op: Sets an offset indicating when a release fence should be signalled.
166 * Arg: uint32_t - offset
167 * 0: non-speculative, default
168 * 1: speculative
169 */
170 CRTC_SET_OUTPUT_FENCE_OFFSET,
171 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800172 * Op: Sets overall SDE core clock
173 * Arg: uint32_t - CRTC ID
174 * uint32_t - core_clk
175 */
176 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700177 /*
178 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800179 * Arg: uint32_t - CRTC ID
180 * uint32_t - core_ab
181 */
182 CRTC_SET_CORE_AB,
183 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700184 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800185 * Arg: uint32_t - CRTC ID
186 * uint32_t - core_ib
187 */
188 CRTC_SET_CORE_IB,
189 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700190 * Op: Sets LLCC Bus average bandwidth
191 * Arg: uint32_t - CRTC ID
192 * uint32_t - llcc_ab
193 */
194 CRTC_SET_LLCC_AB,
195 /*
196 * Op: Sets LLCC Bus instantaneous bandwidth
197 * Arg: uint32_t - CRTC ID
198 * uint32_t - llcc_ib
199 */
200 CRTC_SET_LLCC_IB,
201 /*
202 * Op: Sets DRAM bus average bandwidth
203 * Arg: uint32_t - CRTC ID
204 * uint32_t - dram_ab
205 */
206 CRTC_SET_DRAM_AB,
207 /*
208 * Op: Sets DRAM bus instantaneous bandwidth
209 * Arg: uint32_t - CRTC ID
210 * uint32_t - dram_ib
211 */
212 CRTC_SET_DRAM_IB,
213 /*
Ramkumar Radhakrishnanb9f53552017-12-11 13:32:47 -0800214 * Op: Sets Rotator BW for inline rotation
215 * Arg: uint32_t - CRTC ID
216 * uint32_t - rot_bw
217 */
218 CRTC_SET_ROT_PREFILL_BW,
219 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700220 * Op: Sets rotator clock for inline rotation
221 * Arg: uint32_t - CRTC ID
222 * uint32_t - rot_clk
223 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530224 CRTC_SET_ROT_CLK,
225 /*
226 * Op: Sets destination scalar data
227 * Arg: uint32_t - CRTC ID
228 * uint64_t - Pointer to destination scalar data
229 */
230 CRTC_SET_DEST_SCALER_CONFIG,
231 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700232 * Op: Returns release fence for this frame. Should be called after Commit() on
233 * DRMAtomicReqInterface.
234 * Arg: uint32_t - CRTC ID
235 * int * - Pointer to an integer that will hold the returned fence
236 */
237 CRTC_GET_RELEASE_FENCE,
238 /*
Ping Li281f48d2017-01-16 12:45:40 -0800239 * Op: Sets PP feature
240 * Arg: uint32_t - CRTC ID
241 * DRMPPFeatureInfo * - PP feature data pointer
242 */
243 CRTC_SET_POST_PROC,
244 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800245 * Op: Sets CRTC ROIs.
246 * Arg: uint32_t - CRTC ID
247 * uint32_t - number of ROIs
248 * DRMRect * - Array of CRTC ROIs
249 */
250 CRTC_SET_ROI,
251 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700252 * Op: Sets Security level for CRTC.
253 * Arg: uint32_t - CRTC ID
254 * uint32_t - Security level
255 */
256 CRTC_SET_SECURITY_LEVEL,
257 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700258 * Op: sets solid fill stages
259 * Arg: uint32_t - CRTC ID
260 * Vector of DRMSolidfillStage
261 */
262 CRTC_SET_SOLIDFILL_STAGES,
263 /*
Anjaneya Prasad Musunurie8c67f22017-07-01 16:16:13 +0530264 * Op: Sets idle timeout.
265 * Arg: uint32_t - CRTC ID
266 * uint32_t - idle timeout in ms
267 */
268 CRTC_SET_IDLE_TIMEOUT,
269 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700270 * Op: Returns retire fence for this commit. Should be called after Commit() on
271 * DRMAtomicReqInterface.
272 * Arg: uint32_t - Connector ID
273 * int * - Pointer to an integer that will hold the returned fence
274 */
275 CONNECTOR_GET_RETIRE_FENCE,
276 /*
277 * Op: Sets writeback connector destination rect
278 * Arg: uint32_t - Connector ID
279 * DRMRect - Dst Rectangle
280 */
281 CONNECTOR_SET_OUTPUT_RECT,
282 /*
283 * Op: Sets frame buffer ID for writeback connector.
284 * Arg: uint32_t - Connector ID
285 * uint32_t - Framebuffer ID
286 */
287 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700288 /*
289 * Op: Sets power mode for connector.
290 * Arg: uint32_t - Connector ID
291 * uint32_t - Power Mode
292 */
293 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800294 /*
295 * Op: Sets panel ROIs.
296 * Arg: uint32_t - Connector ID
297 * uint32_t - number of ROIs
298 * DRMRect * - Array of Connector ROIs
299 */
300 CONNECTOR_SET_ROI,
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700301 /*
Saurabh Shahf3635952017-10-16 17:08:18 -0700302 * Op: Sets the connector to autorefresh mode.
303 * Arg: uint32_t - Connector ID
304 * uint32_t - Enable-1, Disable-0
305 */
306 CONNECTOR_SET_AUTOREFRESH,
307 /*
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700308 * Op: Set FB secure mode for Writeback connector.
309 * Arg: uint32_t - Connector ID
310 * uint32_t - FB Secure mode
311 */
312 CONNECTOR_SET_FB_SECURE_MODE,
Saurabh Shah82b06f42017-09-06 16:43:49 -0700313 /*
314 * Op: Sets a crtc id to this connector
315 * Arg: uint32_t - Connector ID
316 * uint32_t - CRTC ID
317 */
318 CONNECTOR_SET_CRTC,
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700319 /*
Gopikrishnaiah Anandan55884842017-07-21 12:32:00 -0700320 * Op: Sets PP feature
321 * Arg: uint32_t - Connector ID
322 * DRMPPFeatureInfo * - PP feature data pointer
323 */
324 CONNECTOR_SET_POST_PROC,
325 /*
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700326 * Op: Sets connector hdr metadata
327 * Arg: uint32_t - Connector ID
328 * drm_msm_ext_hdr_metadata - hdr_metadata
329 */
330 CONNECTOR_SET_HDR_METADATA,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700331};
332
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700333enum struct DRMRotation {
334 FLIP_H = 0x1,
335 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700336 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700337 ROT_90 = 0x4,
338};
339
Sushil Chauhan3396e202017-04-14 18:34:22 -0700340enum struct DRMPowerMode {
341 ON,
342 DOZE,
343 DOZE_SUSPEND,
344 OFF,
345};
346
Saurabh Shah66c941b2016-07-06 17:34:05 -0700347enum struct DRMBlendType {
348 UNDEFINED = 0,
349 OPAQUE = 1,
350 PREMULTIPLIED = 2,
351 COVERAGE = 3,
352};
353
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800354enum struct DRMSrcConfig {
355 DEINTERLACE = 0,
356};
357
Saurabh Shah66c941b2016-07-06 17:34:05 -0700358/* Display type to identify a suitable connector */
359enum struct DRMDisplayType {
360 PERIPHERAL,
361 TV,
362 VIRTUAL,
363};
364
365struct DRMRect {
366 uint32_t left; // Left-most pixel coordinate.
367 uint32_t top; // Top-most pixel coordinate.
368 uint32_t right; // Right-most pixel coordinate.
369 uint32_t bottom; // Bottom-most pixel coordinate.
370};
371
372//------------------------------------------------------------------------
373// DRM Info Query Types
374//------------------------------------------------------------------------
375
376enum struct QSEEDVersion {
377 V1,
378 V2,
379 V3,
380};
381
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700382/* QSEED3 Step version */
383enum struct QSEEDStepVersion {
384 V2,
385 V3,
386 V4,
387};
388
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700389enum struct SmartDMARevision {
390 V1,
391 V2,
392};
393
Saurabh Shah66c941b2016-07-06 17:34:05 -0700394/* Per CRTC Resource Info*/
395struct DRMCrtcInfo {
396 bool has_src_split;
Srikanth Rajagopalan49380782017-07-06 15:23:12 -0700397 bool has_hdr;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700398 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700399 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700400 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700401 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800402 float ib_fudge_factor;
403 float clk_fudge_factor;
404 uint32_t dest_scale_prefill_lines;
405 uint32_t undersized_prefill_lines;
406 uint32_t macrotile_prefill_lines;
407 uint32_t nv12_prefill_lines;
408 uint32_t linear_prefill_lines;
409 uint32_t downscale_prefill_lines;
410 uint32_t extra_prefill_lines;
411 uint32_t amortized_threshold;
412 uint64_t max_bandwidth_low;
413 uint64_t max_bandwidth_high;
414 uint32_t max_sde_clk;
415 CompRatioMap comp_ratio_rt_map;
416 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700417 uint32_t hw_version;
Namit Solanki24921ab2017-05-23 20:16:25 +0530418 uint32_t dest_scaler_count = 0;
419 uint32_t max_dest_scaler_input_width = 0;
420 uint32_t max_dest_scaler_output_width = 0;
421 uint32_t max_dest_scale_up = 1;
Pullakavi Srinivas3e2c0402017-12-05 17:50:15 +0530422 uint32_t min_prefill_lines = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700423};
424
425enum struct DRMPlaneType {
426 // Has CSC and scaling capability
427 VIG = 0,
428 // Has scaling capability but no CSC
429 RGB,
430 // No scaling support
431 DMA,
432 // Supports a small dimension and doesn't use a CRTC stage
433 CURSOR,
434 MAX,
435};
436
437struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700438 DRMPlaneType type;
439 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700440 // FourCC format enum and modifier
441 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
442 uint32_t max_linewidth;
443 uint32_t max_upscale;
444 uint32_t max_downscale;
445 uint32_t max_horizontal_deci;
446 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800447 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800448 uint32_t cache_size; // cache size in bytes for inline rotation support.
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700449 QSEEDStepVersion qseed3_version;
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800450 bool multirect_prop_present = false;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700451};
452
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700453// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
454typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700455
456enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700457 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700458 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700459 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700460 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700461 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700462 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700463 DUAL_LM_MERGE_DSC,
464 DUAL_LM_DSCMERGE,
465 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700466};
467
468enum struct DRMPanelMode {
469 VIDEO,
470 COMMAND,
471};
472
Saurabh Shah7e16c932017-11-03 17:55:36 -0700473/* Per mode info */
474struct DRMModeInfo {
475 drmModeModeInfo mode;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700476 DRMTopology topology;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800477 // Valid only if mode is command
478 int num_roi;
479 int xstart;
480 int ystart;
481 int walign;
482 int halign;
483 int wmin;
484 int hmin;
485 bool roi_merge;
Saurabh Shah7e16c932017-11-03 17:55:36 -0700486};
487
488/* Per Connector Info*/
489struct DRMConnectorInfo {
490 uint32_t mmWidth;
491 uint32_t mmHeight;
492 uint32_t type;
493 std::vector<DRMModeInfo> modes;
494 std::string panel_name;
495 DRMPanelMode panel_mode;
496 bool is_primary;
497 // Valid only if DRMPanelMode is VIDEO
498 bool dynamic_fps;
499 // FourCC format enum and modifier
500 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
501 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
502 uint32_t max_linewidth;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700503 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700504 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700505 uint32_t transfer_time_us;
Srikanth Rajagopalance0f7cb2017-06-12 15:14:26 -0700506 drm_msm_ext_hdr_properties ext_hdr_prop;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700507};
508
509/* Identifier token for a display */
510struct DRMDisplayToken {
511 uint32_t conn_id;
512 uint32_t crtc_id;
Saurabh Shah2d179742018-02-05 15:51:53 -0800513 uint32_t crtc_index;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700514};
515
Ping Li281f48d2017-01-16 12:45:40 -0800516enum DRMPPFeatureID {
517 kFeaturePcc,
518 kFeatureIgc,
519 kFeaturePgc,
520 kFeatureMixerGc,
521 kFeaturePaV2,
522 kFeatureDither,
523 kFeatureGamut,
524 kFeaturePADither,
Rajesh Yadavd30b0cc2017-09-22 00:26:54 +0530525 kFeaturePAHsic,
526 kFeaturePASixZone,
Rajesh Yadav99535ac2017-08-28 16:33:04 +0530527 kFeaturePAMemColSkin,
528 kFeaturePAMemColSky,
529 kFeaturePAMemColFoliage,
530 kFeaturePAMemColProt,
Ping Li281f48d2017-01-16 12:45:40 -0800531 kPPFeaturesMax,
532};
533
534enum DRMPPPropType {
535 kPropEnum,
536 kPropRange,
537 kPropBlob,
538 kPropTypeMax,
539};
540
541struct DRMPPFeatureInfo {
542 DRMPPFeatureID id;
543 DRMPPPropType type;
544 uint32_t version;
545 uint32_t payload_size;
546 void *payload;
Gopikrishnaiah Anandan55884842017-07-21 12:32:00 -0700547 uint32_t object_type;
Ping Li281f48d2017-01-16 12:45:40 -0800548};
549
Ping Li8d6dd622017-07-03 12:05:15 -0700550enum DRMCscType {
551 kCscYuv2Rgb601L,
552 kCscYuv2Rgb601FR,
553 kCscYuv2Rgb709L,
554 kCscYuv2Rgb2020L,
555 kCscYuv2Rgb2020FR,
556 kCscTypeMax,
557};
558
Saurabh Shah0ffee302016-11-22 10:42:11 -0800559struct DRMScalerLUTInfo {
560 uint32_t dir_lut_size = 0;
561 uint32_t cir_lut_size = 0;
562 uint32_t sep_lut_size = 0;
563 uint64_t dir_lut = 0;
564 uint64_t cir_lut = 0;
565 uint64_t sep_lut = 0;
566};
567
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700568enum struct DRMSecureMode {
569 NON_SECURE,
570 SECURE,
571 NON_SECURE_DIR_TRANSLATION,
572 SECURE_DIR_TRANSLATION,
573};
574
575enum struct DRMSecurityLevel {
576 SECURE_NON_SECURE,
577 SECURE_ONLY,
578};
579
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800580enum struct DRMMultiRectMode {
581 NONE = 0,
582 PARALLEL = 1,
583 SERIAL = 2,
584};
585
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700586struct DRMSolidfillStage {
587 DRMRect bounding_rect {};
588 bool is_exclusion_rect = false;
589 uint32_t color = 0xff000000; // in 8bit argb
Gopikrishnaiah Anandancc123062017-07-31 17:21:03 -0700590 uint32_t red = 0;
591 uint32_t blue = 0;
592 uint32_t green = 0;
593 uint32_t alpha = 0xff;
594 uint32_t color_bit_depth = 0;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700595 uint32_t z_order = 0;
596 uint32_t plane_alpha = 0xff;
597};
598
Saurabh Shah66c941b2016-07-06 17:34:05 -0700599/* DRM Atomic Request Property Set.
600 *
601 * Helper class to create and populate atomic properties of DRM components
602 * when rendered in DRM atomic mode */
603class DRMAtomicReqInterface {
604 public:
605 virtual ~DRMAtomicReqInterface() {}
606 /* Perform request operation.
607 *
608 * [input]: opcode: operation code from DRMOps list.
609 * var_arg: arguments for DRMOps's can differ in number and
610 * data type. Refer above DRMOps to details.
611 * [return]: Error code if the API fails, 0 on success.
612 */
613 virtual int Perform(DRMOps opcode, ...) = 0;
614
615 /*
616 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
617 * called every frame.
618 * [input]: synchronous: Determines if the call should block until a h/w flip
Saurabh Shaha917aa72017-09-15 13:27:24 -0700619 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming
620 * planes but still need the previously staged ones to not be unstaged
Saurabh Shah66c941b2016-07-06 17:34:05 -0700621 * [return]: Error code if the API fails, 0 on success.
622 */
Saurabh Shaha917aa72017-09-15 13:27:24 -0700623 virtual int Commit(bool synchronous, bool retain_planes) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700624 /*
625 * Validate the params set via Perform().
626 * [return]: Error code if the API fails, 0 on success.
627 */
628 virtual int Validate() = 0;
629};
630
631class DRMManagerInterface;
632
633/* Populates a singleton instance of DRMManager */
634typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
635
636/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800637typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700638
639/*
640 * DRM Manager Interface - Any class which plans to implement helper function for vendor
641 * specific DRM driver implementation must implement the below interface routines to work
642 * with SDM.
643 */
644
645class DRMManagerInterface {
646 public:
647 virtual ~DRMManagerInterface() {}
648
649 /*
650 * Since SDM completely manages the planes. GetPlanesInfo will provide all
651 * the plane information.
652 * [output]: DRMPlanesInfo: Resource Info for planes.
653 */
654 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
655
656 /*
657 * Will provide all the information of a selected crtc.
658 * [input]: Use crtc id 0 to obtain system wide info
659 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
660 */
661 virtual void GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
662
663 /*
664 * Will provide all the information of a selected connector.
665 * [output]: DRMConnectorInfo: Resource Info for the given connector id
666 */
667 virtual void GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
668
669 /*
Ping Li281f48d2017-01-16 12:45:40 -0800670 * Will query post propcessing feature info of a CRTC.
671 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
672 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530673 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0;
Ping Li281f48d2017-01-16 12:45:40 -0800674 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700675 * Register a logical display to receive a token.
676 * Each display pipeline in DRM is identified by its CRTC and Connector(s).
677 * On display connect(bootup or hotplug), clients should invoke this interface to
678 * establish the pipeline for the display and should get a DisplayToken
679 * populated with crtc and connnector(s) id's. Here onwards, Client should
680 * use this token to represent the display for any Perform operations if
681 * needed.
682 *
683 * [input]: disp_type - Peripheral / TV / Virtual
684 * [output]: DRMDisplayToken - CRTC and Connector id's for the display
685 * [return]: 0 on success, a negative error value otherwise
686 */
687 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
688
689 /* Client should invoke this interface on display disconnect.
690 * [input]: DRMDisplayToken - identifier for the display.
691 */
692 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
693
694 /*
695 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
696 * returned as part of RegisterDisplay API. Needs to be called per display.
697 * [input]: DRMDisplayToken that identifies a display pipeline
698 * [output]: Pointer to an instance of DRMAtomicReqInterface.
699 * [return]: Error code if the API fails, 0 on success.
700 */
701 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
702
703 /*
704 * Destroys the instance of DRMAtomicReqInterface
705 * [input]: Pointer to a DRMAtomicReqInterface
706 * [return]: Error code if the API fails, 0 on success.
707 */
708 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Saurabh Shah0ffee302016-11-22 10:42:11 -0800709 /*
710 * Sets the global scaler LUT
711 * [input]: LUT Info
712 * [return]: Error code if the API fails, 0 on success.
713 */
714 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700715};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800716
Saurabh Shah66c941b2016-07-06 17:34:05 -0700717} // namespace sde_drm
718#endif // __DRM_INTERFACE_H__