blob: 1d0a40a63b36c547b641414525079c6efb0ad2c4 [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Arun Kumar K.R6c85f052014-01-21 21:47:41 -08002 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Iliyan Malchev202a77d2012-06-11 14:41:12 -070052using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070053using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070054
Naomi Luisa44100c2013-02-08 12:42:03 -080055ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
56
Sushil Chauhan65e26302015-01-14 10:48:57 -080057static void getUBwcWidthAndHeight(int, int, int, int&, int&);
58static unsigned int getUBwcSize(int, int, int, const int, const int);
59
Iliyan Malchev202a77d2012-06-11 14:41:12 -070060//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070061
Saurabh Shah1adcafe2014-12-19 10:05:41 -080062/* The default policy is to return cached buffers unless the client explicity
63 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
64 * read or written in software. Any combination with a _RARELY_ flag will be
65 * treated as uncached. */
66static bool useUncached(const int& usage) {
67 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
68 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
69 GRALLOC_USAGE_SW_WRITE_RARELY) or
70 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
71 GRALLOC_USAGE_SW_READ_RARELY))
72 return true;
73
74 return false;
75}
76
Naomi Luisa44100c2013-02-08 12:42:03 -080077//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080078AdrenoMemInfo::AdrenoMemInfo()
79{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080080 LINK_adreno_compute_aligned_width_and_height = NULL;
81 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070082 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -080083 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -080084 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080085
Naomi Luis01f5c8e2013-02-11 12:46:24 -080086 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
87 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080088 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070089 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
90 *(void **)&LINK_adreno_compute_padding =
91 ::dlsym(libadreno_utils, "compute_surface_padding");
92 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
93 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -080094 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
95 ::dlsym(libadreno_utils,
96 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -080097 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
98 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -080099 }
100}
101
102AdrenoMemInfo::~AdrenoMemInfo()
103{
104 if (libadreno_utils) {
105 ::dlclose(libadreno_utils);
106 }
107}
108
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700109int AdrenoMemInfo::isMacroTilingSupportedByGPU()
110{
111 if ((libadreno_utils)) {
112 if(LINK_adreno_isMacroTilingSupportedByGpu) {
113 return LINK_adreno_isMacroTilingSupportedByGpu();
114 }
115 }
116 return 0;
117}
118
119
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800120void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800121 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800122{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800123
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800124 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700125 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800126 int tileEnabled = isMacroTileEnabled(format, usage);
127 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
128 height, format, tileEnabled, aligned_w, aligned_h);
129 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800130 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800131
132 if (isUBwcEnabled(format, usage)) {
133 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
134 return;
135 }
136
137 aligned_w = width;
138 aligned_h = height;
139 switch (format)
140 {
141 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
142 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
143 case HAL_PIXEL_FORMAT_RAW_SENSOR:
144 aligned_w = ALIGN(width, 32);
145 break;
146 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
147 aligned_w = ALIGN(width, 128);
148 break;
149 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
150 case HAL_PIXEL_FORMAT_YV12:
151 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
152 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
153 case HAL_PIXEL_FORMAT_YCbCr_422_I:
154 case HAL_PIXEL_FORMAT_YCrCb_422_I:
155 aligned_w = ALIGN(width, 16);
156 break;
157 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
158 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
159 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
160 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
161 break;
162 case HAL_PIXEL_FORMAT_BLOB:
163 break;
164 case HAL_PIXEL_FORMAT_NV21_ZSL:
165 aligned_w = ALIGN(width, 64);
166 aligned_h = ALIGN(height, 64);
167 break;
168 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
169 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
170 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
171 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
172 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
173 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
174 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
175 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
176 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
177 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
178 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
179 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
180 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
181 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
182 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
183 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
184 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
185 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
186 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
187 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
188 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
189 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
190 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
191 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
192 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
196 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
197 int bytesPerPixel = 0;
198 int raster_mode = 0; //Adreno unknown raster mode.
199 int padding_threshold = 512; //Threshold for padding
200 //surfaces.
201
202 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
203 width, height, format, 0,raster_mode, padding_threshold,
204 &aligned_w, &aligned_h, &bytesPerPixel);
205 } else {
206 ALOGW("%s: Warning!! Symbols" \
207 " compute_compressedfmt_aligned_width_and_height" \
208 " not found", __FUNCTION__);
209 }
210 break;
211 default: break;
212 }
213}
214
215void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
216 int tile_enabled, int& aligned_w, int& aligned_h)
217{
218 aligned_w = ALIGN(width, 32);
219 aligned_h = ALIGN(height, 32);
220
221 // Don't add any additional padding if debug.gralloc.map_fb_memory
222 // is enabled
223 char property[PROPERTY_VALUE_MAX];
224 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
225 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
226 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
227 return;
228 }
229
230 int bpp = 4;
231 switch(format)
232 {
233 case HAL_PIXEL_FORMAT_RGB_888:
234 bpp = 3;
235 break;
236 case HAL_PIXEL_FORMAT_RGB_565:
237 case HAL_PIXEL_FORMAT_RGBA_5551:
238 case HAL_PIXEL_FORMAT_RGBA_4444:
239 bpp = 2;
240 break;
241 default: break;
242 }
243
244 if (libadreno_utils) {
245 int raster_mode = 0; // Adreno unknown raster mode.
246 int padding_threshold = 512; // Threshold for padding surfaces.
247 // the function below computes aligned width and aligned height
248 // based on linear or macro tile mode selected.
249 if(LINK_adreno_compute_aligned_width_and_height) {
250 LINK_adreno_compute_aligned_width_and_height(width,
251 height, bpp, tile_enabled,
252 raster_mode, padding_threshold,
253 &aligned_w, &aligned_h);
254
255 } else if(LINK_adreno_compute_padding) {
256 int surface_tile_height = 1; // Linear surface
257 aligned_w = LINK_adreno_compute_padding(width, bpp,
258 surface_tile_height, raster_mode,
259 padding_threshold);
260 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
261 __FUNCTION__);
262 } else {
263 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
264 "compute_aligned_width_and_height not found", __FUNCTION__);
265 }
266 }
267}
268
269int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
270{
Sushil Chauhan082acd62015-01-14 16:49:29 -0800271 if (libadreno_utils) {
272 if (LINK_adreno_isUBWCSupportedByGpu) {
273 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
274 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
275 }
276 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800277 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800278}
279
Sushil Chauhan082acd62015-01-14 16:49:29 -0800280ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
281{
282 switch (hal_format) {
283 case HAL_PIXEL_FORMAT_RGBA_8888:
284 return ADRENO_PIXELFORMAT_R8G8B8A8;
285 case HAL_PIXEL_FORMAT_RGB_565:
286 return ADRENO_PIXELFORMAT_B5G6R5;
287 case HAL_PIXEL_FORMAT_sRGB_A_8888:
288 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
289 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800290 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800291 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
292 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800293 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800294 default:
295 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
296 break;
297 }
298 return ADRENO_PIXELFORMAT_UNKNOWN;
299}
300
Naomi Luisa44100c2013-02-08 12:42:03 -0800301//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700302IAllocController* IAllocController::sController = NULL;
303IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700304{
305 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700306 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700307 }
308 return sController;
309}
310
311
312//-------------- IonController-----------------------//
313IonController::IonController()
314{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530315 allocateIonMem();
316}
317
318void IonController::allocateIonMem()
319{
320 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700321}
322
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700323int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700324{
325 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500326 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700327 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700328
329 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700330 data.allocType = 0;
331
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530332 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530333 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500334 ionHeapId |= ION_HEAP(ION_CP_MM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500335 ionFlags |= ION_SECURE;
Shalaj Jain13cdf812014-12-02 16:20:54 -0800336#ifdef ION_FLAG_ALLOW_NON_CONTIG
337 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
338 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
339 }
340#endif
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530341 } else {
342 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500343 // do not set ion secure flag & MM heap. Fallback to system heap.
344 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530345 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500346 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530347 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
348 //MM Heap is exclusively a secure heap.
349 //If it is used for non secure cases, fallback to IOMMU heap
350 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
351 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500352 trying to use system heap instead !!");
353 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500354 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700355
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700356 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500357 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700358
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700359 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500360 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700361
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530362 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500363 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700364
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500365 // if no ion heap flags are set, default to system heap
366 if(!ionHeapId)
367 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700368
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500369 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700370 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500371 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700372 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700373
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700374 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700375 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500376 } else {
377 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
378 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700379 }
380
381 return ret;
382}
383
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700384IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700385{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700386 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700387 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
388 memalloc = mIonAlloc;
389 } else {
390 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
391 }
392
393 return memalloc;
394}
395
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700396bool isMacroTileEnabled(int format, int usage)
397{
398 bool tileEnabled = false;
399
400 // Check whether GPU & MDSS supports MacroTiling feature
401 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
402 qdutils::MDPVersion::getInstance().supportsMacroTile())
403 {
404 // check the format
405 switch(format)
406 {
407 case HAL_PIXEL_FORMAT_RGBA_8888:
408 case HAL_PIXEL_FORMAT_RGBX_8888:
409 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800410 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700411 {
412 tileEnabled = true;
413 // check the usage flags
414 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
415 GRALLOC_USAGE_SW_WRITE_MASK)) {
416 // Application intends to use CPU for rendering
417 tileEnabled = false;
418 }
419 break;
420 }
421 default:
422 break;
423 }
424 }
425 return tileEnabled;
426}
427
428// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800429unsigned int getSize(int format, int width, int height, int usage,
430 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700431
Sushil Chauhan65e26302015-01-14 10:48:57 -0800432 if (isUBwcEnabled(format, usage)) {
433 return getUBwcSize(width, height, format, alignedw, alignedh);
434 }
435
436 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700437 switch (format) {
438 case HAL_PIXEL_FORMAT_RGBA_8888:
439 case HAL_PIXEL_FORMAT_RGBX_8888:
440 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700441 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700442 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700443 size = alignedw * alignedh * 4;
444 break;
445 case HAL_PIXEL_FORMAT_RGB_888:
446 size = alignedw * alignedh * 3;
447 break;
448 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700449 case HAL_PIXEL_FORMAT_RGBA_5551:
450 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400451 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700452 size = alignedw * alignedh * 2;
453 break;
454
455 // adreno formats
456 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
457 size = ALIGN(alignedw*alignedh, 4096);
458 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
459 break;
460 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
461 // The chroma plane is subsampled,
462 // but the pitch in bytes is unchanged
463 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700464 size = ALIGN( alignedw * alignedh, 8192);
465 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
466 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700467 case HAL_PIXEL_FORMAT_YV12:
468 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
469 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800470 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700471 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400472 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700473 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700474 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700475 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800476 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
477 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400478 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800479 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700480 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
481 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700482 case HAL_PIXEL_FORMAT_YCbCr_422_I:
483 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700484 if(width & 1) {
485 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800486 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700487 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700488 size = ALIGN(alignedw * alignedh * 2, 4096);
489 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700490 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400491 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700492 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700493 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400494 case HAL_PIXEL_FORMAT_BLOB:
495 if(height != 1) {
496 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
497 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800498 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400499 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400500 size = width;
501 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700502 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700503 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
504 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500505 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
506 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
507 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
508 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
509 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
510 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
511 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
512 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
513 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
514 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
515 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
516 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
517 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
518 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
519 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
520 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
521 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
522 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
523 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
524 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
525 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
526 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
527 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
528 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
529 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
530 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
531 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800532 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500533 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
534 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700535 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800536 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800537 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700538 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700539 return size;
540}
541
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700542unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700543 int& alignedw, int &alignedh)
544{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700545 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700546
547 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
548 height,
549 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800550 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700551 alignedw,
552 alignedh);
553
Sushil Chauhan65e26302015-01-14 10:48:57 -0800554 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700555
556 return size;
557}
558
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700559
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700560unsigned int getBufferSizeAndDimensions(int width, int height, int format,
561 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700562{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700563 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700564
565 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
566 height,
567 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800568 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700569 alignedw,
570 alignedh);
571
Sushil Chauhan65e26302015-01-14 10:48:57 -0800572 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700573
574 return size;
575}
576
577
578void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700579 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700580{
581 tileEnabled = isMacroTileEnabled(format, usage);
582
583 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
584 height,
585 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800586 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700587 alignedw,
588 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800589 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700590}
591
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400592int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
593{
594 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700595 int width = hnd->width;
596 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700597 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800598 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700599
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400600 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
601
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700602 // Check metadata if the geometry has been updated.
603 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
604 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
605 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
606 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
607 }
608
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400609 // Get the chroma offsets from the handle width/height. We take advantage
610 // of the fact the width _is_ the stride
611 switch (hnd->format) {
612 //Semiplanar
613 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
614 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
615 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
616 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700617 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400618 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700619 ycbcr->cb = (void*)(hnd->base + ystride * height);
620 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400621 ycbcr->ystride = ystride;
622 ycbcr->cstride = cstride;
623 ycbcr->chroma_step = 2;
624 break;
625
Sushil Chauhan4686c972015-02-20 15:44:52 -0800626 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
627 // NV12_UBWC buffer has these 4 planes in the following sequence:
628 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
629 unsigned int y_meta_stride, y_meta_height, y_meta_size;
630 unsigned int y_stride, y_height, y_size;
631 unsigned int c_meta_stride, c_meta_height, c_meta_size;
632
633 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
634 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
635 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
636
637 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
638 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
639 y_size = ALIGN((y_stride * y_height), alignment);
640
641 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
642 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
643 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
644
645 ycbcr->y = (void*)(hnd->base + y_meta_size);
646 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
647 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
648 c_meta_size + 1);
649 ycbcr->ystride = y_stride;
650 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
651 ycbcr->chroma_step = 2;
652 break;
653
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400654 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
655 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
656 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
657 case HAL_PIXEL_FORMAT_NV21_ZSL:
658 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700659 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400660 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700661 ycbcr->cr = (void*)(hnd->base + ystride * height);
662 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400663 ycbcr->ystride = ystride;
664 ycbcr->cstride = cstride;
665 ycbcr->chroma_step = 2;
666 break;
667
668 //Planar
669 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700670 ystride = width;
671 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400672 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700673 ycbcr->cr = (void*)(hnd->base + ystride * height);
674 ycbcr->cb = (void*)(hnd->base + ystride * height +
675 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400676 ycbcr->ystride = ystride;
677 ycbcr->cstride = cstride;
678 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400679 break;
680 //Unsupported formats
681 case HAL_PIXEL_FORMAT_YCbCr_422_I:
682 case HAL_PIXEL_FORMAT_YCrCb_422_I:
683 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
684 default:
685 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
686 hnd->format);
687 err = -EINVAL;
688 }
689 return err;
690
691}
692
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700693
694
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700695// Allocate buffer from width, height and format into a
696// private_handle_t. It is the responsibility of the caller
697// to free the buffer using the free_buffer function
698int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
699{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700700 alloc_data data;
701 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700702 gralloc::IAllocController* sAlloc =
703 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700704 data.base = 0;
705 data.fd = -1;
706 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700707 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
708 alignedh);
709
Naseer Ahmed29a26812012-06-14 00:56:20 -0700710 data.align = getpagesize();
711 data.uncached = useUncached(usage);
712 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700713
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700714 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700715 if (0 != err) {
716 ALOGE("%s: allocate failed", __FUNCTION__);
717 return -ENOMEM;
718 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700719
Naseer Ahmed29a26812012-06-14 00:56:20 -0700720 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700721 data.allocType, 0, format,
722 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700723 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700724 hnd->offset = data.offset;
725 hnd->gpuaddr = 0;
726 *pHnd = hnd;
727 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700728}
729
730void free_buffer(private_handle_t *hnd)
731{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700732 gralloc::IAllocController* sAlloc =
733 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700734 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700735 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700736 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
737 }
738 if(hnd)
739 delete hnd;
740
741}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800742
743// UBWC helper functions
744static bool isUBwcFormat(int format)
745{
746 // Explicitly defined UBWC formats
747 switch(format)
748 {
749 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
750 return true;
751 default:
752 return false;
753 }
754}
755
756static bool isUBwcSupported(int format)
757{
758 // Existing HAL formats with UBWC support
759 switch(format)
760 {
761 case HAL_PIXEL_FORMAT_RGB_565:
762 case HAL_PIXEL_FORMAT_RGBA_8888:
763 case HAL_PIXEL_FORMAT_sRGB_A_8888:
764 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
765 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
766 return true;
767 default:
768 return false;
769 }
770}
771
772bool isUBwcEnabled(int format, int usage)
773{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800774 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
775 if (isUBwcFormat(format))
776 return true;
777
778 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
779 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
780 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
781 // Allow UBWC, only if CPU usage flags are not set
782 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800783 GRALLOC_USAGE_SW_WRITE_MASK))) {
784 return true;
785 }
786 }
787 return false;
788}
789
790static void getUBwcWidthAndHeight(int width, int height, int format,
791 int& aligned_w, int& aligned_h)
792{
793 switch (format)
794 {
795 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
796 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
797 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
798 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
799 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
800 break;
801 default:
802 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
803 aligned_w = 0;
804 aligned_h = 0;
805 break;
806 }
807}
808
809static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
810{
811 block_width = 0;
812 block_height = 0;
813
814 switch(bpp)
815 {
816 case 2:
817 case 4:
818 block_width = 16;
819 block_height = 4;
820 break;
821 case 8:
822 block_width = 8;
823 block_height = 4;
824 break;
825 case 16:
826 block_width = 4;
827 block_height = 4;
828 break;
829 default:
830 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
831 break;
832 }
833}
834
835static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
836{
837 unsigned int size = 0;
838 int meta_width, meta_height;
839 int block_width, block_height;
840
841 getUBwcBlockSize(bpp, block_width, block_height);
842
843 if (!block_width || !block_height) {
844 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
845 return size;
846 }
847
848 // Align meta buffer height to 16 blocks
849 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
850
851 // Align meta buffer width to 64 blocks
852 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
853
854 // Align meta buffer size to 4K
855 size = ((meta_width * meta_height), 4096);
856 return size;
857}
858
859static unsigned int getUBwcSize(int width, int height, int format,
860 const int alignedw, const int alignedh) {
861
862 unsigned int size = 0;
863 switch (format) {
864 case HAL_PIXEL_FORMAT_RGB_565:
865 size = alignedw * alignedh * 2;
866 size += getUBwcMetaBufferSize(width, height, 2);
867 break;
868 case HAL_PIXEL_FORMAT_RGBA_8888:
869 case HAL_PIXEL_FORMAT_sRGB_A_8888:
870 size = alignedw * alignedh * 4;
871 size += getUBwcMetaBufferSize(width, height, 4);
872 break;
873 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
874 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
875 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
876 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
877 break;
878 default:
879 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
880 break;
881 }
882 return size;
883}