blob: c3431b6c3e3ac7d45be13505b8e3105e47e80f07 [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Arun Kumar K.R6c85f052014-01-21 21:47:41 -08002 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Shalaj Jain1f9725a2015-03-04 17:53:49 -080052#ifdef ION_FLAG_CP_PIXEL
53#define CP_HEAP_ID ION_SECURE_HEAP_ID
54#else
55#define ION_FLAG_CP_PIXEL 0
56#define CP_HEAP_ID ION_CP_MM_HEAP_ID
57#endif
58
59#ifndef ION_FLAG_ALLOW_NON_CONTIG
60#define ION_FLAG_ALLOW_NON_CONTIG 0
61#endif
62
Iliyan Malchev202a77d2012-06-11 14:41:12 -070063using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070064using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070065
Naomi Luisa44100c2013-02-08 12:42:03 -080066ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
67
Sushil Chauhan65e26302015-01-14 10:48:57 -080068static void getUBwcWidthAndHeight(int, int, int, int&, int&);
69static unsigned int getUBwcSize(int, int, int, const int, const int);
70
Iliyan Malchev202a77d2012-06-11 14:41:12 -070071//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070072
Saurabh Shah1adcafe2014-12-19 10:05:41 -080073/* The default policy is to return cached buffers unless the client explicity
74 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
75 * read or written in software. Any combination with a _RARELY_ flag will be
76 * treated as uncached. */
77static bool useUncached(const int& usage) {
78 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
79 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
80 GRALLOC_USAGE_SW_WRITE_RARELY) or
81 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
82 GRALLOC_USAGE_SW_READ_RARELY))
83 return true;
84
85 return false;
86}
87
Naomi Luisa44100c2013-02-08 12:42:03 -080088//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080089AdrenoMemInfo::AdrenoMemInfo()
90{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080091 LINK_adreno_compute_aligned_width_and_height = NULL;
92 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070093 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -080094 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -080095 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080096
Naomi Luis01f5c8e2013-02-11 12:46:24 -080097 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
98 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080099 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700100 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
101 *(void **)&LINK_adreno_compute_padding =
102 ::dlsym(libadreno_utils, "compute_surface_padding");
103 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
104 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800105 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
106 ::dlsym(libadreno_utils,
107 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800108 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
109 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800110 }
111}
112
113AdrenoMemInfo::~AdrenoMemInfo()
114{
115 if (libadreno_utils) {
116 ::dlclose(libadreno_utils);
117 }
118}
119
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700120int AdrenoMemInfo::isMacroTilingSupportedByGPU()
121{
122 if ((libadreno_utils)) {
123 if(LINK_adreno_isMacroTilingSupportedByGpu) {
124 return LINK_adreno_isMacroTilingSupportedByGpu();
125 }
126 }
127 return 0;
128}
129
130
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800131void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800132 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800133{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800134
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800135 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700136 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800137 int tileEnabled = isMacroTileEnabled(format, usage);
138 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
139 height, format, tileEnabled, aligned_w, aligned_h);
140 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800141 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800142
143 if (isUBwcEnabled(format, usage)) {
144 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
145 return;
146 }
147
148 aligned_w = width;
149 aligned_h = height;
150 switch (format)
151 {
152 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
153 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
154 case HAL_PIXEL_FORMAT_RAW_SENSOR:
155 aligned_w = ALIGN(width, 32);
156 break;
157 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
158 aligned_w = ALIGN(width, 128);
159 break;
160 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
161 case HAL_PIXEL_FORMAT_YV12:
162 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
163 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
164 case HAL_PIXEL_FORMAT_YCbCr_422_I:
165 case HAL_PIXEL_FORMAT_YCrCb_422_I:
166 aligned_w = ALIGN(width, 16);
167 break;
168 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
169 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
170 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
171 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
172 break;
173 case HAL_PIXEL_FORMAT_BLOB:
174 break;
175 case HAL_PIXEL_FORMAT_NV21_ZSL:
176 aligned_w = ALIGN(width, 64);
177 aligned_h = ALIGN(height, 64);
178 break;
179 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
180 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
181 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
182 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
183 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
184 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
185 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
186 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
187 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
188 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
189 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
190 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
191 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
192 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
196 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
197 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
198 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
199 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
200 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
201 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
202 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
203 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
204 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
205 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
206 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
207 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
208 int bytesPerPixel = 0;
209 int raster_mode = 0; //Adreno unknown raster mode.
210 int padding_threshold = 512; //Threshold for padding
211 //surfaces.
212
213 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
214 width, height, format, 0,raster_mode, padding_threshold,
215 &aligned_w, &aligned_h, &bytesPerPixel);
216 } else {
217 ALOGW("%s: Warning!! Symbols" \
218 " compute_compressedfmt_aligned_width_and_height" \
219 " not found", __FUNCTION__);
220 }
221 break;
222 default: break;
223 }
224}
225
226void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
227 int tile_enabled, int& aligned_w, int& aligned_h)
228{
229 aligned_w = ALIGN(width, 32);
230 aligned_h = ALIGN(height, 32);
231
232 // Don't add any additional padding if debug.gralloc.map_fb_memory
233 // is enabled
234 char property[PROPERTY_VALUE_MAX];
235 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
236 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
237 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
238 return;
239 }
240
241 int bpp = 4;
242 switch(format)
243 {
244 case HAL_PIXEL_FORMAT_RGB_888:
245 bpp = 3;
246 break;
247 case HAL_PIXEL_FORMAT_RGB_565:
248 case HAL_PIXEL_FORMAT_RGBA_5551:
249 case HAL_PIXEL_FORMAT_RGBA_4444:
250 bpp = 2;
251 break;
252 default: break;
253 }
254
255 if (libadreno_utils) {
256 int raster_mode = 0; // Adreno unknown raster mode.
257 int padding_threshold = 512; // Threshold for padding surfaces.
258 // the function below computes aligned width and aligned height
259 // based on linear or macro tile mode selected.
260 if(LINK_adreno_compute_aligned_width_and_height) {
261 LINK_adreno_compute_aligned_width_and_height(width,
262 height, bpp, tile_enabled,
263 raster_mode, padding_threshold,
264 &aligned_w, &aligned_h);
265
266 } else if(LINK_adreno_compute_padding) {
267 int surface_tile_height = 1; // Linear surface
268 aligned_w = LINK_adreno_compute_padding(width, bpp,
269 surface_tile_height, raster_mode,
270 padding_threshold);
271 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
272 __FUNCTION__);
273 } else {
274 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
275 "compute_aligned_width_and_height not found", __FUNCTION__);
276 }
277 }
278}
279
280int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
281{
Sushil Chauhan082acd62015-01-14 16:49:29 -0800282 if (libadreno_utils) {
283 if (LINK_adreno_isUBWCSupportedByGpu) {
284 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
285 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
286 }
287 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800288 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800289}
290
Sushil Chauhan082acd62015-01-14 16:49:29 -0800291ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
292{
293 switch (hal_format) {
294 case HAL_PIXEL_FORMAT_RGBA_8888:
295 return ADRENO_PIXELFORMAT_R8G8B8A8;
296 case HAL_PIXEL_FORMAT_RGB_565:
297 return ADRENO_PIXELFORMAT_B5G6R5;
298 case HAL_PIXEL_FORMAT_sRGB_A_8888:
299 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
300 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800301 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800302 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
303 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800304 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800305 default:
306 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
307 break;
308 }
309 return ADRENO_PIXELFORMAT_UNKNOWN;
310}
311
Naomi Luisa44100c2013-02-08 12:42:03 -0800312//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700313IAllocController* IAllocController::sController = NULL;
314IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700315{
316 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700317 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700318 }
319 return sController;
320}
321
322
323//-------------- IonController-----------------------//
324IonController::IonController()
325{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530326 allocateIonMem();
327}
328
329void IonController::allocateIonMem()
330{
331 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700332}
333
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700334int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700335{
336 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500337 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700338 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700339
340 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700341 data.allocType = 0;
342
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530343 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530344 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800345 ionHeapId = ION_HEAP(CP_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500346 ionFlags |= ION_SECURE;
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800347 if (usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY) {
348 /*
349 * There is currently no flag in ION for Secure Display
350 * VM. Please add it here once available.
351 *
352 ionFlags |= <Ion flag for Secure Display>;
353 */
354 } else {
355 ionFlags |= ION_FLAG_CP_PIXEL;
356 }
357
Shalaj Jain13cdf812014-12-02 16:20:54 -0800358 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
359 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
360 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530361 } else {
362 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500363 // do not set ion secure flag & MM heap. Fallback to system heap.
364 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530365 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500366 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530367 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
368 //MM Heap is exclusively a secure heap.
369 //If it is used for non secure cases, fallback to IOMMU heap
370 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
371 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500372 trying to use system heap instead !!");
373 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500374 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700375
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700376 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500377 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700378
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700379 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500380 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700381
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530382 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500383 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700384
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500385 // if no ion heap flags are set, default to system heap
386 if(!ionHeapId)
387 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700388
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500389 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700390 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500391 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700392 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700393
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700394 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700395 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500396 } else {
397 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
398 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700399 }
400
401 return ret;
402}
403
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700404IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700405{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700406 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700407 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
408 memalloc = mIonAlloc;
409 } else {
410 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
411 }
412
413 return memalloc;
414}
415
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700416bool isMacroTileEnabled(int format, int usage)
417{
418 bool tileEnabled = false;
419
420 // Check whether GPU & MDSS supports MacroTiling feature
421 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
422 qdutils::MDPVersion::getInstance().supportsMacroTile())
423 {
424 // check the format
425 switch(format)
426 {
427 case HAL_PIXEL_FORMAT_RGBA_8888:
428 case HAL_PIXEL_FORMAT_RGBX_8888:
429 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800430 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700431 {
432 tileEnabled = true;
433 // check the usage flags
434 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
435 GRALLOC_USAGE_SW_WRITE_MASK)) {
436 // Application intends to use CPU for rendering
437 tileEnabled = false;
438 }
439 break;
440 }
441 default:
442 break;
443 }
444 }
445 return tileEnabled;
446}
447
448// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800449unsigned int getSize(int format, int width, int height, int usage,
450 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700451
Sushil Chauhan65e26302015-01-14 10:48:57 -0800452 if (isUBwcEnabled(format, usage)) {
453 return getUBwcSize(width, height, format, alignedw, alignedh);
454 }
455
456 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700457 switch (format) {
458 case HAL_PIXEL_FORMAT_RGBA_8888:
459 case HAL_PIXEL_FORMAT_RGBX_8888:
460 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700461 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700462 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700463 size = alignedw * alignedh * 4;
464 break;
465 case HAL_PIXEL_FORMAT_RGB_888:
466 size = alignedw * alignedh * 3;
467 break;
468 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700469 case HAL_PIXEL_FORMAT_RGBA_5551:
470 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400471 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700472 size = alignedw * alignedh * 2;
473 break;
474
475 // adreno formats
476 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
477 size = ALIGN(alignedw*alignedh, 4096);
478 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
479 break;
480 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
481 // The chroma plane is subsampled,
482 // but the pitch in bytes is unchanged
483 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700484 size = ALIGN( alignedw * alignedh, 8192);
485 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
486 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700487 case HAL_PIXEL_FORMAT_YV12:
488 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
489 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800490 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700491 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400492 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700493 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700494 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700495 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800496 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
497 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400498 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800499 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700500 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
501 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700502 case HAL_PIXEL_FORMAT_YCbCr_422_I:
503 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700504 if(width & 1) {
505 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800506 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700507 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700508 size = ALIGN(alignedw * alignedh * 2, 4096);
509 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700510 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400511 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700512 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700513 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400514 case HAL_PIXEL_FORMAT_BLOB:
515 if(height != 1) {
516 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
517 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800518 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400519 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400520 size = width;
521 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700522 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700523 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
524 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500525 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
526 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
527 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
528 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
529 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
530 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
531 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
532 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
533 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
534 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
535 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
536 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
537 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
538 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
539 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
540 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
541 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
542 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
543 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
544 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
545 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
546 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
547 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
548 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
549 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
550 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
551 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800552 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500553 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
554 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700555 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800556 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800557 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700558 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700559 return size;
560}
561
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700562unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700563 int& alignedw, int &alignedh)
564{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700565 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700566
567 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
568 height,
569 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800570 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700571 alignedw,
572 alignedh);
573
Sushil Chauhan65e26302015-01-14 10:48:57 -0800574 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700575
576 return size;
577}
578
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700579
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700580unsigned int getBufferSizeAndDimensions(int width, int height, int format,
581 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700582{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700583 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700584
585 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
586 height,
587 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800588 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700589 alignedw,
590 alignedh);
591
Sushil Chauhan65e26302015-01-14 10:48:57 -0800592 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700593
594 return size;
595}
596
597
598void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700599 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700600{
601 tileEnabled = isMacroTileEnabled(format, usage);
602
603 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
604 height,
605 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800606 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700607 alignedw,
608 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800609 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700610}
611
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400612int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
613{
614 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700615 int width = hnd->width;
616 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700617 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800618 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700619
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400620 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
621
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700622 // Check metadata if the geometry has been updated.
623 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
624 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
625 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
626 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
627 }
628
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400629 // Get the chroma offsets from the handle width/height. We take advantage
630 // of the fact the width _is_ the stride
631 switch (hnd->format) {
632 //Semiplanar
633 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
634 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
635 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
636 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700637 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400638 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700639 ycbcr->cb = (void*)(hnd->base + ystride * height);
640 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400641 ycbcr->ystride = ystride;
642 ycbcr->cstride = cstride;
643 ycbcr->chroma_step = 2;
644 break;
645
Sushil Chauhan4686c972015-02-20 15:44:52 -0800646 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
647 // NV12_UBWC buffer has these 4 planes in the following sequence:
648 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
649 unsigned int y_meta_stride, y_meta_height, y_meta_size;
650 unsigned int y_stride, y_height, y_size;
651 unsigned int c_meta_stride, c_meta_height, c_meta_size;
652
653 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
654 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
655 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
656
657 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
658 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
659 y_size = ALIGN((y_stride * y_height), alignment);
660
661 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
662 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
663 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
664
665 ycbcr->y = (void*)(hnd->base + y_meta_size);
666 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
667 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
668 c_meta_size + 1);
669 ycbcr->ystride = y_stride;
670 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
671 ycbcr->chroma_step = 2;
672 break;
673
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400674 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
675 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
676 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
677 case HAL_PIXEL_FORMAT_NV21_ZSL:
678 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700679 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400680 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700681 ycbcr->cr = (void*)(hnd->base + ystride * height);
682 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400683 ycbcr->ystride = ystride;
684 ycbcr->cstride = cstride;
685 ycbcr->chroma_step = 2;
686 break;
687
688 //Planar
689 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700690 ystride = width;
691 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400692 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700693 ycbcr->cr = (void*)(hnd->base + ystride * height);
694 ycbcr->cb = (void*)(hnd->base + ystride * height +
695 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400696 ycbcr->ystride = ystride;
697 ycbcr->cstride = cstride;
698 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400699 break;
700 //Unsupported formats
701 case HAL_PIXEL_FORMAT_YCbCr_422_I:
702 case HAL_PIXEL_FORMAT_YCrCb_422_I:
703 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
704 default:
705 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
706 hnd->format);
707 err = -EINVAL;
708 }
709 return err;
710
711}
712
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700713
714
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700715// Allocate buffer from width, height and format into a
716// private_handle_t. It is the responsibility of the caller
717// to free the buffer using the free_buffer function
718int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
719{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700720 alloc_data data;
721 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700722 gralloc::IAllocController* sAlloc =
723 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700724 data.base = 0;
725 data.fd = -1;
726 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700727 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
728 alignedh);
729
Naseer Ahmed29a26812012-06-14 00:56:20 -0700730 data.align = getpagesize();
731 data.uncached = useUncached(usage);
732 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700733
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700734 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700735 if (0 != err) {
736 ALOGE("%s: allocate failed", __FUNCTION__);
737 return -ENOMEM;
738 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700739
Naseer Ahmed29a26812012-06-14 00:56:20 -0700740 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700741 data.allocType, 0, format,
742 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700743 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700744 hnd->offset = data.offset;
745 hnd->gpuaddr = 0;
746 *pHnd = hnd;
747 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700748}
749
750void free_buffer(private_handle_t *hnd)
751{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700752 gralloc::IAllocController* sAlloc =
753 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700754 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700755 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700756 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
757 }
758 if(hnd)
759 delete hnd;
760
761}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800762
763// UBWC helper functions
764static bool isUBwcFormat(int format)
765{
766 // Explicitly defined UBWC formats
767 switch(format)
768 {
769 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
770 return true;
771 default:
772 return false;
773 }
774}
775
776static bool isUBwcSupported(int format)
777{
778 // Existing HAL formats with UBWC support
779 switch(format)
780 {
781 case HAL_PIXEL_FORMAT_RGB_565:
782 case HAL_PIXEL_FORMAT_RGBA_8888:
783 case HAL_PIXEL_FORMAT_sRGB_A_8888:
784 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
785 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
786 return true;
787 default:
788 return false;
789 }
790}
791
792bool isUBwcEnabled(int format, int usage)
793{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800794 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
795 if (isUBwcFormat(format))
796 return true;
797
798 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
799 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
800 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
801 // Allow UBWC, only if CPU usage flags are not set
802 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800803 GRALLOC_USAGE_SW_WRITE_MASK))) {
804 return true;
805 }
806 }
807 return false;
808}
809
810static void getUBwcWidthAndHeight(int width, int height, int format,
811 int& aligned_w, int& aligned_h)
812{
813 switch (format)
814 {
815 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
816 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
817 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
818 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
819 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
820 break;
821 default:
822 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
823 aligned_w = 0;
824 aligned_h = 0;
825 break;
826 }
827}
828
829static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
830{
831 block_width = 0;
832 block_height = 0;
833
834 switch(bpp)
835 {
836 case 2:
837 case 4:
838 block_width = 16;
839 block_height = 4;
840 break;
841 case 8:
842 block_width = 8;
843 block_height = 4;
844 break;
845 case 16:
846 block_width = 4;
847 block_height = 4;
848 break;
849 default:
850 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
851 break;
852 }
853}
854
855static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
856{
857 unsigned int size = 0;
858 int meta_width, meta_height;
859 int block_width, block_height;
860
861 getUBwcBlockSize(bpp, block_width, block_height);
862
863 if (!block_width || !block_height) {
864 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
865 return size;
866 }
867
868 // Align meta buffer height to 16 blocks
869 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
870
871 // Align meta buffer width to 64 blocks
872 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
873
874 // Align meta buffer size to 4K
875 size = ((meta_width * meta_height), 4096);
876 return size;
877}
878
879static unsigned int getUBwcSize(int width, int height, int format,
880 const int alignedw, const int alignedh) {
881
882 unsigned int size = 0;
883 switch (format) {
884 case HAL_PIXEL_FORMAT_RGB_565:
885 size = alignedw * alignedh * 2;
886 size += getUBwcMetaBufferSize(width, height, 2);
887 break;
888 case HAL_PIXEL_FORMAT_RGBA_8888:
889 case HAL_PIXEL_FORMAT_sRGB_A_8888:
890 size = alignedw * alignedh * 4;
891 size += getUBwcMetaBufferSize(width, height, 4);
892 break;
893 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
894 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
895 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
896 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
897 break;
898 default:
899 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
900 break;
901 }
902 return size;
903}