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Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
Rohit Kulkarni21649ef2018-02-08 14:39:40 -08002* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
Saurabh Shah66c941b2016-07-06 17:34:05 -07003*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
13* * Neither the name of The Linux Foundation nor the names of its
14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070041
42namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080043
44typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
45
Saurabh Shah66c941b2016-07-06 17:34:05 -070046/*
47 * Drm Atomic Operation Codes
48 */
49enum struct DRMOps {
50 /*
51 * Op: Sets plane source crop
52 * Arg: uint32_t - Plane ID
53 * DRMRect - Source Rectangle
54 */
55 PLANE_SET_SRC_RECT,
56 /*
57 * Op: Sets plane destination rect
58 * Arg: uint32_t - Plane ID
59 * DRMRect - Dst Rectangle
60 */
61 PLANE_SET_DST_RECT,
62 /*
Namit Solanki6d0d8062017-11-30 17:29:48 +053063 * Op: Sets plane exclusion rect
64 * Arg: uint32_t - Plane ID
65 * drm_clip_rect - Exclusion Rectangle
66 */
67 PLANE_SET_EXCL_RECT,
68 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -070069 * Op: Sets plane zorder
70 * Arg: uint32_t - Plane ID
71 * uint32_t - zorder
72 */
73 PLANE_SET_ZORDER,
74 /*
75 * Op: Sets plane rotation flags
76 * Arg: uint32_t - Plane ID
77 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
78 */
79 PLANE_SET_ROTATION,
80 /*
81 * Op: Sets plane alpha
82 * Arg: uint32_t - Plane ID
83 * uint32_t - alpha value
84 */
85 PLANE_SET_ALPHA,
86 /*
87 * Op: Sets the blend type
88 * Arg: uint32_t - Plane ID
89 * uint32_t - blend type (see DRMBlendType)
90 */
91 PLANE_SET_BLEND_TYPE,
92 /*
93 * Op: Sets horizontal decimation
94 * Arg: uint32_t - Plane ID
95 * uint32_t - decimation factor
96 */
97 PLANE_SET_H_DECIMATION,
98 /*
99 * Op: Sets vertical decimation
100 * Arg: uint32_t - Plane ID
101 * uint32_t - decimation factor
102 */
103 PLANE_SET_V_DECIMATION,
104 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800105 * Op: Sets source config flags
106 * Arg: uint32_t - Plane ID
107 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
108 */
109 PLANE_SET_SRC_CONFIG,
110 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700111 * Op: Sets frame buffer ID for plane. Set together with CRTC.
112 * Arg: uint32_t - Plane ID
113 * uint32_t - Framebuffer ID
114 */
115 PLANE_SET_FB_ID,
116 /*
117 * Op: Sets the crtc for this plane. Set together with FB_ID.
118 * Arg: uint32_t - Plane ID
119 * uint32_t - CRTC ID
120 */
121 PLANE_SET_CRTC,
122 /*
123 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
124 * Arg: uint32_t - Plane ID
125 * uint32_t - Input fence
126 */
127 PLANE_SET_INPUT_FENCE,
128 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800129 * Op: Sets scaler config on this plane.
130 * Arg: uint32_t - Plane ID
131 * uint64_t - Address of the scaler config object (version based)
132 */
133 PLANE_SET_SCALER_CONFIG,
134 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800135 * Op: Sets plane rotation destination rect
136 * Arg: uint32_t - Plane ID
137 * DRMRect - rotator dst Rectangle
138 */
139 PLANE_SET_ROTATION_DST_RECT,
140 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700141 * Op: Sets FB Secure mode for this plane.
142 * Arg: uint32_t - Plane ID
143 * uint32_t - Value of the FB Secure mode.
144 */
145 PLANE_SET_FB_SECURE_MODE,
146 /*
Ping Li8d6dd622017-07-03 12:05:15 -0700147 * Op: Sets csc config on this plane.
148 * Arg: uint32_t - Plane ID
149 * uint32_t* - pointer to csc type
150 */
151 PLANE_SET_CSC_CONFIG,
152 /*
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800153 * Op: Sets multirect mode on this plane.
154 * Arg: uint32_t - Plane ID
155 * uint32_t - multirect mode
156 */
157 PLANE_SET_MULTIRECT_MODE,
158 /*
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800159 * Op: Sets rotator output frame buffer ID for plane.
160 * Arg: uint32_t - Plane ID
161 * uint32_t - Framebuffer ID
162 */
163 PLANE_SET_ROT_FB_ID,
164 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700165 * Op: Activate or deactivate a CRTC
166 * Arg: uint32_t - CRTC ID
167 * uint32_t - 1 to enable, 0 to disable
168 */
169 CRTC_SET_ACTIVE,
170 /*
171 * Op: Sets display mode
172 * Arg: uint32_t - CRTC ID
173 * drmModeModeInfo* - Pointer to display mode
174 */
175 CRTC_SET_MODE,
176 /*
177 * Op: Sets an offset indicating when a release fence should be signalled.
178 * Arg: uint32_t - offset
179 * 0: non-speculative, default
180 * 1: speculative
181 */
182 CRTC_SET_OUTPUT_FENCE_OFFSET,
183 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800184 * Op: Sets overall SDE core clock
185 * Arg: uint32_t - CRTC ID
186 * uint32_t - core_clk
187 */
188 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700189 /*
190 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800191 * Arg: uint32_t - CRTC ID
192 * uint32_t - core_ab
193 */
194 CRTC_SET_CORE_AB,
195 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700196 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800197 * Arg: uint32_t - CRTC ID
198 * uint32_t - core_ib
199 */
200 CRTC_SET_CORE_IB,
201 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700202 * Op: Sets LLCC Bus average bandwidth
203 * Arg: uint32_t - CRTC ID
204 * uint32_t - llcc_ab
205 */
206 CRTC_SET_LLCC_AB,
207 /*
208 * Op: Sets LLCC Bus instantaneous bandwidth
209 * Arg: uint32_t - CRTC ID
210 * uint32_t - llcc_ib
211 */
212 CRTC_SET_LLCC_IB,
213 /*
214 * Op: Sets DRAM bus average bandwidth
215 * Arg: uint32_t - CRTC ID
216 * uint32_t - dram_ab
217 */
218 CRTC_SET_DRAM_AB,
219 /*
220 * Op: Sets DRAM bus instantaneous bandwidth
221 * Arg: uint32_t - CRTC ID
222 * uint32_t - dram_ib
223 */
224 CRTC_SET_DRAM_IB,
225 /*
Ramkumar Radhakrishnanb7910442017-12-11 13:32:47 -0800226 * Op: Sets Rotator BW for inline rotation
227 * Arg: uint32_t - CRTC ID
228 * uint32_t - rot_bw
229 */
230 CRTC_SET_ROT_PREFILL_BW,
231 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700232 * Op: Sets rotator clock for inline rotation
233 * Arg: uint32_t - CRTC ID
234 * uint32_t - rot_clk
235 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530236 CRTC_SET_ROT_CLK,
237 /*
238 * Op: Sets destination scalar data
239 * Arg: uint32_t - CRTC ID
240 * uint64_t - Pointer to destination scalar data
241 */
242 CRTC_SET_DEST_SCALER_CONFIG,
243 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700244 * Op: Returns release fence for this frame. Should be called after Commit() on
245 * DRMAtomicReqInterface.
246 * Arg: uint32_t - CRTC ID
247 * int * - Pointer to an integer that will hold the returned fence
248 */
249 CRTC_GET_RELEASE_FENCE,
250 /*
Ping Li281f48d2017-01-16 12:45:40 -0800251 * Op: Sets PP feature
252 * Arg: uint32_t - CRTC ID
253 * DRMPPFeatureInfo * - PP feature data pointer
254 */
255 CRTC_SET_POST_PROC,
256 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800257 * Op: Sets CRTC ROIs.
258 * Arg: uint32_t - CRTC ID
259 * uint32_t - number of ROIs
260 * DRMRect * - Array of CRTC ROIs
261 */
262 CRTC_SET_ROI,
263 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700264 * Op: Sets Security level for CRTC.
265 * Arg: uint32_t - CRTC ID
266 * uint32_t - Security level
267 */
268 CRTC_SET_SECURITY_LEVEL,
269 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700270 * Op: sets solid fill stages
271 * Arg: uint32_t - CRTC ID
272 * Vector of DRMSolidfillStage
273 */
274 CRTC_SET_SOLIDFILL_STAGES,
275 /*
Anjaneya Prasad Musunurie8c67f22017-07-01 16:16:13 +0530276 * Op: Sets idle timeout.
277 * Arg: uint32_t - CRTC ID
278 * uint32_t - idle timeout in ms
279 */
280 CRTC_SET_IDLE_TIMEOUT,
281 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700282 * Op: Returns retire fence for this commit. Should be called after Commit() on
283 * DRMAtomicReqInterface.
284 * Arg: uint32_t - Connector ID
285 * int * - Pointer to an integer that will hold the returned fence
286 */
287 CONNECTOR_GET_RETIRE_FENCE,
288 /*
289 * Op: Sets writeback connector destination rect
290 * Arg: uint32_t - Connector ID
291 * DRMRect - Dst Rectangle
292 */
293 CONNECTOR_SET_OUTPUT_RECT,
294 /*
295 * Op: Sets frame buffer ID for writeback connector.
296 * Arg: uint32_t - Connector ID
297 * uint32_t - Framebuffer ID
298 */
299 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700300 /*
301 * Op: Sets power mode for connector.
302 * Arg: uint32_t - Connector ID
303 * uint32_t - Power Mode
304 */
305 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800306 /*
307 * Op: Sets panel ROIs.
308 * Arg: uint32_t - Connector ID
309 * uint32_t - number of ROIs
310 * DRMRect * - Array of Connector ROIs
311 */
312 CONNECTOR_SET_ROI,
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700313 /*
Saurabh Shahf3635952017-10-16 17:08:18 -0700314 * Op: Sets the connector to autorefresh mode.
315 * Arg: uint32_t - Connector ID
316 * uint32_t - Enable-1, Disable-0
317 */
318 CONNECTOR_SET_AUTOREFRESH,
319 /*
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700320 * Op: Set FB secure mode for Writeback connector.
321 * Arg: uint32_t - Connector ID
322 * uint32_t - FB Secure mode
323 */
324 CONNECTOR_SET_FB_SECURE_MODE,
Saurabh Shah82b06f42017-09-06 16:43:49 -0700325 /*
326 * Op: Sets a crtc id to this connector
327 * Arg: uint32_t - Connector ID
328 * uint32_t - CRTC ID
329 */
330 CONNECTOR_SET_CRTC,
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700331 /*
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700332 * Op: Sets PP feature
333 * Arg: uint32_t - Connector ID
334 * DRMPPFeatureInfo * - PP feature data pointer
335 */
336 CONNECTOR_SET_POST_PROC,
337 /*
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700338 * Op: Sets connector hdr metadata
339 * Arg: uint32_t - Connector ID
340 * drm_msm_ext_hdr_metadata - hdr_metadata
341 */
342 CONNECTOR_SET_HDR_METADATA,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700343};
344
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700345enum struct DRMRotation {
346 FLIP_H = 0x1,
347 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700348 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700349 ROT_90 = 0x4,
350};
351
Sushil Chauhan3396e202017-04-14 18:34:22 -0700352enum struct DRMPowerMode {
353 ON,
354 DOZE,
355 DOZE_SUSPEND,
356 OFF,
357};
358
Saurabh Shah66c941b2016-07-06 17:34:05 -0700359enum struct DRMBlendType {
360 UNDEFINED = 0,
361 OPAQUE = 1,
362 PREMULTIPLIED = 2,
363 COVERAGE = 3,
364};
365
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800366enum struct DRMSrcConfig {
367 DEINTERLACE = 0,
368};
369
Saurabh Shah66c941b2016-07-06 17:34:05 -0700370/* Display type to identify a suitable connector */
371enum struct DRMDisplayType {
372 PERIPHERAL,
373 TV,
374 VIRTUAL,
375};
376
377struct DRMRect {
378 uint32_t left; // Left-most pixel coordinate.
379 uint32_t top; // Top-most pixel coordinate.
380 uint32_t right; // Right-most pixel coordinate.
381 uint32_t bottom; // Bottom-most pixel coordinate.
382};
383
384//------------------------------------------------------------------------
385// DRM Info Query Types
386//------------------------------------------------------------------------
387
388enum struct QSEEDVersion {
389 V1,
390 V2,
391 V3,
392};
393
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700394/* QSEED3 Step version */
395enum struct QSEEDStepVersion {
396 V2,
397 V3,
398 V4,
399};
400
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700401enum struct SmartDMARevision {
402 V1,
403 V2,
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530404 V2p5
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700405};
406
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800407/* Inline Rotation version */
408enum struct InlineRotationVersion {
409 UNKNOWN,
410 V1,
411 V1p1, // Rotator FB ID needs to be set
412};
413
Saurabh Shah66c941b2016-07-06 17:34:05 -0700414/* Per CRTC Resource Info*/
415struct DRMCrtcInfo {
416 bool has_src_split;
Srikanth Rajagopalan49380782017-07-06 15:23:12 -0700417 bool has_hdr;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700418 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700419 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700420 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700421 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800422 float ib_fudge_factor;
423 float clk_fudge_factor;
424 uint32_t dest_scale_prefill_lines;
425 uint32_t undersized_prefill_lines;
426 uint32_t macrotile_prefill_lines;
427 uint32_t nv12_prefill_lines;
428 uint32_t linear_prefill_lines;
429 uint32_t downscale_prefill_lines;
430 uint32_t extra_prefill_lines;
431 uint32_t amortized_threshold;
432 uint64_t max_bandwidth_low;
433 uint64_t max_bandwidth_high;
434 uint32_t max_sde_clk;
435 CompRatioMap comp_ratio_rt_map;
436 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700437 uint32_t hw_version;
Namit Solanki24921ab2017-05-23 20:16:25 +0530438 uint32_t dest_scaler_count = 0;
439 uint32_t max_dest_scaler_input_width = 0;
440 uint32_t max_dest_scaler_output_width = 0;
441 uint32_t max_dest_scale_up = 1;
Pullakavi Srinivas3e2c0402017-12-05 17:50:15 +0530442 uint32_t min_prefill_lines = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700443};
444
445enum struct DRMPlaneType {
446 // Has CSC and scaling capability
447 VIG = 0,
448 // Has scaling capability but no CSC
449 RGB,
450 // No scaling support
451 DMA,
452 // Supports a small dimension and doesn't use a CRTC stage
453 CURSOR,
454 MAX,
455};
456
457struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700458 DRMPlaneType type;
459 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700460 // FourCC format enum and modifier
461 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
462 uint32_t max_linewidth;
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530463 uint32_t max_scaler_linewidth;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700464 uint32_t max_upscale;
465 uint32_t max_downscale;
466 uint32_t max_horizontal_deci;
467 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800468 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800469 uint32_t cache_size; // cache size in bytes for inline rotation support.
Namit Solanki6d0d8062017-11-30 17:29:48 +0530470 bool has_excl_rect = false;
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700471 QSEEDStepVersion qseed3_version;
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800472 bool multirect_prop_present = false;
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800473 InlineRotationVersion inrot_version; // inline rotation version
Saurabh Shah66c941b2016-07-06 17:34:05 -0700474};
475
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700476// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
477typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700478
479enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700480 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700481 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700482 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700483 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700484 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700485 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700486 DUAL_LM_MERGE_DSC,
487 DUAL_LM_DSCMERGE,
488 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700489};
490
491enum struct DRMPanelMode {
492 VIDEO,
493 COMMAND,
494};
495
Saurabh Shah7e16c932017-11-03 17:55:36 -0700496/* Per mode info */
497struct DRMModeInfo {
498 drmModeModeInfo mode;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700499 DRMTopology topology;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800500 // Valid only if mode is command
501 int num_roi;
502 int xstart;
503 int ystart;
504 int walign;
505 int halign;
506 int wmin;
507 int hmin;
508 bool roi_merge;
Saurabh Shah7e16c932017-11-03 17:55:36 -0700509};
510
511/* Per Connector Info*/
512struct DRMConnectorInfo {
513 uint32_t mmWidth;
514 uint32_t mmHeight;
515 uint32_t type;
516 std::vector<DRMModeInfo> modes;
517 std::string panel_name;
518 DRMPanelMode panel_mode;
519 bool is_primary;
520 // Valid only if DRMPanelMode is VIDEO
521 bool dynamic_fps;
522 // FourCC format enum and modifier
523 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
524 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
525 uint32_t max_linewidth;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700526 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700527 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700528 uint32_t transfer_time_us;
Srikanth Rajagopalance0f7cb2017-06-12 15:14:26 -0700529 drm_msm_ext_hdr_properties ext_hdr_prop;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700530};
531
532/* Identifier token for a display */
533struct DRMDisplayToken {
534 uint32_t conn_id;
535 uint32_t crtc_id;
536};
537
Ping Li281f48d2017-01-16 12:45:40 -0800538enum DRMPPFeatureID {
539 kFeaturePcc,
540 kFeatureIgc,
541 kFeaturePgc,
542 kFeatureMixerGc,
543 kFeaturePaV2,
544 kFeatureDither,
545 kFeatureGamut,
546 kFeaturePADither,
Rajesh Yadavd30b0cc2017-09-22 00:26:54 +0530547 kFeaturePAHsic,
548 kFeaturePASixZone,
Rajesh Yadav99535ac2017-08-28 16:33:04 +0530549 kFeaturePAMemColSkin,
550 kFeaturePAMemColSky,
551 kFeaturePAMemColFoliage,
552 kFeaturePAMemColProt,
Ping Li281f48d2017-01-16 12:45:40 -0800553 kPPFeaturesMax,
554};
555
556enum DRMPPPropType {
557 kPropEnum,
558 kPropRange,
559 kPropBlob,
560 kPropTypeMax,
561};
562
563struct DRMPPFeatureInfo {
564 DRMPPFeatureID id;
565 DRMPPPropType type;
566 uint32_t version;
567 uint32_t payload_size;
568 void *payload;
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700569 uint32_t object_type;
Ping Li281f48d2017-01-16 12:45:40 -0800570};
571
Ping Li8d6dd622017-07-03 12:05:15 -0700572enum DRMCscType {
573 kCscYuv2Rgb601L,
574 kCscYuv2Rgb601FR,
575 kCscYuv2Rgb709L,
576 kCscYuv2Rgb2020L,
577 kCscYuv2Rgb2020FR,
578 kCscTypeMax,
579};
580
Saurabh Shah0ffee302016-11-22 10:42:11 -0800581struct DRMScalerLUTInfo {
582 uint32_t dir_lut_size = 0;
583 uint32_t cir_lut_size = 0;
584 uint32_t sep_lut_size = 0;
585 uint64_t dir_lut = 0;
586 uint64_t cir_lut = 0;
587 uint64_t sep_lut = 0;
588};
589
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700590enum struct DRMSecureMode {
591 NON_SECURE,
592 SECURE,
593 NON_SECURE_DIR_TRANSLATION,
594 SECURE_DIR_TRANSLATION,
595};
596
597enum struct DRMSecurityLevel {
598 SECURE_NON_SECURE,
599 SECURE_ONLY,
600};
601
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800602enum struct DRMMultiRectMode {
603 NONE = 0,
604 PARALLEL = 1,
605 SERIAL = 2,
606};
607
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700608struct DRMSolidfillStage {
609 DRMRect bounding_rect {};
610 bool is_exclusion_rect = false;
611 uint32_t color = 0xff000000; // in 8bit argb
Gopikrishnaiah Anandancc123062017-07-31 17:21:03 -0700612 uint32_t red = 0;
613 uint32_t blue = 0;
614 uint32_t green = 0;
615 uint32_t alpha = 0xff;
616 uint32_t color_bit_depth = 0;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700617 uint32_t z_order = 0;
618 uint32_t plane_alpha = 0xff;
619};
620
Saurabh Shah66c941b2016-07-06 17:34:05 -0700621/* DRM Atomic Request Property Set.
622 *
623 * Helper class to create and populate atomic properties of DRM components
624 * when rendered in DRM atomic mode */
625class DRMAtomicReqInterface {
626 public:
627 virtual ~DRMAtomicReqInterface() {}
628 /* Perform request operation.
629 *
630 * [input]: opcode: operation code from DRMOps list.
Saurabh Shah1abcdf62017-11-21 14:03:22 -0800631 * obj_id: Relevant crtc, connector, plane id
Saurabh Shah66c941b2016-07-06 17:34:05 -0700632 * var_arg: arguments for DRMOps's can differ in number and
633 * data type. Refer above DRMOps to details.
634 * [return]: Error code if the API fails, 0 on success.
635 */
Saurabh Shah1abcdf62017-11-21 14:03:22 -0800636 virtual int Perform(DRMOps opcode, uint32_t obj_id, ...) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700637
638 /*
639 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
640 * called every frame.
641 * [input]: synchronous: Determines if the call should block until a h/w flip
Saurabh Shaha917aa72017-09-15 13:27:24 -0700642 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming
643 * planes but still need the previously staged ones to not be unstaged
Saurabh Shah66c941b2016-07-06 17:34:05 -0700644 * [return]: Error code if the API fails, 0 on success.
645 */
Saurabh Shaha917aa72017-09-15 13:27:24 -0700646 virtual int Commit(bool synchronous, bool retain_planes) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700647 /*
648 * Validate the params set via Perform().
649 * [return]: Error code if the API fails, 0 on success.
650 */
651 virtual int Validate() = 0;
652};
653
654class DRMManagerInterface;
655
656/* Populates a singleton instance of DRMManager */
657typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
658
659/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800660typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700661
662/*
663 * DRM Manager Interface - Any class which plans to implement helper function for vendor
664 * specific DRM driver implementation must implement the below interface routines to work
665 * with SDM.
666 */
667
668class DRMManagerInterface {
669 public:
670 virtual ~DRMManagerInterface() {}
671
672 /*
673 * Since SDM completely manages the planes. GetPlanesInfo will provide all
674 * the plane information.
675 * [output]: DRMPlanesInfo: Resource Info for planes.
676 */
677 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
678
679 /*
680 * Will provide all the information of a selected crtc.
681 * [input]: Use crtc id 0 to obtain system wide info
682 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
683 */
684 virtual void GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
685
686 /*
687 * Will provide all the information of a selected connector.
688 * [output]: DRMConnectorInfo: Resource Info for the given connector id
689 */
690 virtual void GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
691
692 /*
Ping Li281f48d2017-01-16 12:45:40 -0800693 * Will query post propcessing feature info of a CRTC.
694 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
695 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530696 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0;
Ping Li281f48d2017-01-16 12:45:40 -0800697 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700698 * Register a logical display to receive a token.
699 * Each display pipeline in DRM is identified by its CRTC and Connector(s).
700 * On display connect(bootup or hotplug), clients should invoke this interface to
701 * establish the pipeline for the display and should get a DisplayToken
702 * populated with crtc and connnector(s) id's. Here onwards, Client should
703 * use this token to represent the display for any Perform operations if
704 * needed.
705 *
706 * [input]: disp_type - Peripheral / TV / Virtual
707 * [output]: DRMDisplayToken - CRTC and Connector id's for the display
708 * [return]: 0 on success, a negative error value otherwise
709 */
710 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
711
712 /* Client should invoke this interface on display disconnect.
713 * [input]: DRMDisplayToken - identifier for the display.
714 */
715 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
716
717 /*
718 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
719 * returned as part of RegisterDisplay API. Needs to be called per display.
720 * [input]: DRMDisplayToken that identifies a display pipeline
721 * [output]: Pointer to an instance of DRMAtomicReqInterface.
722 * [return]: Error code if the API fails, 0 on success.
723 */
724 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
725
726 /*
727 * Destroys the instance of DRMAtomicReqInterface
728 * [input]: Pointer to a DRMAtomicReqInterface
729 * [return]: Error code if the API fails, 0 on success.
730 */
731 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Saurabh Shah0ffee302016-11-22 10:42:11 -0800732 /*
733 * Sets the global scaler LUT
734 * [input]: LUT Info
735 * [return]: Error code if the API fails, 0 on success.
736 */
737 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700738};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800739
Saurabh Shah66c941b2016-07-06 17:34:05 -0700740} // namespace sde_drm
741#endif // __DRM_INTERFACE_H__