blob: 4f342db6247166e6e5044e58d5c709fcaf3938c2 [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Mansoor Aftabe9912a62014-07-15 01:40:26 -07002 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Iliyan Malchev202a77d2012-06-11 14:41:12 -070052using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070053using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070054
Naomi Luisa44100c2013-02-08 12:42:03 -080055ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
56
Sushil Chauhan65e26302015-01-14 10:48:57 -080057static void getUBwcWidthAndHeight(int, int, int, int&, int&);
58static unsigned int getUBwcSize(int, int, int, const int, const int);
59
Iliyan Malchev202a77d2012-06-11 14:41:12 -070060//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070061
Saurabh Shah1adcafe2014-12-19 10:05:41 -080062/* The default policy is to return cached buffers unless the client explicity
63 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
64 * read or written in software. Any combination with a _RARELY_ flag will be
65 * treated as uncached. */
66static bool useUncached(const int& usage) {
67 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
68 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
69 GRALLOC_USAGE_SW_WRITE_RARELY) or
70 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
71 GRALLOC_USAGE_SW_READ_RARELY))
72 return true;
73
74 return false;
75}
76
Naomi Luisa44100c2013-02-08 12:42:03 -080077//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080078AdrenoMemInfo::AdrenoMemInfo()
79{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080080 LINK_adreno_compute_aligned_width_and_height = NULL;
81 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070082 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -080083 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -080084 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080085
Naomi Luis01f5c8e2013-02-11 12:46:24 -080086 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
87 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080088 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070089 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
90 *(void **)&LINK_adreno_compute_padding =
91 ::dlsym(libadreno_utils, "compute_surface_padding");
92 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
93 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -080094 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
95 ::dlsym(libadreno_utils,
96 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -080097 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
98 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -080099 }
100}
101
102AdrenoMemInfo::~AdrenoMemInfo()
103{
104 if (libadreno_utils) {
105 ::dlclose(libadreno_utils);
106 }
107}
108
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700109int AdrenoMemInfo::isMacroTilingSupportedByGPU()
110{
111 if ((libadreno_utils)) {
112 if(LINK_adreno_isMacroTilingSupportedByGpu) {
113 return LINK_adreno_isMacroTilingSupportedByGpu();
114 }
115 }
116 return 0;
117}
118
119
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800120void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800121 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800122{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800123
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800124 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700125 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800126 int tileEnabled = isMacroTileEnabled(format, usage);
127 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
128 height, format, tileEnabled, aligned_w, aligned_h);
129 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800130 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800131
132 if (isUBwcEnabled(format, usage)) {
133 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
134 return;
135 }
136
137 aligned_w = width;
138 aligned_h = height;
139 switch (format)
140 {
141 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
142 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
143 case HAL_PIXEL_FORMAT_RAW_SENSOR:
144 aligned_w = ALIGN(width, 32);
145 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700146 case HAL_PIXEL_FORMAT_RAW10:
147 aligned_w = ALIGN(width * 10 /8, 16);
148 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800149 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
150 aligned_w = ALIGN(width, 128);
151 break;
152 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
153 case HAL_PIXEL_FORMAT_YV12:
154 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
155 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
156 case HAL_PIXEL_FORMAT_YCbCr_422_I:
157 case HAL_PIXEL_FORMAT_YCrCb_422_I:
158 aligned_w = ALIGN(width, 16);
159 break;
160 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
161 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
162 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
163 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
164 break;
165 case HAL_PIXEL_FORMAT_BLOB:
166 break;
167 case HAL_PIXEL_FORMAT_NV21_ZSL:
168 aligned_w = ALIGN(width, 64);
169 aligned_h = ALIGN(height, 64);
170 break;
171 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
172 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
173 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
174 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
175 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
176 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
177 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
178 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
179 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
180 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
181 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
182 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
183 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
184 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
185 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
186 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
187 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
188 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
189 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
190 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
191 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
192 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
196 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
197 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
198 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
199 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
200 int bytesPerPixel = 0;
201 int raster_mode = 0; //Adreno unknown raster mode.
202 int padding_threshold = 512; //Threshold for padding
203 //surfaces.
204
205 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
206 width, height, format, 0,raster_mode, padding_threshold,
207 &aligned_w, &aligned_h, &bytesPerPixel);
208 } else {
209 ALOGW("%s: Warning!! Symbols" \
210 " compute_compressedfmt_aligned_width_and_height" \
211 " not found", __FUNCTION__);
212 }
213 break;
214 default: break;
215 }
216}
217
218void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
219 int tile_enabled, int& aligned_w, int& aligned_h)
220{
221 aligned_w = ALIGN(width, 32);
222 aligned_h = ALIGN(height, 32);
223
224 // Don't add any additional padding if debug.gralloc.map_fb_memory
225 // is enabled
226 char property[PROPERTY_VALUE_MAX];
227 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
228 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
229 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
230 return;
231 }
232
233 int bpp = 4;
234 switch(format)
235 {
236 case HAL_PIXEL_FORMAT_RGB_888:
237 bpp = 3;
238 break;
239 case HAL_PIXEL_FORMAT_RGB_565:
240 case HAL_PIXEL_FORMAT_RGBA_5551:
241 case HAL_PIXEL_FORMAT_RGBA_4444:
242 bpp = 2;
243 break;
244 default: break;
245 }
246
247 if (libadreno_utils) {
248 int raster_mode = 0; // Adreno unknown raster mode.
249 int padding_threshold = 512; // Threshold for padding surfaces.
250 // the function below computes aligned width and aligned height
251 // based on linear or macro tile mode selected.
252 if(LINK_adreno_compute_aligned_width_and_height) {
253 LINK_adreno_compute_aligned_width_and_height(width,
254 height, bpp, tile_enabled,
255 raster_mode, padding_threshold,
256 &aligned_w, &aligned_h);
257
258 } else if(LINK_adreno_compute_padding) {
259 int surface_tile_height = 1; // Linear surface
260 aligned_w = LINK_adreno_compute_padding(width, bpp,
261 surface_tile_height, raster_mode,
262 padding_threshold);
263 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
264 __FUNCTION__);
265 } else {
266 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
267 "compute_aligned_width_and_height not found", __FUNCTION__);
268 }
269 }
270}
271
272int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
273{
Sushil Chauhan082acd62015-01-14 16:49:29 -0800274 if (libadreno_utils) {
275 if (LINK_adreno_isUBWCSupportedByGpu) {
276 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
277 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
278 }
279 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800280 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800281}
282
Sushil Chauhan082acd62015-01-14 16:49:29 -0800283ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
284{
285 switch (hal_format) {
286 case HAL_PIXEL_FORMAT_RGBA_8888:
287 return ADRENO_PIXELFORMAT_R8G8B8A8;
288 case HAL_PIXEL_FORMAT_RGB_565:
289 return ADRENO_PIXELFORMAT_B5G6R5;
290 case HAL_PIXEL_FORMAT_sRGB_A_8888:
291 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
292 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800293 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800294 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
295 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800296 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800297 default:
298 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
299 break;
300 }
301 return ADRENO_PIXELFORMAT_UNKNOWN;
302}
303
Naomi Luisa44100c2013-02-08 12:42:03 -0800304//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700305IAllocController* IAllocController::sController = NULL;
306IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700307{
308 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700309 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700310 }
311 return sController;
312}
313
314
315//-------------- IonController-----------------------//
316IonController::IonController()
317{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530318 allocateIonMem();
319}
320
321void IonController::allocateIonMem()
322{
323 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700324}
325
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700326int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700327{
328 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500329 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700330 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700331
332 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700333 data.allocType = 0;
334
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530335 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530336 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500337 ionHeapId |= ION_HEAP(ION_CP_MM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500338 ionFlags |= ION_SECURE;
Shalaj Jain13cdf812014-12-02 16:20:54 -0800339#ifdef ION_FLAG_ALLOW_NON_CONTIG
340 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
341 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
342 }
343#endif
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530344 } else {
345 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500346 // do not set ion secure flag & MM heap. Fallback to system heap.
347 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530348 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500349 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530350 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
351 //MM Heap is exclusively a secure heap.
352 //If it is used for non secure cases, fallback to IOMMU heap
353 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
354 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500355 trying to use system heap instead !!");
356 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500357 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700358
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700359 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500360 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700361
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700362 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500363 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700364
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530365 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500366 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700367
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500368 // if no ion heap flags are set, default to system heap
369 if(!ionHeapId)
370 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700371
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500372 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700373 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500374 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700375 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700376
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700377 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700378 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500379 } else {
380 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
381 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700382 }
383
384 return ret;
385}
386
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700387IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700388{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700389 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700390 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
391 memalloc = mIonAlloc;
392 } else {
393 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
394 }
395
396 return memalloc;
397}
398
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700399bool isMacroTileEnabled(int format, int usage)
400{
401 bool tileEnabled = false;
402
403 // Check whether GPU & MDSS supports MacroTiling feature
404 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
405 qdutils::MDPVersion::getInstance().supportsMacroTile())
406 {
407 // check the format
408 switch(format)
409 {
410 case HAL_PIXEL_FORMAT_RGBA_8888:
411 case HAL_PIXEL_FORMAT_RGBX_8888:
412 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800413 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700414 {
415 tileEnabled = true;
416 // check the usage flags
417 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
418 GRALLOC_USAGE_SW_WRITE_MASK)) {
419 // Application intends to use CPU for rendering
420 tileEnabled = false;
421 }
422 break;
423 }
424 default:
425 break;
426 }
427 }
428 return tileEnabled;
429}
430
431// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800432unsigned int getSize(int format, int width, int height, int usage,
433 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700434
Sushil Chauhan65e26302015-01-14 10:48:57 -0800435 if (isUBwcEnabled(format, usage)) {
436 return getUBwcSize(width, height, format, alignedw, alignedh);
437 }
438
439 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700440 switch (format) {
441 case HAL_PIXEL_FORMAT_RGBA_8888:
442 case HAL_PIXEL_FORMAT_RGBX_8888:
443 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700444 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700445 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700446 size = alignedw * alignedh * 4;
447 break;
448 case HAL_PIXEL_FORMAT_RGB_888:
449 size = alignedw * alignedh * 3;
450 break;
451 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700452 case HAL_PIXEL_FORMAT_RGBA_5551:
453 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400454 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700455 size = alignedw * alignedh * 2;
456 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700457 case HAL_PIXEL_FORMAT_RAW10:
458 size = ALIGN(alignedw * alignedh, 4096);
459 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700460
461 // adreno formats
462 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
463 size = ALIGN(alignedw*alignedh, 4096);
464 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
465 break;
466 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
467 // The chroma plane is subsampled,
468 // but the pitch in bytes is unchanged
469 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700470 size = ALIGN( alignedw * alignedh, 8192);
471 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
472 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700473 case HAL_PIXEL_FORMAT_YV12:
474 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
475 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800476 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700477 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400478 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700479 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700480 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700481 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800482 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
483 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400484 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800485 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700486 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
487 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700488 case HAL_PIXEL_FORMAT_YCbCr_422_I:
489 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700490 if(width & 1) {
491 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800492 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700493 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700494 size = ALIGN(alignedw * alignedh * 2, 4096);
495 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700496 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400497 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700498 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700499 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400500 case HAL_PIXEL_FORMAT_BLOB:
501 if(height != 1) {
502 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
503 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800504 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400505 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400506 size = width;
507 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700508 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700509 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
510 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500511 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
512 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
513 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
514 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
515 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
516 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
517 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
518 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
519 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
520 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
521 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
522 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
523 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
524 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
525 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
526 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
527 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
528 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
529 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
530 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
531 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
532 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
533 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
534 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
535 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
536 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
537 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800538 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500539 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
540 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700541 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800542 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800543 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700544 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700545 return size;
546}
547
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700548unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700549 int& alignedw, int &alignedh)
550{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700551 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700552
553 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
554 height,
555 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800556 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700557 alignedw,
558 alignedh);
559
Sushil Chauhan65e26302015-01-14 10:48:57 -0800560 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700561
562 return size;
563}
564
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700565
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700566unsigned int getBufferSizeAndDimensions(int width, int height, int format,
567 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700568{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700569 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700570
571 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
572 height,
573 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800574 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700575 alignedw,
576 alignedh);
577
Sushil Chauhan65e26302015-01-14 10:48:57 -0800578 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700579
580 return size;
581}
582
583
584void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700585 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700586{
587 tileEnabled = isMacroTileEnabled(format, usage);
588
589 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
590 height,
591 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800592 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700593 alignedw,
594 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800595 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700596}
597
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400598int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
599{
600 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700601 int width = hnd->width;
602 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700603 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800604 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700605
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400606 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
607
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700608 // Check metadata if the geometry has been updated.
609 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
610 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
611 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
612 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
613 }
614
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400615 // Get the chroma offsets from the handle width/height. We take advantage
616 // of the fact the width _is_ the stride
617 switch (hnd->format) {
618 //Semiplanar
619 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
620 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
621 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
622 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700623 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400624 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700625 ycbcr->cb = (void*)(hnd->base + ystride * height);
626 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400627 ycbcr->ystride = ystride;
628 ycbcr->cstride = cstride;
629 ycbcr->chroma_step = 2;
630 break;
631
Sushil Chauhan4686c972015-02-20 15:44:52 -0800632 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
633 // NV12_UBWC buffer has these 4 planes in the following sequence:
634 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
635 unsigned int y_meta_stride, y_meta_height, y_meta_size;
636 unsigned int y_stride, y_height, y_size;
637 unsigned int c_meta_stride, c_meta_height, c_meta_size;
638
639 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
640 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
641 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
642
643 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
644 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
645 y_size = ALIGN((y_stride * y_height), alignment);
646
647 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
648 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
649 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
650
651 ycbcr->y = (void*)(hnd->base + y_meta_size);
652 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
653 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
654 c_meta_size + 1);
655 ycbcr->ystride = y_stride;
656 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
657 ycbcr->chroma_step = 2;
658 break;
659
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400660 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
661 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
662 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
663 case HAL_PIXEL_FORMAT_NV21_ZSL:
664 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700665 case HAL_PIXEL_FORMAT_RAW10:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700666 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400667 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700668 ycbcr->cr = (void*)(hnd->base + ystride * height);
669 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400670 ycbcr->ystride = ystride;
671 ycbcr->cstride = cstride;
672 ycbcr->chroma_step = 2;
673 break;
674
675 //Planar
676 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700677 ystride = width;
678 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400679 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700680 ycbcr->cr = (void*)(hnd->base + ystride * height);
681 ycbcr->cb = (void*)(hnd->base + ystride * height +
682 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400683 ycbcr->ystride = ystride;
684 ycbcr->cstride = cstride;
685 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400686 break;
687 //Unsupported formats
688 case HAL_PIXEL_FORMAT_YCbCr_422_I:
689 case HAL_PIXEL_FORMAT_YCrCb_422_I:
690 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
691 default:
692 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
693 hnd->format);
694 err = -EINVAL;
695 }
696 return err;
697
698}
699
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700700
701
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700702// Allocate buffer from width, height and format into a
703// private_handle_t. It is the responsibility of the caller
704// to free the buffer using the free_buffer function
705int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
706{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700707 alloc_data data;
708 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700709 gralloc::IAllocController* sAlloc =
710 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700711 data.base = 0;
712 data.fd = -1;
713 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700714 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
715 alignedh);
716
Naseer Ahmed29a26812012-06-14 00:56:20 -0700717 data.align = getpagesize();
718 data.uncached = useUncached(usage);
719 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700720
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700721 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700722 if (0 != err) {
723 ALOGE("%s: allocate failed", __FUNCTION__);
724 return -ENOMEM;
725 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700726
Naseer Ahmed29a26812012-06-14 00:56:20 -0700727 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700728 data.allocType, 0, format,
729 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700730 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700731 hnd->offset = data.offset;
732 hnd->gpuaddr = 0;
733 *pHnd = hnd;
734 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700735}
736
737void free_buffer(private_handle_t *hnd)
738{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700739 gralloc::IAllocController* sAlloc =
740 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700741 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700742 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700743 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
744 }
745 if(hnd)
746 delete hnd;
747
748}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800749
750// UBWC helper functions
751static bool isUBwcFormat(int format)
752{
753 // Explicitly defined UBWC formats
754 switch(format)
755 {
756 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
757 return true;
758 default:
759 return false;
760 }
761}
762
763static bool isUBwcSupported(int format)
764{
765 // Existing HAL formats with UBWC support
766 switch(format)
767 {
768 case HAL_PIXEL_FORMAT_RGB_565:
769 case HAL_PIXEL_FORMAT_RGBA_8888:
770 case HAL_PIXEL_FORMAT_sRGB_A_8888:
771 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
772 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
773 return true;
774 default:
775 return false;
776 }
777}
778
779bool isUBwcEnabled(int format, int usage)
780{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800781 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
782 if (isUBwcFormat(format))
783 return true;
784
785 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
786 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
787 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
788 // Allow UBWC, only if CPU usage flags are not set
789 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800790 GRALLOC_USAGE_SW_WRITE_MASK))) {
791 return true;
792 }
793 }
794 return false;
795}
796
797static void getUBwcWidthAndHeight(int width, int height, int format,
798 int& aligned_w, int& aligned_h)
799{
800 switch (format)
801 {
802 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
803 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
804 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
805 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
806 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
807 break;
808 default:
809 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
810 aligned_w = 0;
811 aligned_h = 0;
812 break;
813 }
814}
815
816static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
817{
818 block_width = 0;
819 block_height = 0;
820
821 switch(bpp)
822 {
823 case 2:
824 case 4:
825 block_width = 16;
826 block_height = 4;
827 break;
828 case 8:
829 block_width = 8;
830 block_height = 4;
831 break;
832 case 16:
833 block_width = 4;
834 block_height = 4;
835 break;
836 default:
837 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
838 break;
839 }
840}
841
842static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
843{
844 unsigned int size = 0;
845 int meta_width, meta_height;
846 int block_width, block_height;
847
848 getUBwcBlockSize(bpp, block_width, block_height);
849
850 if (!block_width || !block_height) {
851 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
852 return size;
853 }
854
855 // Align meta buffer height to 16 blocks
856 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
857
858 // Align meta buffer width to 64 blocks
859 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
860
861 // Align meta buffer size to 4K
862 size = ((meta_width * meta_height), 4096);
863 return size;
864}
865
866static unsigned int getUBwcSize(int width, int height, int format,
867 const int alignedw, const int alignedh) {
868
869 unsigned int size = 0;
870 switch (format) {
871 case HAL_PIXEL_FORMAT_RGB_565:
872 size = alignedw * alignedh * 2;
873 size += getUBwcMetaBufferSize(width, height, 2);
874 break;
875 case HAL_PIXEL_FORMAT_RGBA_8888:
876 case HAL_PIXEL_FORMAT_sRGB_A_8888:
877 size = alignedw * alignedh * 4;
878 size += getUBwcMetaBufferSize(width, height, 4);
879 break;
880 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
881 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
882 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
883 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
884 break;
885 default:
886 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
887 break;
888 }
889 return size;
890}