Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 1 | /* |
Mahesh Aia | 25b2271 | 2019-01-04 11:49:46 -0800 | [diff] [blame] | 2 | * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are |
| 6 | * met: |
| 7 | * * Redistributions of source code must retain the above copyright |
| 8 | * notice, this list of conditions and the following disclaimer. |
| 9 | * * Redistributions in binary form must reproduce the above |
| 10 | * copyright notice, this list of conditions and the following |
| 11 | * disclaimer in the documentation and/or other materials provided |
| 12 | * with the distribution. |
| 13 | * * Neither the name of The Linux Foundation nor the names of its |
| 14 | * contributors may be used to endorse or promote products derived |
| 15 | * from this software without specific prior written permission. |
| 16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 21 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 22 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 23 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 24 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 25 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 26 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 27 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 28 | */ |
| 29 | |
| 30 | #ifndef __DRM_INTERFACE_H__ |
| 31 | #define __DRM_INTERFACE_H__ |
| 32 | |
| 33 | #include <map> |
| 34 | #include <string> |
| 35 | #include <utility> |
| 36 | #include <vector> |
Camus Wong | b116aa4 | 2018-12-18 19:50:54 -0500 | [diff] [blame] | 37 | #include <bitset> |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 38 | |
| 39 | #include "xf86drm.h" |
| 40 | #include "xf86drmMode.h" |
Sushil Chauhan | 80e5843 | 2017-07-06 11:39:17 -0700 | [diff] [blame] | 41 | #include <drm/msm_drm.h> |
Yuchao Ma | 577f0f7 | 2018-07-09 11:20:00 +0800 | [diff] [blame] | 42 | #include <drm/msm_drm_pp.h> |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 43 | |
| 44 | namespace sde_drm { |
Ramkumar Radhakrishnan | 9ed1fd8 | 2017-03-09 18:46:41 -0800 | [diff] [blame] | 45 | |
| 46 | typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap; |
| 47 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 48 | /* |
| 49 | * Drm Atomic Operation Codes |
| 50 | */ |
| 51 | enum struct DRMOps { |
| 52 | /* |
| 53 | * Op: Sets plane source crop |
| 54 | * Arg: uint32_t - Plane ID |
| 55 | * DRMRect - Source Rectangle |
| 56 | */ |
| 57 | PLANE_SET_SRC_RECT, |
| 58 | /* |
| 59 | * Op: Sets plane destination rect |
| 60 | * Arg: uint32_t - Plane ID |
| 61 | * DRMRect - Dst Rectangle |
| 62 | */ |
| 63 | PLANE_SET_DST_RECT, |
| 64 | /* |
Namit Solanki | 6d0d806 | 2017-11-30 17:29:48 +0530 | [diff] [blame] | 65 | * Op: Sets plane exclusion rect |
| 66 | * Arg: uint32_t - Plane ID |
| 67 | * drm_clip_rect - Exclusion Rectangle |
| 68 | */ |
| 69 | PLANE_SET_EXCL_RECT, |
| 70 | /* |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 71 | * Op: Sets plane zorder |
| 72 | * Arg: uint32_t - Plane ID |
| 73 | * uint32_t - zorder |
| 74 | */ |
| 75 | PLANE_SET_ZORDER, |
| 76 | /* |
| 77 | * Op: Sets plane rotation flags |
| 78 | * Arg: uint32_t - Plane ID |
| 79 | * uint32_t - bit mask of rotation flags (See drm_mode.h for enums) |
| 80 | */ |
| 81 | PLANE_SET_ROTATION, |
| 82 | /* |
| 83 | * Op: Sets plane alpha |
| 84 | * Arg: uint32_t - Plane ID |
| 85 | * uint32_t - alpha value |
| 86 | */ |
| 87 | PLANE_SET_ALPHA, |
| 88 | /* |
| 89 | * Op: Sets the blend type |
| 90 | * Arg: uint32_t - Plane ID |
| 91 | * uint32_t - blend type (see DRMBlendType) |
| 92 | */ |
| 93 | PLANE_SET_BLEND_TYPE, |
| 94 | /* |
| 95 | * Op: Sets horizontal decimation |
| 96 | * Arg: uint32_t - Plane ID |
| 97 | * uint32_t - decimation factor |
| 98 | */ |
| 99 | PLANE_SET_H_DECIMATION, |
| 100 | /* |
| 101 | * Op: Sets vertical decimation |
| 102 | * Arg: uint32_t - Plane ID |
| 103 | * uint32_t - decimation factor |
| 104 | */ |
| 105 | PLANE_SET_V_DECIMATION, |
| 106 | /* |
Prabhanjan Kandula | 585aa65 | 2017-01-26 18:39:11 -0800 | [diff] [blame] | 107 | * Op: Sets source config flags |
| 108 | * Arg: uint32_t - Plane ID |
| 109 | * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing |
| 110 | */ |
| 111 | PLANE_SET_SRC_CONFIG, |
| 112 | /* |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 113 | * Op: Sets frame buffer ID for plane. Set together with CRTC. |
| 114 | * Arg: uint32_t - Plane ID |
| 115 | * uint32_t - Framebuffer ID |
| 116 | */ |
| 117 | PLANE_SET_FB_ID, |
| 118 | /* |
| 119 | * Op: Sets the crtc for this plane. Set together with FB_ID. |
| 120 | * Arg: uint32_t - Plane ID |
| 121 | * uint32_t - CRTC ID |
| 122 | */ |
| 123 | PLANE_SET_CRTC, |
| 124 | /* |
| 125 | * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC. |
| 126 | * Arg: uint32_t - Plane ID |
| 127 | * uint32_t - Input fence |
| 128 | */ |
| 129 | PLANE_SET_INPUT_FENCE, |
| 130 | /* |
Saurabh Shah | 0ffee30 | 2016-11-22 10:42:11 -0800 | [diff] [blame] | 131 | * Op: Sets scaler config on this plane. |
| 132 | * Arg: uint32_t - Plane ID |
| 133 | * uint64_t - Address of the scaler config object (version based) |
| 134 | */ |
| 135 | PLANE_SET_SCALER_CONFIG, |
| 136 | /* |
Rohit Kulkarni | 8622e36 | 2017-01-30 18:14:10 -0800 | [diff] [blame] | 137 | * Op: Sets plane rotation destination rect |
| 138 | * Arg: uint32_t - Plane ID |
| 139 | * DRMRect - rotator dst Rectangle |
| 140 | */ |
| 141 | PLANE_SET_ROTATION_DST_RECT, |
| 142 | /* |
Sushil Chauhan | 1021cc0 | 2017-05-03 15:11:43 -0700 | [diff] [blame] | 143 | * Op: Sets FB Secure mode for this plane. |
| 144 | * Arg: uint32_t - Plane ID |
| 145 | * uint32_t - Value of the FB Secure mode. |
| 146 | */ |
| 147 | PLANE_SET_FB_SECURE_MODE, |
| 148 | /* |
Ping Li | 8d6dd62 | 2017-07-03 12:05:15 -0700 | [diff] [blame] | 149 | * Op: Sets csc config on this plane. |
| 150 | * Arg: uint32_t - Plane ID |
| 151 | * uint32_t* - pointer to csc type |
| 152 | */ |
| 153 | PLANE_SET_CSC_CONFIG, |
| 154 | /* |
Ramkumar Radhakrishnan | 0725430 | 2017-11-13 16:18:22 -0800 | [diff] [blame] | 155 | * Op: Sets multirect mode on this plane. |
| 156 | * Arg: uint32_t - Plane ID |
| 157 | * uint32_t - multirect mode |
| 158 | */ |
| 159 | PLANE_SET_MULTIRECT_MODE, |
| 160 | /* |
Rohit Kulkarni | 2d7151c | 2017-12-14 22:17:49 -0800 | [diff] [blame] | 161 | * Op: Sets rotator output frame buffer ID for plane. |
| 162 | * Arg: uint32_t - Plane ID |
| 163 | * uint32_t - Framebuffer ID |
| 164 | */ |
| 165 | PLANE_SET_ROT_FB_ID, |
| 166 | /* |
Arun Kumar K.R | 5d30ab5 | 2017-12-28 09:05:36 +0530 | [diff] [blame] | 167 | * Op: Sets inverse pma mode on this plane. |
| 168 | * Arg: uint32_t - Plane ID |
| 169 | * uint32_t - enable/disable inverse pma. |
| 170 | */ |
| 171 | PLANE_SET_INVERSE_PMA, |
| 172 | /* |
| 173 | * Op: Sets csc config on this plane. |
| 174 | * Arg: uint32_t - Plane ID |
| 175 | * uint64_t - Address of the csc config object(version based) |
| 176 | */ |
| 177 | PLANE_SET_DGM_CSC_CONFIG, |
| 178 | /* |
| 179 | * Op: Sets SSPP Feature |
| 180 | * Arg: uint32_t - Plane ID |
| 181 | * DRMPPFeatureInfo * - PP feature data pointer |
| 182 | */ |
| 183 | PLANE_SET_POST_PROC, |
| 184 | /* |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 185 | * Op: Activate or deactivate a CRTC |
| 186 | * Arg: uint32_t - CRTC ID |
| 187 | * uint32_t - 1 to enable, 0 to disable |
| 188 | */ |
| 189 | CRTC_SET_ACTIVE, |
| 190 | /* |
| 191 | * Op: Sets display mode |
| 192 | * Arg: uint32_t - CRTC ID |
| 193 | * drmModeModeInfo* - Pointer to display mode |
| 194 | */ |
| 195 | CRTC_SET_MODE, |
| 196 | /* |
| 197 | * Op: Sets an offset indicating when a release fence should be signalled. |
| 198 | * Arg: uint32_t - offset |
| 199 | * 0: non-speculative, default |
| 200 | * 1: speculative |
| 201 | */ |
| 202 | CRTC_SET_OUTPUT_FENCE_OFFSET, |
| 203 | /* |
Ramkumar Radhakrishnan | 9ed1fd8 | 2017-03-09 18:46:41 -0800 | [diff] [blame] | 204 | * Op: Sets overall SDE core clock |
| 205 | * Arg: uint32_t - CRTC ID |
| 206 | * uint32_t - core_clk |
| 207 | */ |
| 208 | CRTC_SET_CORE_CLK, |
Ramkumar Radhakrishnan | 3c4de11 | 2017-05-24 22:38:30 -0700 | [diff] [blame] | 209 | /* |
| 210 | * Op: Sets MNOC bus average bandwidth |
Ramkumar Radhakrishnan | 9ed1fd8 | 2017-03-09 18:46:41 -0800 | [diff] [blame] | 211 | * Arg: uint32_t - CRTC ID |
| 212 | * uint32_t - core_ab |
| 213 | */ |
| 214 | CRTC_SET_CORE_AB, |
| 215 | /* |
Ramkumar Radhakrishnan | 3c4de11 | 2017-05-24 22:38:30 -0700 | [diff] [blame] | 216 | * Op: Sets MNOC bus instantaneous bandwidth |
Ramkumar Radhakrishnan | 9ed1fd8 | 2017-03-09 18:46:41 -0800 | [diff] [blame] | 217 | * Arg: uint32_t - CRTC ID |
| 218 | * uint32_t - core_ib |
| 219 | */ |
| 220 | CRTC_SET_CORE_IB, |
| 221 | /* |
Ramkumar Radhakrishnan | 3c4de11 | 2017-05-24 22:38:30 -0700 | [diff] [blame] | 222 | * Op: Sets LLCC Bus average bandwidth |
| 223 | * Arg: uint32_t - CRTC ID |
| 224 | * uint32_t - llcc_ab |
| 225 | */ |
| 226 | CRTC_SET_LLCC_AB, |
| 227 | /* |
| 228 | * Op: Sets LLCC Bus instantaneous bandwidth |
| 229 | * Arg: uint32_t - CRTC ID |
| 230 | * uint32_t - llcc_ib |
| 231 | */ |
| 232 | CRTC_SET_LLCC_IB, |
| 233 | /* |
| 234 | * Op: Sets DRAM bus average bandwidth |
| 235 | * Arg: uint32_t - CRTC ID |
| 236 | * uint32_t - dram_ab |
| 237 | */ |
| 238 | CRTC_SET_DRAM_AB, |
| 239 | /* |
| 240 | * Op: Sets DRAM bus instantaneous bandwidth |
| 241 | * Arg: uint32_t - CRTC ID |
| 242 | * uint32_t - dram_ib |
| 243 | */ |
| 244 | CRTC_SET_DRAM_IB, |
| 245 | /* |
Ramkumar Radhakrishnan | b791044 | 2017-12-11 13:32:47 -0800 | [diff] [blame] | 246 | * Op: Sets Rotator BW for inline rotation |
| 247 | * Arg: uint32_t - CRTC ID |
| 248 | * uint32_t - rot_bw |
| 249 | */ |
| 250 | CRTC_SET_ROT_PREFILL_BW, |
| 251 | /* |
Ramkumar Radhakrishnan | 3c4de11 | 2017-05-24 22:38:30 -0700 | [diff] [blame] | 252 | * Op: Sets rotator clock for inline rotation |
| 253 | * Arg: uint32_t - CRTC ID |
| 254 | * uint32_t - rot_clk |
| 255 | */ |
Namit Solanki | 24921ab | 2017-05-23 20:16:25 +0530 | [diff] [blame] | 256 | CRTC_SET_ROT_CLK, |
| 257 | /* |
| 258 | * Op: Sets destination scalar data |
| 259 | * Arg: uint32_t - CRTC ID |
| 260 | * uint64_t - Pointer to destination scalar data |
| 261 | */ |
| 262 | CRTC_SET_DEST_SCALER_CONFIG, |
| 263 | /* |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 264 | * Op: Returns release fence for this frame. Should be called after Commit() on |
| 265 | * DRMAtomicReqInterface. |
| 266 | * Arg: uint32_t - CRTC ID |
| 267 | * int * - Pointer to an integer that will hold the returned fence |
| 268 | */ |
| 269 | CRTC_GET_RELEASE_FENCE, |
| 270 | /* |
Ping Li | 281f48d | 2017-01-16 12:45:40 -0800 | [diff] [blame] | 271 | * Op: Sets PP feature |
| 272 | * Arg: uint32_t - CRTC ID |
| 273 | * DRMPPFeatureInfo * - PP feature data pointer |
| 274 | */ |
| 275 | CRTC_SET_POST_PROC, |
| 276 | /* |
Saurabh Shah | e9f55d7 | 2017-03-03 15:14:13 -0800 | [diff] [blame] | 277 | * Op: Sets CRTC ROIs. |
| 278 | * Arg: uint32_t - CRTC ID |
| 279 | * uint32_t - number of ROIs |
| 280 | * DRMRect * - Array of CRTC ROIs |
| 281 | */ |
| 282 | CRTC_SET_ROI, |
| 283 | /* |
Sushil Chauhan | 1021cc0 | 2017-05-03 15:11:43 -0700 | [diff] [blame] | 284 | * Op: Sets Security level for CRTC. |
| 285 | * Arg: uint32_t - CRTC ID |
| 286 | * uint32_t - Security level |
| 287 | */ |
| 288 | CRTC_SET_SECURITY_LEVEL, |
| 289 | /* |
Prabhanjan Kandula | dbc8aed | 2017-03-24 14:43:16 -0700 | [diff] [blame] | 290 | * Op: sets solid fill stages |
| 291 | * Arg: uint32_t - CRTC ID |
| 292 | * Vector of DRMSolidfillStage |
| 293 | */ |
| 294 | CRTC_SET_SOLIDFILL_STAGES, |
| 295 | /* |
Anjaneya Prasad Musunuri | e8c67f2 | 2017-07-01 16:16:13 +0530 | [diff] [blame] | 296 | * Op: Sets idle timeout. |
| 297 | * Arg: uint32_t - CRTC ID |
| 298 | * uint32_t - idle timeout in ms |
| 299 | */ |
| 300 | CRTC_SET_IDLE_TIMEOUT, |
| 301 | /* |
Sushil Chauhan | 741ac31 | 2018-04-02 12:22:16 -0700 | [diff] [blame] | 302 | * Op: Sets Capture mode for Concurrent Writeback feature. |
| 303 | * Arg: uint32_t - CRTC ID |
| 304 | * uint32_t - Capture mode |
| 305 | */ |
| 306 | CRTC_SET_CAPTURE_MODE, |
| 307 | /* |
Ramkumar Radhakrishnan | f985d48 | 2018-07-23 18:10:41 -0700 | [diff] [blame] | 308 | * Op: Sets Idle PC state for CRTC. |
| 309 | * Arg: uint32_t - CRTC ID |
| 310 | * uint32_t - idle pc state |
| 311 | */ |
| 312 | CRTC_SET_IDLE_PC_STATE, |
| 313 | /* |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 314 | * Op: Returns retire fence for this commit. Should be called after Commit() on |
| 315 | * DRMAtomicReqInterface. |
| 316 | * Arg: uint32_t - Connector ID |
| 317 | * int * - Pointer to an integer that will hold the returned fence |
| 318 | */ |
| 319 | CONNECTOR_GET_RETIRE_FENCE, |
| 320 | /* |
| 321 | * Op: Sets writeback connector destination rect |
| 322 | * Arg: uint32_t - Connector ID |
| 323 | * DRMRect - Dst Rectangle |
| 324 | */ |
| 325 | CONNECTOR_SET_OUTPUT_RECT, |
| 326 | /* |
| 327 | * Op: Sets frame buffer ID for writeback connector. |
| 328 | * Arg: uint32_t - Connector ID |
| 329 | * uint32_t - Framebuffer ID |
| 330 | */ |
| 331 | CONNECTOR_SET_OUTPUT_FB_ID, |
Sushil Chauhan | 3396e20 | 2017-04-14 18:34:22 -0700 | [diff] [blame] | 332 | /* |
| 333 | * Op: Sets power mode for connector. |
| 334 | * Arg: uint32_t - Connector ID |
| 335 | * uint32_t - Power Mode |
| 336 | */ |
| 337 | CONNECTOR_SET_POWER_MODE, |
Saurabh Shah | e9f55d7 | 2017-03-03 15:14:13 -0800 | [diff] [blame] | 338 | /* |
| 339 | * Op: Sets panel ROIs. |
| 340 | * Arg: uint32_t - Connector ID |
| 341 | * uint32_t - number of ROIs |
| 342 | * DRMRect * - Array of Connector ROIs |
| 343 | */ |
| 344 | CONNECTOR_SET_ROI, |
Sushil Chauhan | e2f89c9 | 2017-08-23 11:30:34 -0700 | [diff] [blame] | 345 | /* |
Saurabh Shah | f363595 | 2017-10-16 17:08:18 -0700 | [diff] [blame] | 346 | * Op: Sets the connector to autorefresh mode. |
| 347 | * Arg: uint32_t - Connector ID |
| 348 | * uint32_t - Enable-1, Disable-0 |
| 349 | */ |
| 350 | CONNECTOR_SET_AUTOREFRESH, |
| 351 | /* |
Sushil Chauhan | e2f89c9 | 2017-08-23 11:30:34 -0700 | [diff] [blame] | 352 | * Op: Set FB secure mode for Writeback connector. |
| 353 | * Arg: uint32_t - Connector ID |
| 354 | * uint32_t - FB Secure mode |
| 355 | */ |
| 356 | CONNECTOR_SET_FB_SECURE_MODE, |
Saurabh Shah | 82b06f4 | 2017-09-06 16:43:49 -0700 | [diff] [blame] | 357 | /* |
| 358 | * Op: Sets a crtc id to this connector |
| 359 | * Arg: uint32_t - Connector ID |
| 360 | * uint32_t - CRTC ID |
| 361 | */ |
| 362 | CONNECTOR_SET_CRTC, |
Srikanth Rajagopalan | 7a09b2e | 2017-06-19 18:41:03 -0700 | [diff] [blame] | 363 | /* |
Gopikrishnaiah Anandan | 739faf9 | 2017-07-21 12:32:00 -0700 | [diff] [blame] | 364 | * Op: Sets PP feature |
| 365 | * Arg: uint32_t - Connector ID |
| 366 | * DRMPPFeatureInfo * - PP feature data pointer |
| 367 | */ |
Xu Yang | 32e58c2 | 2017-11-20 09:58:11 +0800 | [diff] [blame] | 368 | CONNECTOR_SET_POST_PROC, |
Gopikrishnaiah Anandan | 739faf9 | 2017-07-21 12:32:00 -0700 | [diff] [blame] | 369 | /* |
Srikanth Rajagopalan | 7a09b2e | 2017-06-19 18:41:03 -0700 | [diff] [blame] | 370 | * Op: Sets connector hdr metadata |
| 371 | * Arg: uint32_t - Connector ID |
| 372 | * drm_msm_ext_hdr_metadata - hdr_metadata |
| 373 | */ |
| 374 | CONNECTOR_SET_HDR_METADATA, |
Xu Yang | 32e58c2 | 2017-11-20 09:58:11 +0800 | [diff] [blame] | 375 | /* |
| 376 | * Op: Cache Dpps features. |
| 377 | * Arg: uint32_t - Object ID |
| 378 | uint32_t - Feature ID |
| 379 | * uint64_t - Pointer to feature config data |
| 380 | */ |
| 381 | DPPS_CACHE_FEATURE, |
Xu Yang | da64222 | 2018-06-12 10:32:33 +0800 | [diff] [blame] | 382 | /* |
| 383 | * Op: Commit Dpps features. |
| 384 | * Arg: drmModeAtomicReq - Atomic request |
| 385 | */ |
| 386 | DPPS_COMMIT_FEATURE, |
Sushil Chauhan | 8f514a5 | 2018-02-27 17:35:44 -0800 | [diff] [blame] | 387 | /* |
| 388 | * Op: Sets qsync mode on connector |
| 389 | * Arg: uint32_t - Connector ID |
| 390 | * uint32_t - qsync mode |
| 391 | */ |
| 392 | CONNECTOR_SET_QSYNC_MODE, |
Mathew Joseph Karimpanal | b7f20c6 | 2018-10-09 12:17:20 +0530 | [diff] [blame] | 393 | /* |
| 394 | * Op: Sets topology control on this connector |
| 395 | * Arg: uint32_t - Connector ID |
| 396 | * uint32_t - Topology control bit-mask |
| 397 | */ |
| 398 | CONNECTOR_SET_TOPOLOGY_CONTROL, |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 399 | }; |
| 400 | |
Saurabh Shah | f9266ee | 2017-04-19 15:25:46 -0700 | [diff] [blame] | 401 | enum struct DRMRotation { |
| 402 | FLIP_H = 0x1, |
| 403 | FLIP_V = 0x2, |
Prabhanjan Kandula | 5bc7f8b | 2017-05-23 12:24:57 -0700 | [diff] [blame] | 404 | ROT_180 = FLIP_H | FLIP_V, |
Saurabh Shah | f9266ee | 2017-04-19 15:25:46 -0700 | [diff] [blame] | 405 | ROT_90 = 0x4, |
| 406 | }; |
| 407 | |
Sushil Chauhan | 3396e20 | 2017-04-14 18:34:22 -0700 | [diff] [blame] | 408 | enum struct DRMPowerMode { |
| 409 | ON, |
| 410 | DOZE, |
| 411 | DOZE_SUSPEND, |
| 412 | OFF, |
| 413 | }; |
| 414 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 415 | enum struct DRMBlendType { |
| 416 | UNDEFINED = 0, |
| 417 | OPAQUE = 1, |
| 418 | PREMULTIPLIED = 2, |
| 419 | COVERAGE = 3, |
| 420 | }; |
| 421 | |
Prabhanjan Kandula | 585aa65 | 2017-01-26 18:39:11 -0800 | [diff] [blame] | 422 | enum struct DRMSrcConfig { |
| 423 | DEINTERLACE = 0, |
| 424 | }; |
| 425 | |
Ramkumar Radhakrishnan | f985d48 | 2018-07-23 18:10:41 -0700 | [diff] [blame] | 426 | enum struct DRMIdlePCState { |
| 427 | NONE, |
| 428 | ENABLE, |
| 429 | DISABLE, |
| 430 | }; |
| 431 | |
| 432 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 433 | /* Display type to identify a suitable connector */ |
| 434 | enum struct DRMDisplayType { |
| 435 | PERIPHERAL, |
| 436 | TV, |
| 437 | VIRTUAL, |
| 438 | }; |
| 439 | |
| 440 | struct DRMRect { |
| 441 | uint32_t left; // Left-most pixel coordinate. |
| 442 | uint32_t top; // Top-most pixel coordinate. |
| 443 | uint32_t right; // Right-most pixel coordinate. |
| 444 | uint32_t bottom; // Bottom-most pixel coordinate. |
| 445 | }; |
| 446 | |
| 447 | //------------------------------------------------------------------------ |
| 448 | // DRM Info Query Types |
| 449 | //------------------------------------------------------------------------ |
| 450 | |
| 451 | enum struct QSEEDVersion { |
| 452 | V1, |
| 453 | V2, |
| 454 | V3, |
Ramakant Singh | 1ba882f | 2018-06-06 10:23:21 +0530 | [diff] [blame] | 455 | V3LITE, |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 456 | }; |
| 457 | |
Rohit Kulkarni | bfa855c | 2017-06-29 17:52:10 -0700 | [diff] [blame] | 458 | /* QSEED3 Step version */ |
| 459 | enum struct QSEEDStepVersion { |
| 460 | V2, |
| 461 | V3, |
| 462 | V4, |
Ramakant Singh | 1ba882f | 2018-06-06 10:23:21 +0530 | [diff] [blame] | 463 | V3LITE_V4, |
| 464 | V3LITE_V5, |
Rohit Kulkarni | bfa855c | 2017-06-29 17:52:10 -0700 | [diff] [blame] | 465 | }; |
| 466 | |
Prabhanjan Kandula | e6dfab9 | 2017-03-14 11:02:49 -0700 | [diff] [blame] | 467 | enum struct SmartDMARevision { |
| 468 | V1, |
| 469 | V2, |
Mathew Joseph Karimpanal | 1f8a21c | 2017-10-20 20:47:42 +0530 | [diff] [blame] | 470 | V2p5 |
Prabhanjan Kandula | e6dfab9 | 2017-03-14 11:02:49 -0700 | [diff] [blame] | 471 | }; |
| 472 | |
Rohit Kulkarni | 2d7151c | 2017-12-14 22:17:49 -0800 | [diff] [blame] | 473 | /* Inline Rotation version */ |
| 474 | enum struct InlineRotationVersion { |
| 475 | UNKNOWN, |
| 476 | V1, |
| 477 | V1p1, // Rotator FB ID needs to be set |
| 478 | }; |
| 479 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 480 | /* Per CRTC Resource Info*/ |
| 481 | struct DRMCrtcInfo { |
| 482 | bool has_src_split; |
Srikanth Rajagopalan | 4938078 | 2017-07-06 15:23:12 -0700 | [diff] [blame] | 483 | bool has_hdr; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 484 | uint32_t max_blend_stages; |
Prabhanjan Kandula | dbc8aed | 2017-03-24 14:43:16 -0700 | [diff] [blame] | 485 | uint32_t max_solidfill_stages; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 486 | QSEEDVersion qseed_version; |
Prabhanjan Kandula | e6dfab9 | 2017-03-14 11:02:49 -0700 | [diff] [blame] | 487 | SmartDMARevision smart_dma_rev; |
Ramkumar Radhakrishnan | 9ed1fd8 | 2017-03-09 18:46:41 -0800 | [diff] [blame] | 488 | float ib_fudge_factor; |
| 489 | float clk_fudge_factor; |
| 490 | uint32_t dest_scale_prefill_lines; |
| 491 | uint32_t undersized_prefill_lines; |
| 492 | uint32_t macrotile_prefill_lines; |
| 493 | uint32_t nv12_prefill_lines; |
| 494 | uint32_t linear_prefill_lines; |
| 495 | uint32_t downscale_prefill_lines; |
| 496 | uint32_t extra_prefill_lines; |
| 497 | uint32_t amortized_threshold; |
| 498 | uint64_t max_bandwidth_low; |
| 499 | uint64_t max_bandwidth_high; |
| 500 | uint32_t max_sde_clk; |
| 501 | CompRatioMap comp_ratio_rt_map; |
| 502 | CompRatioMap comp_ratio_nrt_map; |
Gopikrishnaiah Anandan | 7681552 | 2017-06-27 15:18:04 -0700 | [diff] [blame] | 503 | uint32_t hw_version; |
Namit Solanki | 24921ab | 2017-05-23 20:16:25 +0530 | [diff] [blame] | 504 | uint32_t dest_scaler_count = 0; |
| 505 | uint32_t max_dest_scaler_input_width = 0; |
| 506 | uint32_t max_dest_scaler_output_width = 0; |
| 507 | uint32_t max_dest_scale_up = 1; |
Pullakavi Srinivas | 3e2c040 | 2017-12-05 17:50:15 +0530 | [diff] [blame] | 508 | uint32_t min_prefill_lines = 0; |
Ramkumar Radhakrishnan | a38b760 | 2018-03-15 14:49:52 -0700 | [diff] [blame] | 509 | int secure_disp_blend_stage = -1; |
Sushil Chauhan | c75358e | 2018-04-24 14:36:38 -0700 | [diff] [blame] | 510 | bool concurrent_writeback = false; |
Pullakavi Srinivas | dfae05c | 2019-02-22 14:56:22 +0530 | [diff] [blame] | 511 | uint32_t num_mnocports; |
| 512 | uint32_t mnoc_bus_width; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 513 | }; |
| 514 | |
| 515 | enum struct DRMPlaneType { |
| 516 | // Has CSC and scaling capability |
| 517 | VIG = 0, |
| 518 | // Has scaling capability but no CSC |
| 519 | RGB, |
| 520 | // No scaling support |
| 521 | DMA, |
| 522 | // Supports a small dimension and doesn't use a CRTC stage |
| 523 | CURSOR, |
| 524 | MAX, |
| 525 | }; |
| 526 | |
Arun Kumar K.R | 5d30ab5 | 2017-12-28 09:05:36 +0530 | [diff] [blame] | 527 | enum struct DRMTonemapLutType { |
| 528 | DMA_1D_GC, |
| 529 | DMA_1D_IGC, |
| 530 | VIG_1D_IGC, |
| 531 | VIG_3D_GAMUT, |
| 532 | }; |
| 533 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 534 | struct DRMPlaneTypeInfo { |
Prabhanjan Kandula | e6dfab9 | 2017-03-14 11:02:49 -0700 | [diff] [blame] | 535 | DRMPlaneType type; |
| 536 | uint32_t master_plane_id; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 537 | // FourCC format enum and modifier |
| 538 | std::vector<std::pair<uint32_t, uint64_t>> formats_supported; |
| 539 | uint32_t max_linewidth; |
Mathew Joseph Karimpanal | 1f8a21c | 2017-10-20 20:47:42 +0530 | [diff] [blame] | 540 | uint32_t max_scaler_linewidth; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 541 | uint32_t max_upscale; |
| 542 | uint32_t max_downscale; |
| 543 | uint32_t max_horizontal_deci; |
| 544 | uint32_t max_vertical_deci; |
Ramkumar Radhakrishnan | 9ed1fd8 | 2017-03-09 18:46:41 -0800 | [diff] [blame] | 545 | uint64_t max_pipe_bandwidth; |
Rohit Kulkarni | 8622e36 | 2017-01-30 18:14:10 -0800 | [diff] [blame] | 546 | uint32_t cache_size; // cache size in bytes for inline rotation support. |
Namit Solanki | 6d0d806 | 2017-11-30 17:29:48 +0530 | [diff] [blame] | 547 | bool has_excl_rect = false; |
Rohit Kulkarni | bfa855c | 2017-06-29 17:52:10 -0700 | [diff] [blame] | 548 | QSEEDStepVersion qseed3_version; |
Ramkumar Radhakrishnan | 0725430 | 2017-11-13 16:18:22 -0800 | [diff] [blame] | 549 | bool multirect_prop_present = false; |
Rohit Kulkarni | 2d7151c | 2017-12-14 22:17:49 -0800 | [diff] [blame] | 550 | InlineRotationVersion inrot_version; // inline rotation version |
Arun Kumar K.R | 5d30ab5 | 2017-12-28 09:05:36 +0530 | [diff] [blame] | 551 | bool inverse_pma = false; |
| 552 | uint32_t dgm_csc_version = 0; // csc used with DMA |
| 553 | std::map<DRMTonemapLutType, uint32_t> tonemap_lut_version_map = {}; |
Ramkumar Radhakrishnan | 4a26975 | 2018-03-08 14:53:15 -0800 | [diff] [blame] | 554 | bool block_sec_ui = false; |
Camus Wong | b116aa4 | 2018-12-18 19:50:54 -0500 | [diff] [blame] | 555 | // Allow all planes to be usable on all displays by default |
| 556 | std::bitset<32> hw_block_mask = std::bitset<32>().set(); |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 557 | }; |
| 558 | |
Prabhanjan Kandula | e6dfab9 | 2017-03-14 11:02:49 -0700 | [diff] [blame] | 559 | // All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority |
| 560 | typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 561 | |
| 562 | enum struct DRMTopology { |
Rohit Kulkarni | 2faa91c | 2017-06-05 15:43:48 -0700 | [diff] [blame] | 563 | UNKNOWN, // To be compat with driver defs in sde_rm.h |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 564 | SINGLE_LM, |
Rohit Kulkarni | 2faa91c | 2017-06-05 15:43:48 -0700 | [diff] [blame] | 565 | SINGLE_LM_DSC, |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 566 | DUAL_LM, |
Rohit Kulkarni | 2faa91c | 2017-06-05 15:43:48 -0700 | [diff] [blame] | 567 | DUAL_LM_DSC, |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 568 | DUAL_LM_MERGE, |
Rohit Kulkarni | 2faa91c | 2017-06-05 15:43:48 -0700 | [diff] [blame] | 569 | DUAL_LM_MERGE_DSC, |
| 570 | DUAL_LM_DSCMERGE, |
| 571 | PPSPLIT, |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 572 | }; |
| 573 | |
| 574 | enum struct DRMPanelMode { |
| 575 | VIDEO, |
| 576 | COMMAND, |
| 577 | }; |
| 578 | |
Saurabh Shah | 7e16c93 | 2017-11-03 17:55:36 -0700 | [diff] [blame] | 579 | /* Per mode info */ |
| 580 | struct DRMModeInfo { |
| 581 | drmModeModeInfo mode; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 582 | DRMTopology topology; |
Saurabh Shah | e9f55d7 | 2017-03-03 15:14:13 -0800 | [diff] [blame] | 583 | // Valid only if mode is command |
| 584 | int num_roi; |
| 585 | int xstart; |
| 586 | int ystart; |
| 587 | int walign; |
| 588 | int halign; |
| 589 | int wmin; |
| 590 | int hmin; |
| 591 | bool roi_merge; |
Pullakavi Srinivas | 9189e60 | 2018-12-19 16:58:07 +0530 | [diff] [blame] | 592 | uint64_t bit_clk_rate; |
Mahesh Aia | 25b2271 | 2019-01-04 11:49:46 -0800 | [diff] [blame] | 593 | uint32_t transfer_time_us; |
Saurabh Shah | 7e16c93 | 2017-11-03 17:55:36 -0700 | [diff] [blame] | 594 | }; |
| 595 | |
| 596 | /* Per Connector Info*/ |
| 597 | struct DRMConnectorInfo { |
| 598 | uint32_t mmWidth; |
| 599 | uint32_t mmHeight; |
| 600 | uint32_t type; |
| 601 | std::vector<DRMModeInfo> modes; |
| 602 | std::string panel_name; |
| 603 | DRMPanelMode panel_mode; |
| 604 | bool is_primary; |
| 605 | // Valid only if DRMPanelMode is VIDEO |
| 606 | bool dynamic_fps; |
| 607 | // FourCC format enum and modifier |
| 608 | std::vector<std::pair<uint32_t, uint64_t>> formats_supported; |
| 609 | // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL |
| 610 | uint32_t max_linewidth; |
Prabhanjan Kandula | 5bc7f8b | 2017-05-23 12:24:57 -0700 | [diff] [blame] | 611 | DRMRotation panel_orientation; |
Sushil Chauhan | 80e5843 | 2017-07-06 11:39:17 -0700 | [diff] [blame] | 612 | drm_panel_hdr_properties panel_hdr_prop; |
Srikanth Rajagopalan | ce0f7cb | 2017-06-12 15:14:26 -0700 | [diff] [blame] | 613 | drm_msm_ext_hdr_properties ext_hdr_prop; |
Sushil Chauhan | 8f514a5 | 2018-02-27 17:35:44 -0800 | [diff] [blame] | 614 | bool qsync_support; |
Mathew Joseph Karimpanal | 731bc93 | 2017-11-22 10:04:56 +0530 | [diff] [blame] | 615 | // Connection status of this connector |
| 616 | bool is_connected; |
Ramakant Singh | dbe738a | 2018-08-23 23:57:07 +0530 | [diff] [blame] | 617 | bool is_wb_ubwc_supported; |
Mathew Joseph Karimpanal | b7f20c6 | 2018-10-09 12:17:20 +0530 | [diff] [blame] | 618 | uint32_t topology_control; |
Pullakavi Srinivas | 9189e60 | 2018-12-19 16:58:07 +0530 | [diff] [blame] | 619 | bool dyn_bitclk_support; |
Varun Arora | 771fcd2 | 2019-02-07 18:08:18 -0800 | [diff] [blame] | 620 | std::vector<uint8_t> edid; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 621 | }; |
| 622 | |
Mathew Joseph Karimpanal | 731bc93 | 2017-11-22 10:04:56 +0530 | [diff] [blame] | 623 | // All DRM Connectors as map<Connector_id , connector_info> |
| 624 | typedef std::map<uint32_t, DRMConnectorInfo> DRMConnectorsInfo; |
| 625 | |
| 626 | /* Per Encoder Info */ |
| 627 | struct DRMEncoderInfo { |
| 628 | uint32_t type; |
| 629 | }; |
| 630 | |
| 631 | // All DRM Encoders as map<Encoder_id , encoder_info> |
| 632 | typedef std::map<uint32_t, DRMEncoderInfo> DRMEncodersInfo; |
| 633 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 634 | /* Identifier token for a display */ |
| 635 | struct DRMDisplayToken { |
| 636 | uint32_t conn_id; |
| 637 | uint32_t crtc_id; |
Saurabh Shah | f822671 | 2018-02-05 15:51:53 -0800 | [diff] [blame] | 638 | uint32_t crtc_index; |
Mathew Joseph Karimpanal | 731bc93 | 2017-11-22 10:04:56 +0530 | [diff] [blame] | 639 | uint32_t encoder_id; |
Varun Arora | 771fcd2 | 2019-02-07 18:08:18 -0800 | [diff] [blame] | 640 | uint8_t hw_port; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 641 | }; |
| 642 | |
Ping Li | 281f48d | 2017-01-16 12:45:40 -0800 | [diff] [blame] | 643 | enum DRMPPFeatureID { |
| 644 | kFeaturePcc, |
| 645 | kFeatureIgc, |
| 646 | kFeaturePgc, |
| 647 | kFeatureMixerGc, |
| 648 | kFeaturePaV2, |
| 649 | kFeatureDither, |
| 650 | kFeatureGamut, |
| 651 | kFeaturePADither, |
Rajesh Yadav | d30b0cc | 2017-09-22 00:26:54 +0530 | [diff] [blame] | 652 | kFeaturePAHsic, |
| 653 | kFeaturePASixZone, |
Rajesh Yadav | 99535ac | 2017-08-28 16:33:04 +0530 | [diff] [blame] | 654 | kFeaturePAMemColSkin, |
| 655 | kFeaturePAMemColSky, |
| 656 | kFeaturePAMemColFoliage, |
| 657 | kFeaturePAMemColProt, |
Rajesh Yadav | c4f67b8 | 2017-11-15 20:37:13 +0530 | [diff] [blame] | 658 | kFeatureDgmIgc, |
| 659 | kFeatureDgmGc, |
| 660 | kFeatureVigIgc, |
| 661 | kFeatureVigGamut, |
Ping Li | 281f48d | 2017-01-16 12:45:40 -0800 | [diff] [blame] | 662 | kPPFeaturesMax, |
| 663 | }; |
| 664 | |
| 665 | enum DRMPPPropType { |
| 666 | kPropEnum, |
| 667 | kPropRange, |
| 668 | kPropBlob, |
| 669 | kPropTypeMax, |
| 670 | }; |
| 671 | |
| 672 | struct DRMPPFeatureInfo { |
| 673 | DRMPPFeatureID id; |
| 674 | DRMPPPropType type; |
| 675 | uint32_t version; |
| 676 | uint32_t payload_size; |
| 677 | void *payload; |
Gopikrishnaiah Anandan | 739faf9 | 2017-07-21 12:32:00 -0700 | [diff] [blame] | 678 | uint32_t object_type; |
Ping Li | 281f48d | 2017-01-16 12:45:40 -0800 | [diff] [blame] | 679 | }; |
| 680 | |
Xu Yang | 32e58c2 | 2017-11-20 09:58:11 +0800 | [diff] [blame] | 681 | enum DRMDPPSFeatureID { |
| 682 | // Ad4 properties |
| 683 | kFeatureAd4Mode, |
| 684 | kFeatureAd4Init, |
| 685 | kFeatureAd4Cfg, |
| 686 | kFeatureAd4Input, |
Yuchao Ma | 577f0f7 | 2018-07-09 11:20:00 +0800 | [diff] [blame] | 687 | kFeatureAd4Roi, |
Xu Yang | 32e58c2 | 2017-11-20 09:58:11 +0800 | [diff] [blame] | 688 | kFeatureAd4Backlight, |
| 689 | kFeatureAd4Assertiveness, |
| 690 | kFeatureAd4ManualStrength, |
| 691 | // ABA properties |
| 692 | kFeatureAbaHistCtrl, |
| 693 | kFeatureAbaHistIRQ, |
| 694 | kFeatureAbaLut, |
| 695 | // BL scale properties |
| 696 | kFeatureAd4BlScale, |
| 697 | kFeatureBacklightScale, |
| 698 | // Events |
| 699 | kFeaturePowerEvent, |
| 700 | kFeatureAbaHistEvent, |
| 701 | kFeatureBackLightEvent, |
| 702 | kFeatureAdAttBlEvent, |
| 703 | // Insert features above |
| 704 | kDppsFeaturesMax, |
| 705 | }; |
| 706 | |
Ping Li | 6a74d89 | 2018-05-02 15:54:58 -0700 | [diff] [blame] | 707 | struct DppsFeaturePayload { |
| 708 | uint32_t object_type; |
| 709 | uint32_t feature_id; |
| 710 | uint64_t value; |
| 711 | }; |
| 712 | |
Xu Yang | 32e58c2 | 2017-11-20 09:58:11 +0800 | [diff] [blame] | 713 | struct DRMDppsFeatureInfo { |
| 714 | DRMDPPSFeatureID id; |
| 715 | uint32_t version; |
| 716 | }; |
| 717 | |
| 718 | enum AD4Modes { |
| 719 | kAd4Off, |
| 720 | kAd4AutoStrength, |
| 721 | kAd4Calibration, |
| 722 | kAd4Manual, |
| 723 | kAd4ModeMax, |
| 724 | }; |
| 725 | |
| 726 | enum HistModes { |
| 727 | kHistDisabled, |
| 728 | kHistEnabled, |
| 729 | }; |
| 730 | |
| 731 | struct DRMDppsEventInfo { |
| 732 | uint32_t object_type; |
| 733 | uint32_t event_type; |
| 734 | int drm_fd; |
| 735 | bool enable; |
| 736 | }; |
| 737 | |
Ping Li | 8d6dd62 | 2017-07-03 12:05:15 -0700 | [diff] [blame] | 738 | enum DRMCscType { |
| 739 | kCscYuv2Rgb601L, |
| 740 | kCscYuv2Rgb601FR, |
| 741 | kCscYuv2Rgb709L, |
| 742 | kCscYuv2Rgb2020L, |
| 743 | kCscYuv2Rgb2020FR, |
| 744 | kCscTypeMax, |
| 745 | }; |
| 746 | |
Saurabh Shah | 0ffee30 | 2016-11-22 10:42:11 -0800 | [diff] [blame] | 747 | struct DRMScalerLUTInfo { |
| 748 | uint32_t dir_lut_size = 0; |
| 749 | uint32_t cir_lut_size = 0; |
| 750 | uint32_t sep_lut_size = 0; |
| 751 | uint64_t dir_lut = 0; |
| 752 | uint64_t cir_lut = 0; |
| 753 | uint64_t sep_lut = 0; |
| 754 | }; |
| 755 | |
Sushil Chauhan | 1021cc0 | 2017-05-03 15:11:43 -0700 | [diff] [blame] | 756 | enum struct DRMSecureMode { |
| 757 | NON_SECURE, |
| 758 | SECURE, |
| 759 | NON_SECURE_DIR_TRANSLATION, |
| 760 | SECURE_DIR_TRANSLATION, |
| 761 | }; |
| 762 | |
| 763 | enum struct DRMSecurityLevel { |
| 764 | SECURE_NON_SECURE, |
| 765 | SECURE_ONLY, |
| 766 | }; |
| 767 | |
Ramkumar Radhakrishnan | 0725430 | 2017-11-13 16:18:22 -0800 | [diff] [blame] | 768 | enum struct DRMMultiRectMode { |
| 769 | NONE = 0, |
| 770 | PARALLEL = 1, |
| 771 | SERIAL = 2, |
| 772 | }; |
| 773 | |
Sushil Chauhan | 741ac31 | 2018-04-02 12:22:16 -0700 | [diff] [blame] | 774 | enum struct DRMCWbCaptureMode { |
| 775 | MIXER_OUT = 0, |
| 776 | DSPP_OUT = 1, |
| 777 | }; |
| 778 | |
Sushil Chauhan | 8f514a5 | 2018-02-27 17:35:44 -0800 | [diff] [blame] | 779 | enum struct DRMQsyncMode { |
| 780 | NONE = 0, |
| 781 | CONTINUOUS, |
| 782 | }; |
| 783 | |
Mathew Joseph Karimpanal | b7f20c6 | 2018-10-09 12:17:20 +0530 | [diff] [blame] | 784 | enum struct DRMTopologyControl { |
| 785 | NONE = 0, |
| 786 | RESERVE_LOCK = 1 << 0, |
| 787 | RESERVE_CLEAR = 1 << 1, |
| 788 | DSPP = 1 << 2, |
| 789 | DEST_SCALER = 1 << 3, |
| 790 | }; |
| 791 | |
Prabhanjan Kandula | dbc8aed | 2017-03-24 14:43:16 -0700 | [diff] [blame] | 792 | struct DRMSolidfillStage { |
Xu Yang | 32e58c2 | 2017-11-20 09:58:11 +0800 | [diff] [blame] | 793 | DRMRect bounding_rect {}; |
| 794 | bool is_exclusion_rect = false; |
| 795 | uint32_t color = 0xff000000; // in 8bit argb |
| 796 | uint32_t red = 0; |
| 797 | uint32_t blue = 0; |
| 798 | uint32_t green = 0; |
| 799 | uint32_t alpha = 0xff; |
| 800 | uint32_t color_bit_depth = 0; |
| 801 | uint32_t z_order = 0; |
| 802 | uint32_t plane_alpha = 0xff; |
Prabhanjan Kandula | dbc8aed | 2017-03-24 14:43:16 -0700 | [diff] [blame] | 803 | }; |
| 804 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 805 | /* DRM Atomic Request Property Set. |
| 806 | * |
| 807 | * Helper class to create and populate atomic properties of DRM components |
| 808 | * when rendered in DRM atomic mode */ |
| 809 | class DRMAtomicReqInterface { |
| 810 | public: |
| 811 | virtual ~DRMAtomicReqInterface() {} |
| 812 | /* Perform request operation. |
| 813 | * |
| 814 | * [input]: opcode: operation code from DRMOps list. |
Saurabh Shah | 1abcdf6 | 2017-11-21 14:03:22 -0800 | [diff] [blame] | 815 | * obj_id: Relevant crtc, connector, plane id |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 816 | * var_arg: arguments for DRMOps's can differ in number and |
| 817 | * data type. Refer above DRMOps to details. |
| 818 | * [return]: Error code if the API fails, 0 on success. |
| 819 | */ |
Saurabh Shah | 1abcdf6 | 2017-11-21 14:03:22 -0800 | [diff] [blame] | 820 | virtual int Perform(DRMOps opcode, uint32_t obj_id, ...) = 0; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 821 | |
| 822 | /* |
| 823 | * Commit the params set via Perform(). Also resets the properties after commit. Needs to be |
| 824 | * called every frame. |
| 825 | * [input]: synchronous: Determines if the call should block until a h/w flip |
Saurabh Shah | a917aa7 | 2017-09-15 13:27:24 -0700 | [diff] [blame] | 826 | * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming |
| 827 | * planes but still need the previously staged ones to not be unstaged |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 828 | * [return]: Error code if the API fails, 0 on success. |
| 829 | */ |
Saurabh Shah | a917aa7 | 2017-09-15 13:27:24 -0700 | [diff] [blame] | 830 | virtual int Commit(bool synchronous, bool retain_planes) = 0; |
Varun Arora | baa1647 | 2018-08-16 16:19:59 -0700 | [diff] [blame] | 831 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 832 | /* |
| 833 | * Validate the params set via Perform(). |
| 834 | * [return]: Error code if the API fails, 0 on success. |
| 835 | */ |
| 836 | virtual int Validate() = 0; |
| 837 | }; |
| 838 | |
| 839 | class DRMManagerInterface; |
| 840 | |
| 841 | /* Populates a singleton instance of DRMManager */ |
| 842 | typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf); |
| 843 | |
| 844 | /* Destroy DRMManager instance */ |
Saurabh Shah | ab7807c | 2017-02-08 15:41:08 -0800 | [diff] [blame] | 845 | typedef int (*DestroyDRMManager)(); |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 846 | |
| 847 | /* |
| 848 | * DRM Manager Interface - Any class which plans to implement helper function for vendor |
| 849 | * specific DRM driver implementation must implement the below interface routines to work |
| 850 | * with SDM. |
| 851 | */ |
| 852 | |
| 853 | class DRMManagerInterface { |
| 854 | public: |
| 855 | virtual ~DRMManagerInterface() {} |
| 856 | |
| 857 | /* |
| 858 | * Since SDM completely manages the planes. GetPlanesInfo will provide all |
| 859 | * the plane information. |
| 860 | * [output]: DRMPlanesInfo: Resource Info for planes. |
| 861 | */ |
| 862 | virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0; |
| 863 | |
| 864 | /* |
| 865 | * Will provide all the information of a selected crtc. |
| 866 | * [input]: Use crtc id 0 to obtain system wide info |
| 867 | * [output]: DRMCrtcInfo: Resource Info for the given CRTC id. |
Mathew Joseph Karimpanal | 43c9d69 | 2018-06-14 13:45:27 +0530 | [diff] [blame] | 868 | * [return]: 0 on success, a negative error value otherwise. |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 869 | */ |
Mathew Joseph Karimpanal | 43c9d69 | 2018-06-14 13:45:27 +0530 | [diff] [blame] | 870 | virtual int GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 871 | |
| 872 | /* |
| 873 | * Will provide all the information of a selected connector. |
| 874 | * [output]: DRMConnectorInfo: Resource Info for the given connector id |
Mathew Joseph Karimpanal | 43c9d69 | 2018-06-14 13:45:27 +0530 | [diff] [blame] | 875 | * [return]: 0 on success, a negative error value otherwise. |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 876 | */ |
Mathew Joseph Karimpanal | 43c9d69 | 2018-06-14 13:45:27 +0530 | [diff] [blame] | 877 | virtual int GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 878 | |
| 879 | /* |
Mathew Joseph Karimpanal | 731bc93 | 2017-11-22 10:04:56 +0530 | [diff] [blame] | 880 | * Provides information on all connectors. |
| 881 | * [output]: DRMConnectorsInfo: Resource info for connectors. |
| 882 | * [return]: 0 on success, a negative error value otherwise. |
| 883 | */ |
| 884 | virtual int GetConnectorsInfo(DRMConnectorsInfo *info) = 0; |
| 885 | |
| 886 | /* |
| 887 | * Provides information on a selected encoder. |
| 888 | * [output]: DRMEncoderInfo: Resource info for the given encoder id. |
| 889 | * [return]: 0 on success, a negative error value otherwise. |
| 890 | */ |
| 891 | virtual int GetEncoderInfo(uint32_t encoder_id, DRMEncoderInfo *info) = 0; |
| 892 | |
| 893 | /* |
| 894 | * Provides information on all encoders. |
| 895 | * [output]: DRMEncodersInfo: Resource info for encoders. |
| 896 | * [return]: 0 on success, a negative error value otherwise. |
| 897 | */ |
| 898 | virtual int GetEncodersInfo(DRMEncodersInfo *info) = 0; |
| 899 | |
| 900 | /* |
Ping Li | 281f48d | 2017-01-16 12:45:40 -0800 | [diff] [blame] | 901 | * Will query post propcessing feature info of a CRTC. |
| 902 | * [output]: DRMPPFeatureInfo: CRTC post processing feature info |
| 903 | */ |
Namit Solanki | 24921ab | 2017-05-23 20:16:25 +0530 | [diff] [blame] | 904 | virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0; |
Mathew Joseph Karimpanal | 731bc93 | 2017-11-22 10:04:56 +0530 | [diff] [blame] | 905 | |
Ping Li | 281f48d | 2017-01-16 12:45:40 -0800 | [diff] [blame] | 906 | /* |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 907 | * Register a logical display to receive a token. |
Mathew Joseph Karimpanal | 731bc93 | 2017-11-22 10:04:56 +0530 | [diff] [blame] | 908 | * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect |
| 909 | * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the |
| 910 | * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here |
| 911 | * onwards, Client should use this token to represent the display for any Perform operations if |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 912 | * needed. |
| 913 | * |
| 914 | * [input]: disp_type - Peripheral / TV / Virtual |
Mathew Joseph Karimpanal | 731bc93 | 2017-11-22 10:04:56 +0530 | [diff] [blame] | 915 | * [output]: DRMDisplayToken - CRTC and Connector IDs for the display. |
| 916 | * [return]: 0 on success, a negative error value otherwise. |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 917 | */ |
| 918 | virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0; |
| 919 | |
Mathew Joseph Karimpanal | 731bc93 | 2017-11-22 10:04:56 +0530 | [diff] [blame] | 920 | /* |
| 921 | * Register a logical display to receive a token. |
| 922 | * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect |
| 923 | * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the |
| 924 | * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here |
| 925 | * onwards, Client should use this token to represent the display for any Perform operations if |
| 926 | * needed. |
| 927 | * |
| 928 | * [input]: display_id - Connector ID |
| 929 | * [output]: DRMDisplayToken - CRTC and Connector id's for the display. |
| 930 | * [return]: 0 on success, a negative error value otherwise. |
| 931 | */ |
Varun Arora | 771fcd2 | 2019-02-07 18:08:18 -0800 | [diff] [blame] | 932 | virtual int RegisterDisplay(int32_t display_id, DRMDisplayToken *token) = 0; |
Mathew Joseph Karimpanal | 731bc93 | 2017-11-22 10:04:56 +0530 | [diff] [blame] | 933 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 934 | /* Client should invoke this interface on display disconnect. |
| 935 | * [input]: DRMDisplayToken - identifier for the display. |
| 936 | */ |
Varun Arora | 771fcd2 | 2019-02-07 18:08:18 -0800 | [diff] [blame] | 937 | virtual void UnregisterDisplay(DRMDisplayToken *token) = 0; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 938 | |
| 939 | /* |
| 940 | * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token |
| 941 | * returned as part of RegisterDisplay API. Needs to be called per display. |
| 942 | * [input]: DRMDisplayToken that identifies a display pipeline |
| 943 | * [output]: Pointer to an instance of DRMAtomicReqInterface. |
| 944 | * [return]: Error code if the API fails, 0 on success. |
| 945 | */ |
| 946 | virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0; |
| 947 | |
| 948 | /* |
| 949 | * Destroys the instance of DRMAtomicReqInterface |
| 950 | * [input]: Pointer to a DRMAtomicReqInterface |
| 951 | * [return]: Error code if the API fails, 0 on success. |
| 952 | */ |
| 953 | virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0; |
Varun Arora | baa1647 | 2018-08-16 16:19:59 -0700 | [diff] [blame] | 954 | |
Saurabh Shah | 0ffee30 | 2016-11-22 10:42:11 -0800 | [diff] [blame] | 955 | /* |
| 956 | * Sets the global scaler LUT |
| 957 | * [input]: LUT Info |
| 958 | * [return]: Error code if the API fails, 0 on success. |
| 959 | */ |
| 960 | virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0; |
Xu Yang | 32e58c2 | 2017-11-20 09:58:11 +0800 | [diff] [blame] | 961 | |
| 962 | /* |
Varun Arora | baa1647 | 2018-08-16 16:19:59 -0700 | [diff] [blame] | 963 | * Unsets the global scaler LUT |
| 964 | * [input]: None |
| 965 | * [return]: Error code if the API fails, 0 on success. |
| 966 | */ |
| 967 | virtual int UnsetScalerLUT() = 0; |
| 968 | |
| 969 | /* |
Xu Yang | 32e58c2 | 2017-11-20 09:58:11 +0800 | [diff] [blame] | 970 | * Get the DPPS feature info |
| 971 | * [input]: Dpps feature id, info->id |
| 972 | * [output]: Dpps feature version, info->version |
| 973 | */ |
| 974 | virtual void GetDppsFeatureInfo(DRMDppsFeatureInfo *info) = 0; |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 975 | }; |
Saurabh Shah | 0ffee30 | 2016-11-22 10:42:11 -0800 | [diff] [blame] | 976 | |
Saurabh Shah | 66c941b | 2016-07-06 17:34:05 -0700 | [diff] [blame] | 977 | } // namespace sde_drm |
| 978 | #endif // __DRM_INTERFACE_H__ |