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Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
Rohit Kulkarni21649ef2018-02-08 14:39:40 -08002* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
Saurabh Shah66c941b2016-07-06 17:34:05 -07003*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
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14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070041
42namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080043
44typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
45
Saurabh Shah66c941b2016-07-06 17:34:05 -070046/*
47 * Drm Atomic Operation Codes
48 */
49enum struct DRMOps {
50 /*
51 * Op: Sets plane source crop
52 * Arg: uint32_t - Plane ID
53 * DRMRect - Source Rectangle
54 */
55 PLANE_SET_SRC_RECT,
56 /*
57 * Op: Sets plane destination rect
58 * Arg: uint32_t - Plane ID
59 * DRMRect - Dst Rectangle
60 */
61 PLANE_SET_DST_RECT,
62 /*
Namit Solanki6d0d8062017-11-30 17:29:48 +053063 * Op: Sets plane exclusion rect
64 * Arg: uint32_t - Plane ID
65 * drm_clip_rect - Exclusion Rectangle
66 */
67 PLANE_SET_EXCL_RECT,
68 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -070069 * Op: Sets plane zorder
70 * Arg: uint32_t - Plane ID
71 * uint32_t - zorder
72 */
73 PLANE_SET_ZORDER,
74 /*
75 * Op: Sets plane rotation flags
76 * Arg: uint32_t - Plane ID
77 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
78 */
79 PLANE_SET_ROTATION,
80 /*
81 * Op: Sets plane alpha
82 * Arg: uint32_t - Plane ID
83 * uint32_t - alpha value
84 */
85 PLANE_SET_ALPHA,
86 /*
87 * Op: Sets the blend type
88 * Arg: uint32_t - Plane ID
89 * uint32_t - blend type (see DRMBlendType)
90 */
91 PLANE_SET_BLEND_TYPE,
92 /*
93 * Op: Sets horizontal decimation
94 * Arg: uint32_t - Plane ID
95 * uint32_t - decimation factor
96 */
97 PLANE_SET_H_DECIMATION,
98 /*
99 * Op: Sets vertical decimation
100 * Arg: uint32_t - Plane ID
101 * uint32_t - decimation factor
102 */
103 PLANE_SET_V_DECIMATION,
104 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800105 * Op: Sets source config flags
106 * Arg: uint32_t - Plane ID
107 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
108 */
109 PLANE_SET_SRC_CONFIG,
110 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700111 * Op: Sets frame buffer ID for plane. Set together with CRTC.
112 * Arg: uint32_t - Plane ID
113 * uint32_t - Framebuffer ID
114 */
115 PLANE_SET_FB_ID,
116 /*
117 * Op: Sets the crtc for this plane. Set together with FB_ID.
118 * Arg: uint32_t - Plane ID
119 * uint32_t - CRTC ID
120 */
121 PLANE_SET_CRTC,
122 /*
123 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
124 * Arg: uint32_t - Plane ID
125 * uint32_t - Input fence
126 */
127 PLANE_SET_INPUT_FENCE,
128 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800129 * Op: Sets scaler config on this plane.
130 * Arg: uint32_t - Plane ID
131 * uint64_t - Address of the scaler config object (version based)
132 */
133 PLANE_SET_SCALER_CONFIG,
134 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800135 * Op: Sets plane rotation destination rect
136 * Arg: uint32_t - Plane ID
137 * DRMRect - rotator dst Rectangle
138 */
139 PLANE_SET_ROTATION_DST_RECT,
140 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700141 * Op: Sets FB Secure mode for this plane.
142 * Arg: uint32_t - Plane ID
143 * uint32_t - Value of the FB Secure mode.
144 */
145 PLANE_SET_FB_SECURE_MODE,
146 /*
Ping Li8d6dd622017-07-03 12:05:15 -0700147 * Op: Sets csc config on this plane.
148 * Arg: uint32_t - Plane ID
149 * uint32_t* - pointer to csc type
150 */
151 PLANE_SET_CSC_CONFIG,
152 /*
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800153 * Op: Sets multirect mode on this plane.
154 * Arg: uint32_t - Plane ID
155 * uint32_t - multirect mode
156 */
157 PLANE_SET_MULTIRECT_MODE,
158 /*
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800159 * Op: Sets rotator output frame buffer ID for plane.
160 * Arg: uint32_t - Plane ID
161 * uint32_t - Framebuffer ID
162 */
163 PLANE_SET_ROT_FB_ID,
164 /*
Arun Kumar K.R5d30ab52017-12-28 09:05:36 +0530165 * Op: Sets inverse pma mode on this plane.
166 * Arg: uint32_t - Plane ID
167 * uint32_t - enable/disable inverse pma.
168 */
169 PLANE_SET_INVERSE_PMA,
170 /*
171 * Op: Sets csc config on this plane.
172 * Arg: uint32_t - Plane ID
173 * uint64_t - Address of the csc config object(version based)
174 */
175 PLANE_SET_DGM_CSC_CONFIG,
176 /*
177 * Op: Sets SSPP Feature
178 * Arg: uint32_t - Plane ID
179 * DRMPPFeatureInfo * - PP feature data pointer
180 */
181 PLANE_SET_POST_PROC,
182 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700183 * Op: Activate or deactivate a CRTC
184 * Arg: uint32_t - CRTC ID
185 * uint32_t - 1 to enable, 0 to disable
186 */
187 CRTC_SET_ACTIVE,
188 /*
189 * Op: Sets display mode
190 * Arg: uint32_t - CRTC ID
191 * drmModeModeInfo* - Pointer to display mode
192 */
193 CRTC_SET_MODE,
194 /*
195 * Op: Sets an offset indicating when a release fence should be signalled.
196 * Arg: uint32_t - offset
197 * 0: non-speculative, default
198 * 1: speculative
199 */
200 CRTC_SET_OUTPUT_FENCE_OFFSET,
201 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800202 * Op: Sets overall SDE core clock
203 * Arg: uint32_t - CRTC ID
204 * uint32_t - core_clk
205 */
206 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700207 /*
208 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800209 * Arg: uint32_t - CRTC ID
210 * uint32_t - core_ab
211 */
212 CRTC_SET_CORE_AB,
213 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700214 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800215 * Arg: uint32_t - CRTC ID
216 * uint32_t - core_ib
217 */
218 CRTC_SET_CORE_IB,
219 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700220 * Op: Sets LLCC Bus average bandwidth
221 * Arg: uint32_t - CRTC ID
222 * uint32_t - llcc_ab
223 */
224 CRTC_SET_LLCC_AB,
225 /*
226 * Op: Sets LLCC Bus instantaneous bandwidth
227 * Arg: uint32_t - CRTC ID
228 * uint32_t - llcc_ib
229 */
230 CRTC_SET_LLCC_IB,
231 /*
232 * Op: Sets DRAM bus average bandwidth
233 * Arg: uint32_t - CRTC ID
234 * uint32_t - dram_ab
235 */
236 CRTC_SET_DRAM_AB,
237 /*
238 * Op: Sets DRAM bus instantaneous bandwidth
239 * Arg: uint32_t - CRTC ID
240 * uint32_t - dram_ib
241 */
242 CRTC_SET_DRAM_IB,
243 /*
Ramkumar Radhakrishnanb7910442017-12-11 13:32:47 -0800244 * Op: Sets Rotator BW for inline rotation
245 * Arg: uint32_t - CRTC ID
246 * uint32_t - rot_bw
247 */
248 CRTC_SET_ROT_PREFILL_BW,
249 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700250 * Op: Sets rotator clock for inline rotation
251 * Arg: uint32_t - CRTC ID
252 * uint32_t - rot_clk
253 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530254 CRTC_SET_ROT_CLK,
255 /*
256 * Op: Sets destination scalar data
257 * Arg: uint32_t - CRTC ID
258 * uint64_t - Pointer to destination scalar data
259 */
260 CRTC_SET_DEST_SCALER_CONFIG,
261 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700262 * Op: Returns release fence for this frame. Should be called after Commit() on
263 * DRMAtomicReqInterface.
264 * Arg: uint32_t - CRTC ID
265 * int * - Pointer to an integer that will hold the returned fence
266 */
267 CRTC_GET_RELEASE_FENCE,
268 /*
Ping Li281f48d2017-01-16 12:45:40 -0800269 * Op: Sets PP feature
270 * Arg: uint32_t - CRTC ID
271 * DRMPPFeatureInfo * - PP feature data pointer
272 */
273 CRTC_SET_POST_PROC,
274 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800275 * Op: Sets CRTC ROIs.
276 * Arg: uint32_t - CRTC ID
277 * uint32_t - number of ROIs
278 * DRMRect * - Array of CRTC ROIs
279 */
280 CRTC_SET_ROI,
281 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700282 * Op: Sets Security level for CRTC.
283 * Arg: uint32_t - CRTC ID
284 * uint32_t - Security level
285 */
286 CRTC_SET_SECURITY_LEVEL,
287 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700288 * Op: sets solid fill stages
289 * Arg: uint32_t - CRTC ID
290 * Vector of DRMSolidfillStage
291 */
292 CRTC_SET_SOLIDFILL_STAGES,
293 /*
Anjaneya Prasad Musunurie8c67f22017-07-01 16:16:13 +0530294 * Op: Sets idle timeout.
295 * Arg: uint32_t - CRTC ID
296 * uint32_t - idle timeout in ms
297 */
298 CRTC_SET_IDLE_TIMEOUT,
299 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700300 * Op: Returns retire fence for this commit. Should be called after Commit() on
301 * DRMAtomicReqInterface.
302 * Arg: uint32_t - Connector ID
303 * int * - Pointer to an integer that will hold the returned fence
304 */
305 CONNECTOR_GET_RETIRE_FENCE,
306 /*
307 * Op: Sets writeback connector destination rect
308 * Arg: uint32_t - Connector ID
309 * DRMRect - Dst Rectangle
310 */
311 CONNECTOR_SET_OUTPUT_RECT,
312 /*
313 * Op: Sets frame buffer ID for writeback connector.
314 * Arg: uint32_t - Connector ID
315 * uint32_t - Framebuffer ID
316 */
317 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700318 /*
319 * Op: Sets power mode for connector.
320 * Arg: uint32_t - Connector ID
321 * uint32_t - Power Mode
322 */
323 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800324 /*
325 * Op: Sets panel ROIs.
326 * Arg: uint32_t - Connector ID
327 * uint32_t - number of ROIs
328 * DRMRect * - Array of Connector ROIs
329 */
330 CONNECTOR_SET_ROI,
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700331 /*
Saurabh Shahf3635952017-10-16 17:08:18 -0700332 * Op: Sets the connector to autorefresh mode.
333 * Arg: uint32_t - Connector ID
334 * uint32_t - Enable-1, Disable-0
335 */
336 CONNECTOR_SET_AUTOREFRESH,
337 /*
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700338 * Op: Set FB secure mode for Writeback connector.
339 * Arg: uint32_t - Connector ID
340 * uint32_t - FB Secure mode
341 */
342 CONNECTOR_SET_FB_SECURE_MODE,
Saurabh Shah82b06f42017-09-06 16:43:49 -0700343 /*
344 * Op: Sets a crtc id to this connector
345 * Arg: uint32_t - Connector ID
346 * uint32_t - CRTC ID
347 */
348 CONNECTOR_SET_CRTC,
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700349 /*
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700350 * Op: Sets PP feature
351 * Arg: uint32_t - Connector ID
352 * DRMPPFeatureInfo * - PP feature data pointer
353 */
Xu Yang32e58c22017-11-20 09:58:11 +0800354 CONNECTOR_SET_POST_PROC,
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700355 /*
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700356 * Op: Sets connector hdr metadata
357 * Arg: uint32_t - Connector ID
358 * drm_msm_ext_hdr_metadata - hdr_metadata
359 */
360 CONNECTOR_SET_HDR_METADATA,
Xu Yang32e58c22017-11-20 09:58:11 +0800361 /*
362 * Op: Cache Dpps features.
363 * Arg: uint32_t - Object ID
364 uint32_t - Feature ID
365 * uint64_t - Pointer to feature config data
366 */
367 DPPS_CACHE_FEATURE,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700368};
369
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700370enum struct DRMRotation {
371 FLIP_H = 0x1,
372 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700373 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700374 ROT_90 = 0x4,
375};
376
Sushil Chauhan3396e202017-04-14 18:34:22 -0700377enum struct DRMPowerMode {
378 ON,
379 DOZE,
380 DOZE_SUSPEND,
381 OFF,
382};
383
Saurabh Shah66c941b2016-07-06 17:34:05 -0700384enum struct DRMBlendType {
385 UNDEFINED = 0,
386 OPAQUE = 1,
387 PREMULTIPLIED = 2,
388 COVERAGE = 3,
389};
390
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800391enum struct DRMSrcConfig {
392 DEINTERLACE = 0,
393};
394
Saurabh Shah66c941b2016-07-06 17:34:05 -0700395/* Display type to identify a suitable connector */
396enum struct DRMDisplayType {
397 PERIPHERAL,
398 TV,
399 VIRTUAL,
400};
401
402struct DRMRect {
403 uint32_t left; // Left-most pixel coordinate.
404 uint32_t top; // Top-most pixel coordinate.
405 uint32_t right; // Right-most pixel coordinate.
406 uint32_t bottom; // Bottom-most pixel coordinate.
407};
408
409//------------------------------------------------------------------------
410// DRM Info Query Types
411//------------------------------------------------------------------------
412
413enum struct QSEEDVersion {
414 V1,
415 V2,
416 V3,
417};
418
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700419/* QSEED3 Step version */
420enum struct QSEEDStepVersion {
421 V2,
422 V3,
423 V4,
424};
425
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700426enum struct SmartDMARevision {
427 V1,
428 V2,
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530429 V2p5
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700430};
431
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800432/* Inline Rotation version */
433enum struct InlineRotationVersion {
434 UNKNOWN,
435 V1,
436 V1p1, // Rotator FB ID needs to be set
437};
438
Saurabh Shah66c941b2016-07-06 17:34:05 -0700439/* Per CRTC Resource Info*/
440struct DRMCrtcInfo {
441 bool has_src_split;
Srikanth Rajagopalan49380782017-07-06 15:23:12 -0700442 bool has_hdr;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700443 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700444 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700445 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700446 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800447 float ib_fudge_factor;
448 float clk_fudge_factor;
449 uint32_t dest_scale_prefill_lines;
450 uint32_t undersized_prefill_lines;
451 uint32_t macrotile_prefill_lines;
452 uint32_t nv12_prefill_lines;
453 uint32_t linear_prefill_lines;
454 uint32_t downscale_prefill_lines;
455 uint32_t extra_prefill_lines;
456 uint32_t amortized_threshold;
457 uint64_t max_bandwidth_low;
458 uint64_t max_bandwidth_high;
459 uint32_t max_sde_clk;
460 CompRatioMap comp_ratio_rt_map;
461 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700462 uint32_t hw_version;
Namit Solanki24921ab2017-05-23 20:16:25 +0530463 uint32_t dest_scaler_count = 0;
464 uint32_t max_dest_scaler_input_width = 0;
465 uint32_t max_dest_scaler_output_width = 0;
466 uint32_t max_dest_scale_up = 1;
Pullakavi Srinivas3e2c0402017-12-05 17:50:15 +0530467 uint32_t min_prefill_lines = 0;
Ramkumar Radhakrishnana38b7602018-03-15 14:49:52 -0700468 int secure_disp_blend_stage = -1;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700469};
470
471enum struct DRMPlaneType {
472 // Has CSC and scaling capability
473 VIG = 0,
474 // Has scaling capability but no CSC
475 RGB,
476 // No scaling support
477 DMA,
478 // Supports a small dimension and doesn't use a CRTC stage
479 CURSOR,
480 MAX,
481};
482
Arun Kumar K.R5d30ab52017-12-28 09:05:36 +0530483enum struct DRMTonemapLutType {
484 DMA_1D_GC,
485 DMA_1D_IGC,
486 VIG_1D_IGC,
487 VIG_3D_GAMUT,
488};
489
Saurabh Shah66c941b2016-07-06 17:34:05 -0700490struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700491 DRMPlaneType type;
492 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700493 // FourCC format enum and modifier
494 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
495 uint32_t max_linewidth;
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530496 uint32_t max_scaler_linewidth;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700497 uint32_t max_upscale;
498 uint32_t max_downscale;
499 uint32_t max_horizontal_deci;
500 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800501 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800502 uint32_t cache_size; // cache size in bytes for inline rotation support.
Namit Solanki6d0d8062017-11-30 17:29:48 +0530503 bool has_excl_rect = false;
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700504 QSEEDStepVersion qseed3_version;
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800505 bool multirect_prop_present = false;
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800506 InlineRotationVersion inrot_version; // inline rotation version
Arun Kumar K.R5d30ab52017-12-28 09:05:36 +0530507 bool inverse_pma = false;
508 uint32_t dgm_csc_version = 0; // csc used with DMA
509 std::map<DRMTonemapLutType, uint32_t> tonemap_lut_version_map = {};
Ramkumar Radhakrishnan4a269752018-03-08 14:53:15 -0800510 bool block_sec_ui = false;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700511};
512
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700513// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
514typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700515
516enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700517 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700518 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700519 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700520 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700521 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700522 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700523 DUAL_LM_MERGE_DSC,
524 DUAL_LM_DSCMERGE,
525 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700526};
527
528enum struct DRMPanelMode {
529 VIDEO,
530 COMMAND,
531};
532
Saurabh Shah7e16c932017-11-03 17:55:36 -0700533/* Per mode info */
534struct DRMModeInfo {
535 drmModeModeInfo mode;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700536 DRMTopology topology;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800537 // Valid only if mode is command
538 int num_roi;
539 int xstart;
540 int ystart;
541 int walign;
542 int halign;
543 int wmin;
544 int hmin;
545 bool roi_merge;
Saurabh Shah7e16c932017-11-03 17:55:36 -0700546};
547
548/* Per Connector Info*/
549struct DRMConnectorInfo {
550 uint32_t mmWidth;
551 uint32_t mmHeight;
552 uint32_t type;
553 std::vector<DRMModeInfo> modes;
554 std::string panel_name;
555 DRMPanelMode panel_mode;
556 bool is_primary;
557 // Valid only if DRMPanelMode is VIDEO
558 bool dynamic_fps;
559 // FourCC format enum and modifier
560 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
561 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
562 uint32_t max_linewidth;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700563 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700564 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700565 uint32_t transfer_time_us;
Srikanth Rajagopalance0f7cb2017-06-12 15:14:26 -0700566 drm_msm_ext_hdr_properties ext_hdr_prop;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700567};
568
569/* Identifier token for a display */
570struct DRMDisplayToken {
571 uint32_t conn_id;
572 uint32_t crtc_id;
573};
574
Ping Li281f48d2017-01-16 12:45:40 -0800575enum DRMPPFeatureID {
576 kFeaturePcc,
577 kFeatureIgc,
578 kFeaturePgc,
579 kFeatureMixerGc,
580 kFeaturePaV2,
581 kFeatureDither,
582 kFeatureGamut,
583 kFeaturePADither,
Rajesh Yadavd30b0cc2017-09-22 00:26:54 +0530584 kFeaturePAHsic,
585 kFeaturePASixZone,
Rajesh Yadav99535ac2017-08-28 16:33:04 +0530586 kFeaturePAMemColSkin,
587 kFeaturePAMemColSky,
588 kFeaturePAMemColFoliage,
589 kFeaturePAMemColProt,
Rajesh Yadavc4f67b82017-11-15 20:37:13 +0530590 kFeatureDgmIgc,
591 kFeatureDgmGc,
592 kFeatureVigIgc,
593 kFeatureVigGamut,
Ping Li281f48d2017-01-16 12:45:40 -0800594 kPPFeaturesMax,
595};
596
597enum DRMPPPropType {
598 kPropEnum,
599 kPropRange,
600 kPropBlob,
601 kPropTypeMax,
602};
603
604struct DRMPPFeatureInfo {
605 DRMPPFeatureID id;
606 DRMPPPropType type;
607 uint32_t version;
608 uint32_t payload_size;
609 void *payload;
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700610 uint32_t object_type;
Ping Li281f48d2017-01-16 12:45:40 -0800611};
612
Xu Yang32e58c22017-11-20 09:58:11 +0800613enum DRMDPPSFeatureID {
614 // Ad4 properties
615 kFeatureAd4Mode,
616 kFeatureAd4Init,
617 kFeatureAd4Cfg,
618 kFeatureAd4Input,
619 kFeatureAd4Backlight,
620 kFeatureAd4Assertiveness,
621 kFeatureAd4ManualStrength,
622 // ABA properties
623 kFeatureAbaHistCtrl,
624 kFeatureAbaHistIRQ,
625 kFeatureAbaLut,
626 // BL scale properties
627 kFeatureAd4BlScale,
628 kFeatureBacklightScale,
629 // Events
630 kFeaturePowerEvent,
631 kFeatureAbaHistEvent,
632 kFeatureBackLightEvent,
633 kFeatureAdAttBlEvent,
634 // Insert features above
635 kDppsFeaturesMax,
636};
637
638struct DRMDppsFeatureInfo {
639 DRMDPPSFeatureID id;
640 uint32_t version;
641};
642
643enum AD4Modes {
644 kAd4Off,
645 kAd4AutoStrength,
646 kAd4Calibration,
647 kAd4Manual,
648 kAd4ModeMax,
649};
650
651enum HistModes {
652 kHistDisabled,
653 kHistEnabled,
654};
655
656struct DRMDppsEventInfo {
657 uint32_t object_type;
658 uint32_t event_type;
659 int drm_fd;
660 bool enable;
661};
662
Ping Li8d6dd622017-07-03 12:05:15 -0700663enum DRMCscType {
664 kCscYuv2Rgb601L,
665 kCscYuv2Rgb601FR,
666 kCscYuv2Rgb709L,
667 kCscYuv2Rgb2020L,
668 kCscYuv2Rgb2020FR,
669 kCscTypeMax,
670};
671
Saurabh Shah0ffee302016-11-22 10:42:11 -0800672struct DRMScalerLUTInfo {
673 uint32_t dir_lut_size = 0;
674 uint32_t cir_lut_size = 0;
675 uint32_t sep_lut_size = 0;
676 uint64_t dir_lut = 0;
677 uint64_t cir_lut = 0;
678 uint64_t sep_lut = 0;
679};
680
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700681enum struct DRMSecureMode {
682 NON_SECURE,
683 SECURE,
684 NON_SECURE_DIR_TRANSLATION,
685 SECURE_DIR_TRANSLATION,
686};
687
688enum struct DRMSecurityLevel {
689 SECURE_NON_SECURE,
690 SECURE_ONLY,
691};
692
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800693enum struct DRMMultiRectMode {
694 NONE = 0,
695 PARALLEL = 1,
696 SERIAL = 2,
697};
698
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700699struct DRMSolidfillStage {
Xu Yang32e58c22017-11-20 09:58:11 +0800700 DRMRect bounding_rect {};
701 bool is_exclusion_rect = false;
702 uint32_t color = 0xff000000; // in 8bit argb
703 uint32_t red = 0;
704 uint32_t blue = 0;
705 uint32_t green = 0;
706 uint32_t alpha = 0xff;
707 uint32_t color_bit_depth = 0;
708 uint32_t z_order = 0;
709 uint32_t plane_alpha = 0xff;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700710};
711
Saurabh Shah66c941b2016-07-06 17:34:05 -0700712/* DRM Atomic Request Property Set.
713 *
714 * Helper class to create and populate atomic properties of DRM components
715 * when rendered in DRM atomic mode */
716class DRMAtomicReqInterface {
717 public:
718 virtual ~DRMAtomicReqInterface() {}
719 /* Perform request operation.
720 *
721 * [input]: opcode: operation code from DRMOps list.
Saurabh Shah1abcdf62017-11-21 14:03:22 -0800722 * obj_id: Relevant crtc, connector, plane id
Saurabh Shah66c941b2016-07-06 17:34:05 -0700723 * var_arg: arguments for DRMOps's can differ in number and
724 * data type. Refer above DRMOps to details.
725 * [return]: Error code if the API fails, 0 on success.
726 */
Saurabh Shah1abcdf62017-11-21 14:03:22 -0800727 virtual int Perform(DRMOps opcode, uint32_t obj_id, ...) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700728
729 /*
730 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
731 * called every frame.
732 * [input]: synchronous: Determines if the call should block until a h/w flip
Saurabh Shaha917aa72017-09-15 13:27:24 -0700733 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming
734 * planes but still need the previously staged ones to not be unstaged
Saurabh Shah66c941b2016-07-06 17:34:05 -0700735 * [return]: Error code if the API fails, 0 on success.
736 */
Saurabh Shaha917aa72017-09-15 13:27:24 -0700737 virtual int Commit(bool synchronous, bool retain_planes) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700738 /*
739 * Validate the params set via Perform().
740 * [return]: Error code if the API fails, 0 on success.
741 */
742 virtual int Validate() = 0;
743};
744
745class DRMManagerInterface;
746
747/* Populates a singleton instance of DRMManager */
748typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
749
750/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800751typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700752
753/*
754 * DRM Manager Interface - Any class which plans to implement helper function for vendor
755 * specific DRM driver implementation must implement the below interface routines to work
756 * with SDM.
757 */
758
759class DRMManagerInterface {
760 public:
761 virtual ~DRMManagerInterface() {}
762
763 /*
764 * Since SDM completely manages the planes. GetPlanesInfo will provide all
765 * the plane information.
766 * [output]: DRMPlanesInfo: Resource Info for planes.
767 */
768 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
769
770 /*
771 * Will provide all the information of a selected crtc.
772 * [input]: Use crtc id 0 to obtain system wide info
773 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
774 */
775 virtual void GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
776
777 /*
778 * Will provide all the information of a selected connector.
779 * [output]: DRMConnectorInfo: Resource Info for the given connector id
780 */
781 virtual void GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
782
783 /*
Ping Li281f48d2017-01-16 12:45:40 -0800784 * Will query post propcessing feature info of a CRTC.
785 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
786 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530787 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0;
Ping Li281f48d2017-01-16 12:45:40 -0800788 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700789 * Register a logical display to receive a token.
790 * Each display pipeline in DRM is identified by its CRTC and Connector(s).
791 * On display connect(bootup or hotplug), clients should invoke this interface to
792 * establish the pipeline for the display and should get a DisplayToken
793 * populated with crtc and connnector(s) id's. Here onwards, Client should
794 * use this token to represent the display for any Perform operations if
795 * needed.
796 *
797 * [input]: disp_type - Peripheral / TV / Virtual
798 * [output]: DRMDisplayToken - CRTC and Connector id's for the display
799 * [return]: 0 on success, a negative error value otherwise
800 */
801 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
802
803 /* Client should invoke this interface on display disconnect.
804 * [input]: DRMDisplayToken - identifier for the display.
805 */
806 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
807
808 /*
809 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
810 * returned as part of RegisterDisplay API. Needs to be called per display.
811 * [input]: DRMDisplayToken that identifies a display pipeline
812 * [output]: Pointer to an instance of DRMAtomicReqInterface.
813 * [return]: Error code if the API fails, 0 on success.
814 */
815 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
816
817 /*
818 * Destroys the instance of DRMAtomicReqInterface
819 * [input]: Pointer to a DRMAtomicReqInterface
820 * [return]: Error code if the API fails, 0 on success.
821 */
822 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Saurabh Shah0ffee302016-11-22 10:42:11 -0800823 /*
824 * Sets the global scaler LUT
825 * [input]: LUT Info
826 * [return]: Error code if the API fails, 0 on success.
827 */
828 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Xu Yang32e58c22017-11-20 09:58:11 +0800829
830 /*
831 * Get the DPPS feature info
832 * [input]: Dpps feature id, info->id
833 * [output]: Dpps feature version, info->version
834 */
835 virtual void GetDppsFeatureInfo(DRMDppsFeatureInfo *info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700836};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800837
Saurabh Shah66c941b2016-07-06 17:34:05 -0700838} // namespace sde_drm
839#endif // __DRM_INTERFACE_H__