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Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Mansoor Aftabe9912a62014-07-15 01:40:26 -07002 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Shalaj Jain1f9725a2015-03-04 17:53:49 -080052#ifdef ION_FLAG_CP_PIXEL
53#define CP_HEAP_ID ION_SECURE_HEAP_ID
54#else
55#define ION_FLAG_CP_PIXEL 0
56#define CP_HEAP_ID ION_CP_MM_HEAP_ID
57#endif
58
59#ifndef ION_FLAG_ALLOW_NON_CONTIG
60#define ION_FLAG_ALLOW_NON_CONTIG 0
61#endif
62
Iliyan Malchev202a77d2012-06-11 14:41:12 -070063using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070064using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070065
Naomi Luisa44100c2013-02-08 12:42:03 -080066ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
67
Sushil Chauhan65e26302015-01-14 10:48:57 -080068static void getUBwcWidthAndHeight(int, int, int, int&, int&);
69static unsigned int getUBwcSize(int, int, int, const int, const int);
70
Iliyan Malchev202a77d2012-06-11 14:41:12 -070071//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070072
Saurabh Shah1adcafe2014-12-19 10:05:41 -080073/* The default policy is to return cached buffers unless the client explicity
74 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
75 * read or written in software. Any combination with a _RARELY_ flag will be
76 * treated as uncached. */
77static bool useUncached(const int& usage) {
78 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
79 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
80 GRALLOC_USAGE_SW_WRITE_RARELY) or
81 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
82 GRALLOC_USAGE_SW_READ_RARELY))
83 return true;
84
85 return false;
86}
87
Naomi Luisa44100c2013-02-08 12:42:03 -080088//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -080089AdrenoMemInfo::AdrenoMemInfo()
90{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080091 LINK_adreno_compute_aligned_width_and_height = NULL;
92 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070093 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -080094 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -080095 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080096
Naomi Luis01f5c8e2013-02-11 12:46:24 -080097 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
98 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -080099 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700100 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
101 *(void **)&LINK_adreno_compute_padding =
102 ::dlsym(libadreno_utils, "compute_surface_padding");
103 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
104 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800105 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
106 ::dlsym(libadreno_utils,
107 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800108 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
109 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800110 }
111}
112
113AdrenoMemInfo::~AdrenoMemInfo()
114{
115 if (libadreno_utils) {
116 ::dlclose(libadreno_utils);
117 }
118}
119
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700120int AdrenoMemInfo::isMacroTilingSupportedByGPU()
121{
122 if ((libadreno_utils)) {
123 if(LINK_adreno_isMacroTilingSupportedByGpu) {
124 return LINK_adreno_isMacroTilingSupportedByGpu();
125 }
126 }
127 return 0;
128}
129
130
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800131void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800132 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800133{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800134
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800135 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700136 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800137 int tileEnabled = isMacroTileEnabled(format, usage);
138 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
139 height, format, tileEnabled, aligned_w, aligned_h);
140 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800141 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800142
143 if (isUBwcEnabled(format, usage)) {
144 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
145 return;
146 }
147
148 aligned_w = width;
149 aligned_h = height;
150 switch (format)
151 {
152 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
153 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
154 case HAL_PIXEL_FORMAT_RAW_SENSOR:
155 aligned_w = ALIGN(width, 32);
156 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700157 case HAL_PIXEL_FORMAT_RAW10:
158 aligned_w = ALIGN(width * 10 /8, 16);
159 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800160 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
161 aligned_w = ALIGN(width, 128);
162 break;
163 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
164 case HAL_PIXEL_FORMAT_YV12:
165 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
166 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
167 case HAL_PIXEL_FORMAT_YCbCr_422_I:
168 case HAL_PIXEL_FORMAT_YCrCb_422_I:
169 aligned_w = ALIGN(width, 16);
170 break;
171 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
172 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
173 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
174 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
175 break;
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530176 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
177 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV21, width);
178 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV21, height);
179 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800180 case HAL_PIXEL_FORMAT_BLOB:
181 break;
182 case HAL_PIXEL_FORMAT_NV21_ZSL:
183 aligned_w = ALIGN(width, 64);
184 aligned_h = ALIGN(height, 64);
185 break;
186 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
187 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
188 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
189 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
190 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
191 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
192 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
193 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
194 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
195 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
196 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
197 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
198 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
199 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
200 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
201 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
202 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
203 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
204 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
205 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
206 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
207 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
208 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
209 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
210 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
211 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
212 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
213 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
214 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
215 int bytesPerPixel = 0;
216 int raster_mode = 0; //Adreno unknown raster mode.
217 int padding_threshold = 512; //Threshold for padding
218 //surfaces.
219
220 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
221 width, height, format, 0,raster_mode, padding_threshold,
222 &aligned_w, &aligned_h, &bytesPerPixel);
223 } else {
224 ALOGW("%s: Warning!! Symbols" \
225 " compute_compressedfmt_aligned_width_and_height" \
226 " not found", __FUNCTION__);
227 }
228 break;
229 default: break;
230 }
231}
232
233void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
234 int tile_enabled, int& aligned_w, int& aligned_h)
235{
236 aligned_w = ALIGN(width, 32);
237 aligned_h = ALIGN(height, 32);
238
239 // Don't add any additional padding if debug.gralloc.map_fb_memory
240 // is enabled
241 char property[PROPERTY_VALUE_MAX];
242 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
243 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
244 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
245 return;
246 }
247
248 int bpp = 4;
249 switch(format)
250 {
251 case HAL_PIXEL_FORMAT_RGB_888:
252 bpp = 3;
253 break;
254 case HAL_PIXEL_FORMAT_RGB_565:
255 case HAL_PIXEL_FORMAT_RGBA_5551:
256 case HAL_PIXEL_FORMAT_RGBA_4444:
257 bpp = 2;
258 break;
259 default: break;
260 }
261
262 if (libadreno_utils) {
263 int raster_mode = 0; // Adreno unknown raster mode.
264 int padding_threshold = 512; // Threshold for padding surfaces.
265 // the function below computes aligned width and aligned height
266 // based on linear or macro tile mode selected.
267 if(LINK_adreno_compute_aligned_width_and_height) {
268 LINK_adreno_compute_aligned_width_and_height(width,
269 height, bpp, tile_enabled,
270 raster_mode, padding_threshold,
271 &aligned_w, &aligned_h);
272
273 } else if(LINK_adreno_compute_padding) {
274 int surface_tile_height = 1; // Linear surface
275 aligned_w = LINK_adreno_compute_padding(width, bpp,
276 surface_tile_height, raster_mode,
277 padding_threshold);
278 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
279 __FUNCTION__);
280 } else {
281 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
282 "compute_aligned_width_and_height not found", __FUNCTION__);
283 }
284 }
285}
286
287int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
288{
Sushil Chauhan082acd62015-01-14 16:49:29 -0800289 if (libadreno_utils) {
290 if (LINK_adreno_isUBWCSupportedByGpu) {
291 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
292 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
293 }
294 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800295 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800296}
297
Sushil Chauhan082acd62015-01-14 16:49:29 -0800298ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
299{
300 switch (hal_format) {
301 case HAL_PIXEL_FORMAT_RGBA_8888:
302 return ADRENO_PIXELFORMAT_R8G8B8A8;
303 case HAL_PIXEL_FORMAT_RGB_565:
304 return ADRENO_PIXELFORMAT_B5G6R5;
305 case HAL_PIXEL_FORMAT_sRGB_A_8888:
306 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
307 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800308 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800309 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
310 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800311 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800312 default:
313 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
314 break;
315 }
316 return ADRENO_PIXELFORMAT_UNKNOWN;
317}
318
Naomi Luisa44100c2013-02-08 12:42:03 -0800319//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700320IAllocController* IAllocController::sController = NULL;
321IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700322{
323 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700324 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700325 }
326 return sController;
327}
328
329
330//-------------- IonController-----------------------//
331IonController::IonController()
332{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530333 allocateIonMem();
334}
335
336void IonController::allocateIonMem()
337{
338 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700339}
340
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700341int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700342{
343 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500344 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700345 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700346
347 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700348 data.allocType = 0;
349
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530350 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530351 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800352 ionHeapId = ION_HEAP(CP_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500353 ionFlags |= ION_SECURE;
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800354 if (usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY) {
355 /*
356 * There is currently no flag in ION for Secure Display
357 * VM. Please add it here once available.
358 *
359 ionFlags |= <Ion flag for Secure Display>;
360 */
361 } else {
362 ionFlags |= ION_FLAG_CP_PIXEL;
363 }
364
Shalaj Jain13cdf812014-12-02 16:20:54 -0800365 if (!(usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY)) {
366 ionFlags |= ION_FLAG_ALLOW_NON_CONTIG;
367 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530368 } else {
369 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500370 // do not set ion secure flag & MM heap. Fallback to system heap.
371 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530372 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500373 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530374 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
375 //MM Heap is exclusively a secure heap.
376 //If it is used for non secure cases, fallback to IOMMU heap
377 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
378 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500379 trying to use system heap instead !!");
380 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500381 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700382
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700383 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500384 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700385
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700386 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500387 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700388
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530389 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500390 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700391
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500392 // if no ion heap flags are set, default to system heap
393 if(!ionHeapId)
394 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700395
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500396 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700397 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500398 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700399 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700400
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700401 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700402 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500403 } else {
404 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
405 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700406 }
407
408 return ret;
409}
410
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700411IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700412{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700413 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700414 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
415 memalloc = mIonAlloc;
416 } else {
417 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
418 }
419
420 return memalloc;
421}
422
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700423bool isMacroTileEnabled(int format, int usage)
424{
425 bool tileEnabled = false;
426
427 // Check whether GPU & MDSS supports MacroTiling feature
428 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
429 qdutils::MDPVersion::getInstance().supportsMacroTile())
430 {
431 // check the format
432 switch(format)
433 {
434 case HAL_PIXEL_FORMAT_RGBA_8888:
435 case HAL_PIXEL_FORMAT_RGBX_8888:
436 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800437 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700438 {
439 tileEnabled = true;
440 // check the usage flags
441 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
442 GRALLOC_USAGE_SW_WRITE_MASK)) {
443 // Application intends to use CPU for rendering
444 tileEnabled = false;
445 }
446 break;
447 }
448 default:
449 break;
450 }
451 }
452 return tileEnabled;
453}
454
455// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800456unsigned int getSize(int format, int width, int height, int usage,
457 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700458
Sushil Chauhan65e26302015-01-14 10:48:57 -0800459 if (isUBwcEnabled(format, usage)) {
460 return getUBwcSize(width, height, format, alignedw, alignedh);
461 }
462
463 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700464 switch (format) {
465 case HAL_PIXEL_FORMAT_RGBA_8888:
466 case HAL_PIXEL_FORMAT_RGBX_8888:
467 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700468 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700469 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700470 size = alignedw * alignedh * 4;
471 break;
472 case HAL_PIXEL_FORMAT_RGB_888:
473 size = alignedw * alignedh * 3;
474 break;
475 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700476 case HAL_PIXEL_FORMAT_RGBA_5551:
477 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400478 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700479 size = alignedw * alignedh * 2;
480 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700481 case HAL_PIXEL_FORMAT_RAW10:
482 size = ALIGN(alignedw * alignedh, 4096);
483 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700484
485 // adreno formats
486 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
487 size = ALIGN(alignedw*alignedh, 4096);
488 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
489 break;
490 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
491 // The chroma plane is subsampled,
492 // but the pitch in bytes is unchanged
493 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700494 size = ALIGN( alignedw * alignedh, 8192);
495 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
496 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700497 case HAL_PIXEL_FORMAT_YV12:
498 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
499 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800500 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700501 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400502 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700503 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700504 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700505 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800506 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
507 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400508 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800509 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700510 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
511 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700512 case HAL_PIXEL_FORMAT_YCbCr_422_I:
513 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700514 if(width & 1) {
515 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800516 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700517 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700518 size = ALIGN(alignedw * alignedh * 2, 4096);
519 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700520 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400521 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700522 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700523 break;
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530524 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
525 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV21, width, height);
526 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400527 case HAL_PIXEL_FORMAT_BLOB:
528 if(height != 1) {
529 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
530 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800531 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400532 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400533 size = width;
534 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700535 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700536 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
537 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500538 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
539 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
540 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
541 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
542 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
543 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
544 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
545 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
546 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
547 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
548 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
549 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
550 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
551 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
552 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
553 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
554 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
555 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
556 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
557 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
558 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
559 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
560 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
561 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
562 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
563 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
564 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800565 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500566 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
567 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700568 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800569 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800570 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700571 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700572 return size;
573}
574
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700575unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700576 int& alignedw, int &alignedh)
577{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700578 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700579
580 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
581 height,
582 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800583 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700584 alignedw,
585 alignedh);
586
Sushil Chauhan65e26302015-01-14 10:48:57 -0800587 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700588
589 return size;
590}
591
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700592
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700593unsigned int getBufferSizeAndDimensions(int width, int height, int format,
594 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700595{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700596 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700597
598 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
599 height,
600 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800601 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700602 alignedw,
603 alignedh);
604
Sushil Chauhan65e26302015-01-14 10:48:57 -0800605 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700606
607 return size;
608}
609
610
611void getBufferAttributes(int width, int height, int format, int usage,
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700612 int& alignedw, int &alignedh, int& tileEnabled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700613{
614 tileEnabled = isMacroTileEnabled(format, usage);
615
616 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
617 height,
618 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800619 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700620 alignedw,
621 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800622 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700623}
624
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400625int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
626{
627 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700628 int width = hnd->width;
629 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700630 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800631 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700632
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400633 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
634
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700635 // Check metadata if the geometry has been updated.
636 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
637 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
638 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
639 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
640 }
641
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400642 // Get the chroma offsets from the handle width/height. We take advantage
643 // of the fact the width _is_ the stride
644 switch (hnd->format) {
645 //Semiplanar
646 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
647 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
648 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
649 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700650 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400651 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700652 ycbcr->cb = (void*)(hnd->base + ystride * height);
653 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400654 ycbcr->ystride = ystride;
655 ycbcr->cstride = cstride;
656 ycbcr->chroma_step = 2;
657 break;
658
Sushil Chauhan4686c972015-02-20 15:44:52 -0800659 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
660 // NV12_UBWC buffer has these 4 planes in the following sequence:
661 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
662 unsigned int y_meta_stride, y_meta_height, y_meta_size;
663 unsigned int y_stride, y_height, y_size;
664 unsigned int c_meta_stride, c_meta_height, c_meta_size;
665
666 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
667 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
668 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
669
670 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
671 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
672 y_size = ALIGN((y_stride * y_height), alignment);
673
674 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
675 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
676 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
677
678 ycbcr->y = (void*)(hnd->base + y_meta_size);
679 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
680 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
681 c_meta_size + 1);
682 ycbcr->ystride = y_stride;
683 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
684 ycbcr->chroma_step = 2;
685 break;
686
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400687 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
688 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
689 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530690 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400691 case HAL_PIXEL_FORMAT_NV21_ZSL:
692 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700693 case HAL_PIXEL_FORMAT_RAW10:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700694 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400695 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700696 ycbcr->cr = (void*)(hnd->base + ystride * height);
697 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400698 ycbcr->ystride = ystride;
699 ycbcr->cstride = cstride;
700 ycbcr->chroma_step = 2;
701 break;
702
703 //Planar
704 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700705 ystride = width;
706 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400707 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700708 ycbcr->cr = (void*)(hnd->base + ystride * height);
709 ycbcr->cb = (void*)(hnd->base + ystride * height +
710 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400711 ycbcr->ystride = ystride;
712 ycbcr->cstride = cstride;
713 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400714 break;
715 //Unsupported formats
716 case HAL_PIXEL_FORMAT_YCbCr_422_I:
717 case HAL_PIXEL_FORMAT_YCrCb_422_I:
718 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
719 default:
720 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
721 hnd->format);
722 err = -EINVAL;
723 }
724 return err;
725
726}
727
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700728
729
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700730// Allocate buffer from width, height and format into a
731// private_handle_t. It is the responsibility of the caller
732// to free the buffer using the free_buffer function
733int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
734{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700735 alloc_data data;
736 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700737 gralloc::IAllocController* sAlloc =
738 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700739 data.base = 0;
740 data.fd = -1;
741 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700742 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
743 alignedh);
744
Naseer Ahmed29a26812012-06-14 00:56:20 -0700745 data.align = getpagesize();
746 data.uncached = useUncached(usage);
747 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700748
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700749 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700750 if (0 != err) {
751 ALOGE("%s: allocate failed", __FUNCTION__);
752 return -ENOMEM;
753 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700754
Naseer Ahmed29a26812012-06-14 00:56:20 -0700755 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700756 data.allocType, 0, format,
757 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700758 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700759 hnd->offset = data.offset;
760 hnd->gpuaddr = 0;
761 *pHnd = hnd;
762 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700763}
764
765void free_buffer(private_handle_t *hnd)
766{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700767 gralloc::IAllocController* sAlloc =
768 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700769 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700770 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700771 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
772 }
773 if(hnd)
774 delete hnd;
775
776}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800777
778// UBWC helper functions
779static bool isUBwcFormat(int format)
780{
781 // Explicitly defined UBWC formats
782 switch(format)
783 {
784 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
785 return true;
786 default:
787 return false;
788 }
789}
790
791static bool isUBwcSupported(int format)
792{
793 // Existing HAL formats with UBWC support
794 switch(format)
795 {
796 case HAL_PIXEL_FORMAT_RGB_565:
797 case HAL_PIXEL_FORMAT_RGBA_8888:
798 case HAL_PIXEL_FORMAT_sRGB_A_8888:
799 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
800 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
801 return true;
802 default:
803 return false;
804 }
805}
806
807bool isUBwcEnabled(int format, int usage)
808{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800809 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
810 if (isUBwcFormat(format))
811 return true;
812
813 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
814 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
815 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
816 // Allow UBWC, only if CPU usage flags are not set
817 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800818 GRALLOC_USAGE_SW_WRITE_MASK))) {
819 return true;
820 }
821 }
822 return false;
823}
824
825static void getUBwcWidthAndHeight(int width, int height, int format,
826 int& aligned_w, int& aligned_h)
827{
828 switch (format)
829 {
830 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
831 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
832 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
833 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
834 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
835 break;
836 default:
837 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
838 aligned_w = 0;
839 aligned_h = 0;
840 break;
841 }
842}
843
844static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
845{
846 block_width = 0;
847 block_height = 0;
848
849 switch(bpp)
850 {
851 case 2:
852 case 4:
853 block_width = 16;
854 block_height = 4;
855 break;
856 case 8:
857 block_width = 8;
858 block_height = 4;
859 break;
860 case 16:
861 block_width = 4;
862 block_height = 4;
863 break;
864 default:
865 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
866 break;
867 }
868}
869
870static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
871{
872 unsigned int size = 0;
873 int meta_width, meta_height;
874 int block_width, block_height;
875
876 getUBwcBlockSize(bpp, block_width, block_height);
877
878 if (!block_width || !block_height) {
879 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
880 return size;
881 }
882
883 // Align meta buffer height to 16 blocks
884 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
885
886 // Align meta buffer width to 64 blocks
887 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
888
889 // Align meta buffer size to 4K
890 size = ((meta_width * meta_height), 4096);
891 return size;
892}
893
894static unsigned int getUBwcSize(int width, int height, int format,
895 const int alignedw, const int alignedh) {
896
897 unsigned int size = 0;
898 switch (format) {
899 case HAL_PIXEL_FORMAT_RGB_565:
900 size = alignedw * alignedh * 2;
901 size += getUBwcMetaBufferSize(width, height, 2);
902 break;
903 case HAL_PIXEL_FORMAT_RGBA_8888:
904 case HAL_PIXEL_FORMAT_sRGB_A_8888:
905 size = alignedw * alignedh * 4;
906 size += getUBwcMetaBufferSize(width, height, 4);
907 break;
908 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
909 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
910 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
911 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
912 break;
913 default:
914 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
915 break;
916 }
917 return size;
918}