blob: 695de9bd826bd6642bc2656a744c629f90db017f [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Mansoor Aftabe9912a62014-07-15 01:40:26 -07002 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Naseer Ahmeda87da602012-07-01 23:54:19 -070038#include "comptype.h"
Manoj Kumar AVM8a220812013-10-10 11:46:06 -070039#include "mdp_version.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070040#include <qdMetaData.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070041
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080042#ifdef VENUS_COLOR_FORMAT
43#include <media/msm_media_info.h>
44#else
45#define VENUS_Y_STRIDE(args...) 0
46#define VENUS_Y_SCANLINES(args...) 0
47#define VENUS_BUFFER_SIZE(args...) 0
48#endif
49
Naseer Ahmed63326f42013-12-18 02:45:48 -050050#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050051
Shalaj Jain3c490412015-04-22 16:52:03 -070052#ifndef ION_FLAG_CP_PIXEL
Shalaj Jain1f9725a2015-03-04 17:53:49 -080053#define ION_FLAG_CP_PIXEL 0
Shalaj Jain1f9725a2015-03-04 17:53:49 -080054#endif
55
56#ifndef ION_FLAG_ALLOW_NON_CONTIG
57#define ION_FLAG_ALLOW_NON_CONTIG 0
58#endif
59
Shalaj Jain3c490412015-04-22 16:52:03 -070060#ifdef MASTER_SIDE_CP
61#define CP_HEAP_ID ION_SECURE_HEAP_ID
62/* Please Add the new SD ION Heap here */
63#define SD_HEAP_ID 0
64#define ION_CP_FLAGS (ION_SECURE | ION_FLAG_CP_PIXEL)
65/* Please Add the new SD ION Flag here */
66#define ION_SD_FLAGS ION_SECURE
67#else // SLAVE_SIDE_CP
68#define CP_HEAP_ID ION_CP_MM_HEAP_ID
69#define SD_HEAP_ID CP_HEAP_ID
70#define ION_CP_FLAGS (ION_SECURE | ION_FLAG_ALLOW_NON_CONTIG)
71#define ION_SD_FLAGS ION_SECURE
72#endif
73
Iliyan Malchev202a77d2012-06-11 14:41:12 -070074using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070075using namespace qdutils;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070076
Naomi Luisa44100c2013-02-08 12:42:03 -080077ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
78
Sushil Chauhan65e26302015-01-14 10:48:57 -080079static void getUBwcWidthAndHeight(int, int, int, int&, int&);
80static unsigned int getUBwcSize(int, int, int, const int, const int);
81
Iliyan Malchev202a77d2012-06-11 14:41:12 -070082//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070083
Saurabh Shah1adcafe2014-12-19 10:05:41 -080084/* The default policy is to return cached buffers unless the client explicity
85 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
86 * read or written in software. Any combination with a _RARELY_ flag will be
87 * treated as uncached. */
88static bool useUncached(const int& usage) {
89 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
90 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
91 GRALLOC_USAGE_SW_WRITE_RARELY) or
92 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
93 GRALLOC_USAGE_SW_READ_RARELY))
94 return true;
95
96 return false;
97}
98
Naomi Luisa44100c2013-02-08 12:42:03 -080099//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800100AdrenoMemInfo::AdrenoMemInfo()
101{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800102 LINK_adreno_compute_aligned_width_and_height = NULL;
103 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700104 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800105 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800106 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800107
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800108 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
109 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800110 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700111 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
112 *(void **)&LINK_adreno_compute_padding =
113 ::dlsym(libadreno_utils, "compute_surface_padding");
114 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
115 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800116 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
117 ::dlsym(libadreno_utils,
118 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800119 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
120 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800121 }
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700122
123 // Check if the overriding property debug.gralloc.gfx_ubwc_disable
124 // that disables UBWC allocations for the graphics stack is set
125 gfx_ubwc_disable = 0;
126 char property[PROPERTY_VALUE_MAX];
127 property_get("debug.gralloc.gfx_ubwc_disable", property, "0");
128 if(!(strncmp(property, "1", PROPERTY_VALUE_MAX)) ||
129 !(strncmp(property, "true", PROPERTY_VALUE_MAX))) {
130 gfx_ubwc_disable = 1;
131 }
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800132}
133
134AdrenoMemInfo::~AdrenoMemInfo()
135{
136 if (libadreno_utils) {
137 ::dlclose(libadreno_utils);
138 }
139}
140
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700141int AdrenoMemInfo::isMacroTilingSupportedByGPU()
142{
143 if ((libadreno_utils)) {
144 if(LINK_adreno_isMacroTilingSupportedByGpu) {
145 return LINK_adreno_isMacroTilingSupportedByGpu();
146 }
147 }
148 return 0;
149}
150
151
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800152void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800153 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800154{
Sushil Chauhan65e26302015-01-14 10:48:57 -0800155
Sushil Chauhane61fac52015-04-30 17:14:37 -0700156 bool ubwc_enabled = isUBwcEnabled(format, usage);
157
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800158 // Currently surface padding is only computed for RGB* surfaces.
Jesse Hallfbe96d22013-09-20 01:39:43 -0700159 if (format <= HAL_PIXEL_FORMAT_sRGB_X_8888) {
Sushil Chauhane61fac52015-04-30 17:14:37 -0700160 int tileEnabled = ubwc_enabled || isMacroTileEnabled(format, usage);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800161 AdrenoMemInfo::getInstance().getGpuAlignedWidthHeight(width,
162 height, format, tileEnabled, aligned_w, aligned_h);
163 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800164 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800165
Sushil Chauhane61fac52015-04-30 17:14:37 -0700166 if (ubwc_enabled) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800167 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
168 return;
169 }
170
171 aligned_w = width;
172 aligned_h = height;
173 switch (format)
174 {
175 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
176 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800177 aligned_w = ALIGN(width, 32);
178 break;
Shuzhen Wang2a000b22014-08-20 00:15:51 -0700179 case HAL_PIXEL_FORMAT_RAW_SENSOR:
180 aligned_w = ALIGN(width, 16);
181 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700182 case HAL_PIXEL_FORMAT_RAW10:
183 aligned_w = ALIGN(width * 10 /8, 16);
184 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800185 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
186 aligned_w = ALIGN(width, 128);
187 break;
188 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
189 case HAL_PIXEL_FORMAT_YV12:
190 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
191 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
192 case HAL_PIXEL_FORMAT_YCbCr_422_I:
193 case HAL_PIXEL_FORMAT_YCrCb_422_I:
194 aligned_w = ALIGN(width, 16);
195 break;
196 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
197 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
198 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
199 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
200 break;
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530201 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
202 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV21, width);
203 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV21, height);
204 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800205 case HAL_PIXEL_FORMAT_BLOB:
206 break;
207 case HAL_PIXEL_FORMAT_NV21_ZSL:
208 aligned_w = ALIGN(width, 64);
209 aligned_h = ALIGN(height, 64);
210 break;
211 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
212 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
213 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
214 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
215 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
216 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
217 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
218 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
219 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
220 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
221 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
222 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
223 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
224 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
225 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
226 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
227 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
228 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
229 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
230 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
231 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
232 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
233 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
234 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
235 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
236 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
237 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
238 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
239 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
240 int bytesPerPixel = 0;
241 int raster_mode = 0; //Adreno unknown raster mode.
242 int padding_threshold = 512; //Threshold for padding
243 //surfaces.
244
245 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
246 width, height, format, 0,raster_mode, padding_threshold,
247 &aligned_w, &aligned_h, &bytesPerPixel);
248 } else {
249 ALOGW("%s: Warning!! Symbols" \
250 " compute_compressedfmt_aligned_width_and_height" \
251 " not found", __FUNCTION__);
252 }
253 break;
254 default: break;
255 }
256}
257
258void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
259 int tile_enabled, int& aligned_w, int& aligned_h)
260{
261 aligned_w = ALIGN(width, 32);
262 aligned_h = ALIGN(height, 32);
263
264 // Don't add any additional padding if debug.gralloc.map_fb_memory
265 // is enabled
266 char property[PROPERTY_VALUE_MAX];
267 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
268 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
269 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
270 return;
271 }
272
273 int bpp = 4;
274 switch(format)
275 {
276 case HAL_PIXEL_FORMAT_RGB_888:
277 bpp = 3;
278 break;
279 case HAL_PIXEL_FORMAT_RGB_565:
280 case HAL_PIXEL_FORMAT_RGBA_5551:
281 case HAL_PIXEL_FORMAT_RGBA_4444:
282 bpp = 2;
283 break;
284 default: break;
285 }
286
287 if (libadreno_utils) {
288 int raster_mode = 0; // Adreno unknown raster mode.
289 int padding_threshold = 512; // Threshold for padding surfaces.
290 // the function below computes aligned width and aligned height
291 // based on linear or macro tile mode selected.
292 if(LINK_adreno_compute_aligned_width_and_height) {
293 LINK_adreno_compute_aligned_width_and_height(width,
294 height, bpp, tile_enabled,
295 raster_mode, padding_threshold,
296 &aligned_w, &aligned_h);
297
298 } else if(LINK_adreno_compute_padding) {
299 int surface_tile_height = 1; // Linear surface
300 aligned_w = LINK_adreno_compute_padding(width, bpp,
301 surface_tile_height, raster_mode,
302 padding_threshold);
303 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
304 __FUNCTION__);
305 } else {
306 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
307 "compute_aligned_width_and_height not found", __FUNCTION__);
308 }
309 }
310}
311
312int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
313{
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700314 if (!gfx_ubwc_disable && libadreno_utils) {
Sushil Chauhan082acd62015-01-14 16:49:29 -0800315 if (LINK_adreno_isUBWCSupportedByGpu) {
316 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
317 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
318 }
319 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800320 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800321}
322
Sushil Chauhan082acd62015-01-14 16:49:29 -0800323ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
324{
325 switch (hal_format) {
326 case HAL_PIXEL_FORMAT_RGBA_8888:
327 return ADRENO_PIXELFORMAT_R8G8B8A8;
Sushil Chauhan6686c802015-04-15 11:30:39 -0700328 case HAL_PIXEL_FORMAT_RGBX_8888:
329 return ADRENO_PIXELFORMAT_R8G8B8X8;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800330 case HAL_PIXEL_FORMAT_RGB_565:
331 return ADRENO_PIXELFORMAT_B5G6R5;
332 case HAL_PIXEL_FORMAT_sRGB_A_8888:
333 return ADRENO_PIXELFORMAT_R8G8B8A8_SRGB;
334 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800335 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800336 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
337 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800338 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800339 default:
340 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
341 break;
342 }
343 return ADRENO_PIXELFORMAT_UNKNOWN;
344}
345
Naomi Luisa44100c2013-02-08 12:42:03 -0800346//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700347IAllocController* IAllocController::sController = NULL;
348IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700349{
350 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700351 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700352 }
353 return sController;
354}
355
356
357//-------------- IonController-----------------------//
358IonController::IonController()
359{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530360 allocateIonMem();
361}
362
363void IonController::allocateIonMem()
364{
365 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700366}
367
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700368int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700369{
370 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500371 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700372 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700373
374 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700375 data.allocType = 0;
376
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530377 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530378 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800379 if (usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY) {
Shalaj Jain3c490412015-04-22 16:52:03 -0700380 ionHeapId = ION_HEAP(SD_HEAP_ID);
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800381 /*
382 * There is currently no flag in ION for Secure Display
Shalaj Jain3c490412015-04-22 16:52:03 -0700383 * VM. Please add it to the define once available.
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800384 */
Shalaj Jain3c490412015-04-22 16:52:03 -0700385 ionFlags |= ION_SD_FLAGS;
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800386 } else {
Shalaj Jain3c490412015-04-22 16:52:03 -0700387 ionHeapId = ION_HEAP(CP_HEAP_ID);
388 ionFlags |= ION_CP_FLAGS;
Shalaj Jain13cdf812014-12-02 16:20:54 -0800389 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530390 } else {
391 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500392 // do not set ion secure flag & MM heap. Fallback to system heap.
393 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530394 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500395 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530396 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
397 //MM Heap is exclusively a secure heap.
398 //If it is used for non secure cases, fallback to IOMMU heap
399 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
400 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500401 trying to use system heap instead !!");
402 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500403 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700404
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700405 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500406 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700407
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700408 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500409 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700410
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530411 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500412 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700413
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500414 // if no ion heap flags are set, default to system heap
415 if(!ionHeapId)
416 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700417
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500418 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700419 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500420 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700421 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700422
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700423 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700424 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500425 } else {
426 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
427 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700428 }
429
430 return ret;
431}
432
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700433IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700434{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700435 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700436 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
437 memalloc = mIonAlloc;
438 } else {
439 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
440 }
441
442 return memalloc;
443}
444
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700445bool isMacroTileEnabled(int format, int usage)
446{
447 bool tileEnabled = false;
448
449 // Check whether GPU & MDSS supports MacroTiling feature
450 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
451 qdutils::MDPVersion::getInstance().supportsMacroTile())
452 {
453 // check the format
454 switch(format)
455 {
456 case HAL_PIXEL_FORMAT_RGBA_8888:
457 case HAL_PIXEL_FORMAT_RGBX_8888:
458 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800459 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700460 {
461 tileEnabled = true;
462 // check the usage flags
463 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
464 GRALLOC_USAGE_SW_WRITE_MASK)) {
465 // Application intends to use CPU for rendering
466 tileEnabled = false;
467 }
468 break;
469 }
470 default:
471 break;
472 }
473 }
474 return tileEnabled;
475}
476
477// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800478unsigned int getSize(int format, int width, int height, int usage,
479 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700480
Sushil Chauhan65e26302015-01-14 10:48:57 -0800481 if (isUBwcEnabled(format, usage)) {
482 return getUBwcSize(width, height, format, alignedw, alignedh);
483 }
484
485 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700486 switch (format) {
487 case HAL_PIXEL_FORMAT_RGBA_8888:
488 case HAL_PIXEL_FORMAT_RGBX_8888:
489 case HAL_PIXEL_FORMAT_BGRA_8888:
Naseer Ahmed82fc4b72013-09-20 01:31:37 -0700490 case HAL_PIXEL_FORMAT_sRGB_A_8888:
Jesse Hallfbe96d22013-09-20 01:39:43 -0700491 case HAL_PIXEL_FORMAT_sRGB_X_8888:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700492 size = alignedw * alignedh * 4;
493 break;
494 case HAL_PIXEL_FORMAT_RGB_888:
495 size = alignedw * alignedh * 3;
496 break;
497 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700498 case HAL_PIXEL_FORMAT_RGBA_5551:
499 case HAL_PIXEL_FORMAT_RGBA_4444:
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400500 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700501 size = alignedw * alignedh * 2;
502 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700503 case HAL_PIXEL_FORMAT_RAW10:
504 size = ALIGN(alignedw * alignedh, 4096);
505 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700506
507 // adreno formats
508 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
509 size = ALIGN(alignedw*alignedh, 4096);
510 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
511 break;
512 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
513 // The chroma plane is subsampled,
514 // but the pitch in bytes is unchanged
515 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700516 size = ALIGN( alignedw * alignedh, 8192);
517 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
518 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700519 case HAL_PIXEL_FORMAT_YV12:
520 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
521 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800522 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700523 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400524 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700525 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700526 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700527 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800528 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
529 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400530 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800531 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700532 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
533 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700534 case HAL_PIXEL_FORMAT_YCbCr_422_I:
535 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700536 if(width & 1) {
537 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800538 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700539 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700540 size = ALIGN(alignedw * alignedh * 2, 4096);
541 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700542 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400543 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700544 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700545 break;
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530546 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
547 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV21, width, height);
548 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400549 case HAL_PIXEL_FORMAT_BLOB:
550 if(height != 1) {
551 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
552 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800553 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400554 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400555 size = width;
556 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700557 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700558 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
559 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500560 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
561 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
562 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
563 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
564 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
565 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
566 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
567 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
568 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
569 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
570 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
571 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
572 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
573 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
574 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
575 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
576 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
577 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
578 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
579 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
580 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
581 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
582 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
583 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
584 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
585 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
586 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800587 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500588 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
589 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700590 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800591 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800592 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700593 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700594 return size;
595}
596
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700597unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700598 int& alignedw, int &alignedh)
599{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700600 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700601
602 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
603 height,
604 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800605 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700606 alignedw,
607 alignedh);
608
Sushil Chauhan65e26302015-01-14 10:48:57 -0800609 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700610
611 return size;
612}
613
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700614
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700615unsigned int getBufferSizeAndDimensions(int width, int height, int format,
616 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700617{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700618 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700619
620 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
621 height,
622 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800623 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700624 alignedw,
625 alignedh);
626
Sushil Chauhan65e26302015-01-14 10:48:57 -0800627 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700628
629 return size;
630}
631
632
633void getBufferAttributes(int width, int height, int format, int usage,
Sushil Chauhane61fac52015-04-30 17:14:37 -0700634 int& alignedw, int &alignedh, int& tiled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700635{
Sushil Chauhane61fac52015-04-30 17:14:37 -0700636 tiled = isUBwcEnabled(format, usage) || isMacroTileEnabled(format, usage);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700637
638 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
639 height,
640 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800641 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700642 alignedw,
643 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800644 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700645}
646
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400647int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
648{
649 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700650 int width = hnd->width;
651 int height = hnd->height;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700652 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800653 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700654
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400655 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
656
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700657 // Check metadata if the geometry has been updated.
658 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
659 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
660 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
661 metadata->bufferDim.sliceHeight, hnd->format, 0, width, height);
662 }
663
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400664 // Get the chroma offsets from the handle width/height. We take advantage
665 // of the fact the width _is_ the stride
666 switch (hnd->format) {
667 //Semiplanar
668 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
669 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
670 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
671 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700672 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400673 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700674 ycbcr->cb = (void*)(hnd->base + ystride * height);
675 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400676 ycbcr->ystride = ystride;
677 ycbcr->cstride = cstride;
678 ycbcr->chroma_step = 2;
679 break;
680
Sushil Chauhan4686c972015-02-20 15:44:52 -0800681 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
682 // NV12_UBWC buffer has these 4 planes in the following sequence:
683 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
684 unsigned int y_meta_stride, y_meta_height, y_meta_size;
685 unsigned int y_stride, y_height, y_size;
686 unsigned int c_meta_stride, c_meta_height, c_meta_size;
687
688 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
689 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
690 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
691
692 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
693 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
694 y_size = ALIGN((y_stride * y_height), alignment);
695
696 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
697 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
698 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
699
700 ycbcr->y = (void*)(hnd->base + y_meta_size);
701 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
702 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
703 c_meta_size + 1);
704 ycbcr->ystride = y_stride;
705 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
706 ycbcr->chroma_step = 2;
707 break;
708
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400709 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
710 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
711 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530712 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400713 case HAL_PIXEL_FORMAT_NV21_ZSL:
714 case HAL_PIXEL_FORMAT_RAW_SENSOR:
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700715 case HAL_PIXEL_FORMAT_RAW10:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700716 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400717 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700718 ycbcr->cr = (void*)(hnd->base + ystride * height);
719 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400720 ycbcr->ystride = ystride;
721 ycbcr->cstride = cstride;
722 ycbcr->chroma_step = 2;
723 break;
724
725 //Planar
726 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700727 ystride = width;
728 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400729 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700730 ycbcr->cr = (void*)(hnd->base + ystride * height);
731 ycbcr->cb = (void*)(hnd->base + ystride * height +
732 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400733 ycbcr->ystride = ystride;
734 ycbcr->cstride = cstride;
735 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400736 break;
737 //Unsupported formats
738 case HAL_PIXEL_FORMAT_YCbCr_422_I:
739 case HAL_PIXEL_FORMAT_YCrCb_422_I:
740 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
741 default:
742 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__,
743 hnd->format);
744 err = -EINVAL;
745 }
746 return err;
747
748}
749
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700750
751
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700752// Allocate buffer from width, height and format into a
753// private_handle_t. It is the responsibility of the caller
754// to free the buffer using the free_buffer function
755int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
756{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700757 alloc_data data;
758 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700759 gralloc::IAllocController* sAlloc =
760 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700761 data.base = 0;
762 data.fd = -1;
763 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700764 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
765 alignedh);
766
Naseer Ahmed29a26812012-06-14 00:56:20 -0700767 data.align = getpagesize();
768 data.uncached = useUncached(usage);
769 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700770
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700771 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700772 if (0 != err) {
773 ALOGE("%s: allocate failed", __FUNCTION__);
774 return -ENOMEM;
775 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700776
Naseer Ahmed29a26812012-06-14 00:56:20 -0700777 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700778 data.allocType, 0, format,
779 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700780 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700781 hnd->offset = data.offset;
782 hnd->gpuaddr = 0;
783 *pHnd = hnd;
784 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700785}
786
787void free_buffer(private_handle_t *hnd)
788{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700789 gralloc::IAllocController* sAlloc =
790 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700791 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700792 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700793 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
794 }
795 if(hnd)
796 delete hnd;
797
798}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800799
800// UBWC helper functions
801static bool isUBwcFormat(int format)
802{
803 // Explicitly defined UBWC formats
804 switch(format)
805 {
806 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
807 return true;
808 default:
809 return false;
810 }
811}
812
813static bool isUBwcSupported(int format)
814{
815 // Existing HAL formats with UBWC support
816 switch(format)
817 {
818 case HAL_PIXEL_FORMAT_RGB_565:
819 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -0700820 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800821 case HAL_PIXEL_FORMAT_sRGB_A_8888:
822 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
823 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
824 return true;
825 default:
826 return false;
827 }
828}
829
830bool isUBwcEnabled(int format, int usage)
831{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800832 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
833 if (isUBwcFormat(format))
834 return true;
835
836 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
837 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
838 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
839 // Allow UBWC, only if CPU usage flags are not set
840 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800841 GRALLOC_USAGE_SW_WRITE_MASK))) {
842 return true;
843 }
844 }
845 return false;
846}
847
848static void getUBwcWidthAndHeight(int width, int height, int format,
849 int& aligned_w, int& aligned_h)
850{
851 switch (format)
852 {
853 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
854 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
855 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
856 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
857 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
858 break;
859 default:
860 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
861 aligned_w = 0;
862 aligned_h = 0;
863 break;
864 }
865}
866
867static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
868{
869 block_width = 0;
870 block_height = 0;
871
872 switch(bpp)
873 {
874 case 2:
875 case 4:
876 block_width = 16;
877 block_height = 4;
878 break;
879 case 8:
880 block_width = 8;
881 block_height = 4;
882 break;
883 case 16:
884 block_width = 4;
885 block_height = 4;
886 break;
887 default:
888 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
889 break;
890 }
891}
892
893static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
894{
895 unsigned int size = 0;
896 int meta_width, meta_height;
897 int block_width, block_height;
898
899 getUBwcBlockSize(bpp, block_width, block_height);
900
901 if (!block_width || !block_height) {
902 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
903 return size;
904 }
905
906 // Align meta buffer height to 16 blocks
907 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
908
909 // Align meta buffer width to 64 blocks
910 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
911
912 // Align meta buffer size to 4K
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700913 size = ALIGN((meta_width * meta_height), 4096);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800914 return size;
915}
916
917static unsigned int getUBwcSize(int width, int height, int format,
918 const int alignedw, const int alignedh) {
919
920 unsigned int size = 0;
921 switch (format) {
922 case HAL_PIXEL_FORMAT_RGB_565:
923 size = alignedw * alignedh * 2;
924 size += getUBwcMetaBufferSize(width, height, 2);
925 break;
926 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -0700927 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800928 case HAL_PIXEL_FORMAT_sRGB_A_8888:
929 size = alignedw * alignedh * 4;
930 size += getUBwcMetaBufferSize(width, height, 4);
931 break;
932 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
933 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
934 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
935 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
936 break;
937 default:
938 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
939 break;
940 }
941 return size;
942}
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700943
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700944int getRgbDataAddress(private_handle_t* hnd, void** rgb_data)
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700945{
946 int err = 0;
947
948 // This api is for RGB* formats
949 if (hnd->format > HAL_PIXEL_FORMAT_sRGB_X_8888) {
950 return -EINVAL;
951 }
952
953 // linear buffer
954 if (!(hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED)) {
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700955 *rgb_data = (void*)hnd->base;
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700956 return err;
957 }
958
959 unsigned int meta_size = 0;
960 switch (hnd->format) {
961 case HAL_PIXEL_FORMAT_RGB_565:
962 meta_size = getUBwcMetaBufferSize(hnd->width, hnd->height, 2);
963 break;
964 case HAL_PIXEL_FORMAT_RGBA_8888:
965 case HAL_PIXEL_FORMAT_RGBX_8888:
966 case HAL_PIXEL_FORMAT_sRGB_A_8888:
967 meta_size = getUBwcMetaBufferSize(hnd->width, hnd->height, 4);
968 break;
969 default:
970 ALOGE("%s:Unsupported RGB format: 0x%x", __FUNCTION__, hnd->format);
971 err = -EINVAL;
972 break;
973 }
974
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700975 *rgb_data = (void*)(hnd->base + meta_size);
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700976 return err;
977}