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Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
Rohit Kulkarni21649ef2018-02-08 14:39:40 -08002* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
Saurabh Shah66c941b2016-07-06 17:34:05 -07003*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
13* * Neither the name of The Linux Foundation nor the names of its
14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070041
42namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080043
44typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
45
Saurabh Shah66c941b2016-07-06 17:34:05 -070046/*
47 * Drm Atomic Operation Codes
48 */
49enum struct DRMOps {
50 /*
51 * Op: Sets plane source crop
52 * Arg: uint32_t - Plane ID
53 * DRMRect - Source Rectangle
54 */
55 PLANE_SET_SRC_RECT,
56 /*
57 * Op: Sets plane destination rect
58 * Arg: uint32_t - Plane ID
59 * DRMRect - Dst Rectangle
60 */
61 PLANE_SET_DST_RECT,
62 /*
Namit Solanki6d0d8062017-11-30 17:29:48 +053063 * Op: Sets plane exclusion rect
64 * Arg: uint32_t - Plane ID
65 * drm_clip_rect - Exclusion Rectangle
66 */
67 PLANE_SET_EXCL_RECT,
68 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -070069 * Op: Sets plane zorder
70 * Arg: uint32_t - Plane ID
71 * uint32_t - zorder
72 */
73 PLANE_SET_ZORDER,
74 /*
75 * Op: Sets plane rotation flags
76 * Arg: uint32_t - Plane ID
77 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
78 */
79 PLANE_SET_ROTATION,
80 /*
81 * Op: Sets plane alpha
82 * Arg: uint32_t - Plane ID
83 * uint32_t - alpha value
84 */
85 PLANE_SET_ALPHA,
86 /*
87 * Op: Sets the blend type
88 * Arg: uint32_t - Plane ID
89 * uint32_t - blend type (see DRMBlendType)
90 */
91 PLANE_SET_BLEND_TYPE,
92 /*
93 * Op: Sets horizontal decimation
94 * Arg: uint32_t - Plane ID
95 * uint32_t - decimation factor
96 */
97 PLANE_SET_H_DECIMATION,
98 /*
99 * Op: Sets vertical decimation
100 * Arg: uint32_t - Plane ID
101 * uint32_t - decimation factor
102 */
103 PLANE_SET_V_DECIMATION,
104 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800105 * Op: Sets source config flags
106 * Arg: uint32_t - Plane ID
107 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
108 */
109 PLANE_SET_SRC_CONFIG,
110 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700111 * Op: Sets frame buffer ID for plane. Set together with CRTC.
112 * Arg: uint32_t - Plane ID
113 * uint32_t - Framebuffer ID
114 */
115 PLANE_SET_FB_ID,
116 /*
117 * Op: Sets the crtc for this plane. Set together with FB_ID.
118 * Arg: uint32_t - Plane ID
119 * uint32_t - CRTC ID
120 */
121 PLANE_SET_CRTC,
122 /*
123 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
124 * Arg: uint32_t - Plane ID
125 * uint32_t - Input fence
126 */
127 PLANE_SET_INPUT_FENCE,
128 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800129 * Op: Sets scaler config on this plane.
130 * Arg: uint32_t - Plane ID
131 * uint64_t - Address of the scaler config object (version based)
132 */
133 PLANE_SET_SCALER_CONFIG,
134 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800135 * Op: Sets plane rotation destination rect
136 * Arg: uint32_t - Plane ID
137 * DRMRect - rotator dst Rectangle
138 */
139 PLANE_SET_ROTATION_DST_RECT,
140 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700141 * Op: Sets FB Secure mode for this plane.
142 * Arg: uint32_t - Plane ID
143 * uint32_t - Value of the FB Secure mode.
144 */
145 PLANE_SET_FB_SECURE_MODE,
146 /*
Ping Li8d6dd622017-07-03 12:05:15 -0700147 * Op: Sets csc config on this plane.
148 * Arg: uint32_t - Plane ID
149 * uint32_t* - pointer to csc type
150 */
151 PLANE_SET_CSC_CONFIG,
152 /*
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800153 * Op: Sets multirect mode on this plane.
154 * Arg: uint32_t - Plane ID
155 * uint32_t - multirect mode
156 */
157 PLANE_SET_MULTIRECT_MODE,
158 /*
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800159 * Op: Sets rotator output frame buffer ID for plane.
160 * Arg: uint32_t - Plane ID
161 * uint32_t - Framebuffer ID
162 */
163 PLANE_SET_ROT_FB_ID,
164 /*
Arun Kumar K.R5d30ab52017-12-28 09:05:36 +0530165 * Op: Sets inverse pma mode on this plane.
166 * Arg: uint32_t - Plane ID
167 * uint32_t - enable/disable inverse pma.
168 */
169 PLANE_SET_INVERSE_PMA,
170 /*
171 * Op: Sets csc config on this plane.
172 * Arg: uint32_t - Plane ID
173 * uint64_t - Address of the csc config object(version based)
174 */
175 PLANE_SET_DGM_CSC_CONFIG,
176 /*
177 * Op: Sets SSPP Feature
178 * Arg: uint32_t - Plane ID
179 * DRMPPFeatureInfo * - PP feature data pointer
180 */
181 PLANE_SET_POST_PROC,
182 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700183 * Op: Activate or deactivate a CRTC
184 * Arg: uint32_t - CRTC ID
185 * uint32_t - 1 to enable, 0 to disable
186 */
187 CRTC_SET_ACTIVE,
188 /*
189 * Op: Sets display mode
190 * Arg: uint32_t - CRTC ID
191 * drmModeModeInfo* - Pointer to display mode
192 */
193 CRTC_SET_MODE,
194 /*
195 * Op: Sets an offset indicating when a release fence should be signalled.
196 * Arg: uint32_t - offset
197 * 0: non-speculative, default
198 * 1: speculative
199 */
200 CRTC_SET_OUTPUT_FENCE_OFFSET,
201 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800202 * Op: Sets overall SDE core clock
203 * Arg: uint32_t - CRTC ID
204 * uint32_t - core_clk
205 */
206 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700207 /*
208 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800209 * Arg: uint32_t - CRTC ID
210 * uint32_t - core_ab
211 */
212 CRTC_SET_CORE_AB,
213 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700214 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800215 * Arg: uint32_t - CRTC ID
216 * uint32_t - core_ib
217 */
218 CRTC_SET_CORE_IB,
219 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700220 * Op: Sets LLCC Bus average bandwidth
221 * Arg: uint32_t - CRTC ID
222 * uint32_t - llcc_ab
223 */
224 CRTC_SET_LLCC_AB,
225 /*
226 * Op: Sets LLCC Bus instantaneous bandwidth
227 * Arg: uint32_t - CRTC ID
228 * uint32_t - llcc_ib
229 */
230 CRTC_SET_LLCC_IB,
231 /*
232 * Op: Sets DRAM bus average bandwidth
233 * Arg: uint32_t - CRTC ID
234 * uint32_t - dram_ab
235 */
236 CRTC_SET_DRAM_AB,
237 /*
238 * Op: Sets DRAM bus instantaneous bandwidth
239 * Arg: uint32_t - CRTC ID
240 * uint32_t - dram_ib
241 */
242 CRTC_SET_DRAM_IB,
243 /*
Ramkumar Radhakrishnanb7910442017-12-11 13:32:47 -0800244 * Op: Sets Rotator BW for inline rotation
245 * Arg: uint32_t - CRTC ID
246 * uint32_t - rot_bw
247 */
248 CRTC_SET_ROT_PREFILL_BW,
249 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700250 * Op: Sets rotator clock for inline rotation
251 * Arg: uint32_t - CRTC ID
252 * uint32_t - rot_clk
253 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530254 CRTC_SET_ROT_CLK,
255 /*
256 * Op: Sets destination scalar data
257 * Arg: uint32_t - CRTC ID
258 * uint64_t - Pointer to destination scalar data
259 */
260 CRTC_SET_DEST_SCALER_CONFIG,
261 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700262 * Op: Returns release fence for this frame. Should be called after Commit() on
263 * DRMAtomicReqInterface.
264 * Arg: uint32_t - CRTC ID
265 * int * - Pointer to an integer that will hold the returned fence
266 */
267 CRTC_GET_RELEASE_FENCE,
268 /*
Ping Li281f48d2017-01-16 12:45:40 -0800269 * Op: Sets PP feature
270 * Arg: uint32_t - CRTC ID
271 * DRMPPFeatureInfo * - PP feature data pointer
272 */
273 CRTC_SET_POST_PROC,
274 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800275 * Op: Sets CRTC ROIs.
276 * Arg: uint32_t - CRTC ID
277 * uint32_t - number of ROIs
278 * DRMRect * - Array of CRTC ROIs
279 */
280 CRTC_SET_ROI,
281 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700282 * Op: Sets Security level for CRTC.
283 * Arg: uint32_t - CRTC ID
284 * uint32_t - Security level
285 */
286 CRTC_SET_SECURITY_LEVEL,
287 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700288 * Op: sets solid fill stages
289 * Arg: uint32_t - CRTC ID
290 * Vector of DRMSolidfillStage
291 */
292 CRTC_SET_SOLIDFILL_STAGES,
293 /*
Anjaneya Prasad Musunurie8c67f22017-07-01 16:16:13 +0530294 * Op: Sets idle timeout.
295 * Arg: uint32_t - CRTC ID
296 * uint32_t - idle timeout in ms
297 */
298 CRTC_SET_IDLE_TIMEOUT,
299 /*
Sushil Chauhan741ac312018-04-02 12:22:16 -0700300 * Op: Sets Capture mode for Concurrent Writeback feature.
301 * Arg: uint32_t - CRTC ID
302 * uint32_t - Capture mode
303 */
304 CRTC_SET_CAPTURE_MODE,
305 /*
Ramkumar Radhakrishnanf985d482018-07-23 18:10:41 -0700306 * Op: Sets Idle PC state for CRTC.
307 * Arg: uint32_t - CRTC ID
308 * uint32_t - idle pc state
309 */
310 CRTC_SET_IDLE_PC_STATE,
311 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700312 * Op: Returns retire fence for this commit. Should be called after Commit() on
313 * DRMAtomicReqInterface.
314 * Arg: uint32_t - Connector ID
315 * int * - Pointer to an integer that will hold the returned fence
316 */
317 CONNECTOR_GET_RETIRE_FENCE,
318 /*
319 * Op: Sets writeback connector destination rect
320 * Arg: uint32_t - Connector ID
321 * DRMRect - Dst Rectangle
322 */
323 CONNECTOR_SET_OUTPUT_RECT,
324 /*
325 * Op: Sets frame buffer ID for writeback connector.
326 * Arg: uint32_t - Connector ID
327 * uint32_t - Framebuffer ID
328 */
329 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700330 /*
331 * Op: Sets power mode for connector.
332 * Arg: uint32_t - Connector ID
333 * uint32_t - Power Mode
334 */
335 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800336 /*
337 * Op: Sets panel ROIs.
338 * Arg: uint32_t - Connector ID
339 * uint32_t - number of ROIs
340 * DRMRect * - Array of Connector ROIs
341 */
342 CONNECTOR_SET_ROI,
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700343 /*
Saurabh Shahf3635952017-10-16 17:08:18 -0700344 * Op: Sets the connector to autorefresh mode.
345 * Arg: uint32_t - Connector ID
346 * uint32_t - Enable-1, Disable-0
347 */
348 CONNECTOR_SET_AUTOREFRESH,
349 /*
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700350 * Op: Set FB secure mode for Writeback connector.
351 * Arg: uint32_t - Connector ID
352 * uint32_t - FB Secure mode
353 */
354 CONNECTOR_SET_FB_SECURE_MODE,
Saurabh Shah82b06f42017-09-06 16:43:49 -0700355 /*
356 * Op: Sets a crtc id to this connector
357 * Arg: uint32_t - Connector ID
358 * uint32_t - CRTC ID
359 */
360 CONNECTOR_SET_CRTC,
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700361 /*
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700362 * Op: Sets PP feature
363 * Arg: uint32_t - Connector ID
364 * DRMPPFeatureInfo * - PP feature data pointer
365 */
Xu Yang32e58c22017-11-20 09:58:11 +0800366 CONNECTOR_SET_POST_PROC,
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700367 /*
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700368 * Op: Sets connector hdr metadata
369 * Arg: uint32_t - Connector ID
370 * drm_msm_ext_hdr_metadata - hdr_metadata
371 */
372 CONNECTOR_SET_HDR_METADATA,
Xu Yang32e58c22017-11-20 09:58:11 +0800373 /*
374 * Op: Cache Dpps features.
375 * Arg: uint32_t - Object ID
376 uint32_t - Feature ID
377 * uint64_t - Pointer to feature config data
378 */
379 DPPS_CACHE_FEATURE,
Xu Yangda642222018-06-12 10:32:33 +0800380 /*
381 * Op: Commit Dpps features.
382 * Arg: drmModeAtomicReq - Atomic request
383 */
384 DPPS_COMMIT_FEATURE,
Sushil Chauhan8f514a52018-02-27 17:35:44 -0800385 /*
386 * Op: Sets qsync mode on connector
387 * Arg: uint32_t - Connector ID
388 * uint32_t - qsync mode
389 */
390 CONNECTOR_SET_QSYNC_MODE,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700391};
392
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700393enum struct DRMRotation {
394 FLIP_H = 0x1,
395 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700396 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700397 ROT_90 = 0x4,
398};
399
Sushil Chauhan3396e202017-04-14 18:34:22 -0700400enum struct DRMPowerMode {
401 ON,
402 DOZE,
403 DOZE_SUSPEND,
404 OFF,
405};
406
Saurabh Shah66c941b2016-07-06 17:34:05 -0700407enum struct DRMBlendType {
408 UNDEFINED = 0,
409 OPAQUE = 1,
410 PREMULTIPLIED = 2,
411 COVERAGE = 3,
412};
413
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800414enum struct DRMSrcConfig {
415 DEINTERLACE = 0,
416};
417
Ramkumar Radhakrishnanf985d482018-07-23 18:10:41 -0700418enum struct DRMIdlePCState {
419 NONE,
420 ENABLE,
421 DISABLE,
422};
423
424
Saurabh Shah66c941b2016-07-06 17:34:05 -0700425/* Display type to identify a suitable connector */
426enum struct DRMDisplayType {
427 PERIPHERAL,
428 TV,
429 VIRTUAL,
430};
431
432struct DRMRect {
433 uint32_t left; // Left-most pixel coordinate.
434 uint32_t top; // Top-most pixel coordinate.
435 uint32_t right; // Right-most pixel coordinate.
436 uint32_t bottom; // Bottom-most pixel coordinate.
437};
438
439//------------------------------------------------------------------------
440// DRM Info Query Types
441//------------------------------------------------------------------------
442
443enum struct QSEEDVersion {
444 V1,
445 V2,
446 V3,
Ramakant Singh1ba882f2018-06-06 10:23:21 +0530447 V3LITE,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700448};
449
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700450/* QSEED3 Step version */
451enum struct QSEEDStepVersion {
452 V2,
453 V3,
454 V4,
Ramakant Singh1ba882f2018-06-06 10:23:21 +0530455 V3LITE_V4,
456 V3LITE_V5,
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700457};
458
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700459enum struct SmartDMARevision {
460 V1,
461 V2,
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530462 V2p5
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700463};
464
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800465/* Inline Rotation version */
466enum struct InlineRotationVersion {
467 UNKNOWN,
468 V1,
469 V1p1, // Rotator FB ID needs to be set
470};
471
Saurabh Shah66c941b2016-07-06 17:34:05 -0700472/* Per CRTC Resource Info*/
473struct DRMCrtcInfo {
474 bool has_src_split;
Srikanth Rajagopalan49380782017-07-06 15:23:12 -0700475 bool has_hdr;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700476 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700477 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700478 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700479 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800480 float ib_fudge_factor;
481 float clk_fudge_factor;
482 uint32_t dest_scale_prefill_lines;
483 uint32_t undersized_prefill_lines;
484 uint32_t macrotile_prefill_lines;
485 uint32_t nv12_prefill_lines;
486 uint32_t linear_prefill_lines;
487 uint32_t downscale_prefill_lines;
488 uint32_t extra_prefill_lines;
489 uint32_t amortized_threshold;
490 uint64_t max_bandwidth_low;
491 uint64_t max_bandwidth_high;
492 uint32_t max_sde_clk;
493 CompRatioMap comp_ratio_rt_map;
494 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700495 uint32_t hw_version;
Namit Solanki24921ab2017-05-23 20:16:25 +0530496 uint32_t dest_scaler_count = 0;
497 uint32_t max_dest_scaler_input_width = 0;
498 uint32_t max_dest_scaler_output_width = 0;
499 uint32_t max_dest_scale_up = 1;
Pullakavi Srinivas3e2c0402017-12-05 17:50:15 +0530500 uint32_t min_prefill_lines = 0;
Ramkumar Radhakrishnana38b7602018-03-15 14:49:52 -0700501 int secure_disp_blend_stage = -1;
Sushil Chauhanc75358e2018-04-24 14:36:38 -0700502 bool concurrent_writeback = false;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700503};
504
505enum struct DRMPlaneType {
506 // Has CSC and scaling capability
507 VIG = 0,
508 // Has scaling capability but no CSC
509 RGB,
510 // No scaling support
511 DMA,
512 // Supports a small dimension and doesn't use a CRTC stage
513 CURSOR,
514 MAX,
515};
516
Arun Kumar K.R5d30ab52017-12-28 09:05:36 +0530517enum struct DRMTonemapLutType {
518 DMA_1D_GC,
519 DMA_1D_IGC,
520 VIG_1D_IGC,
521 VIG_3D_GAMUT,
522};
523
Saurabh Shah66c941b2016-07-06 17:34:05 -0700524struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700525 DRMPlaneType type;
526 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700527 // FourCC format enum and modifier
528 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
529 uint32_t max_linewidth;
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530530 uint32_t max_scaler_linewidth;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700531 uint32_t max_upscale;
532 uint32_t max_downscale;
533 uint32_t max_horizontal_deci;
534 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800535 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800536 uint32_t cache_size; // cache size in bytes for inline rotation support.
Namit Solanki6d0d8062017-11-30 17:29:48 +0530537 bool has_excl_rect = false;
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700538 QSEEDStepVersion qseed3_version;
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800539 bool multirect_prop_present = false;
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800540 InlineRotationVersion inrot_version; // inline rotation version
Arun Kumar K.R5d30ab52017-12-28 09:05:36 +0530541 bool inverse_pma = false;
542 uint32_t dgm_csc_version = 0; // csc used with DMA
543 std::map<DRMTonemapLutType, uint32_t> tonemap_lut_version_map = {};
Ramkumar Radhakrishnan4a269752018-03-08 14:53:15 -0800544 bool block_sec_ui = false;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700545};
546
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700547// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
548typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700549
550enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700551 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700552 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700553 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700554 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700555 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700556 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700557 DUAL_LM_MERGE_DSC,
558 DUAL_LM_DSCMERGE,
559 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700560};
561
562enum struct DRMPanelMode {
563 VIDEO,
564 COMMAND,
565};
566
Saurabh Shah7e16c932017-11-03 17:55:36 -0700567/* Per mode info */
568struct DRMModeInfo {
569 drmModeModeInfo mode;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700570 DRMTopology topology;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800571 // Valid only if mode is command
572 int num_roi;
573 int xstart;
574 int ystart;
575 int walign;
576 int halign;
577 int wmin;
578 int hmin;
579 bool roi_merge;
Saurabh Shah7e16c932017-11-03 17:55:36 -0700580};
581
582/* Per Connector Info*/
583struct DRMConnectorInfo {
584 uint32_t mmWidth;
585 uint32_t mmHeight;
586 uint32_t type;
587 std::vector<DRMModeInfo> modes;
588 std::string panel_name;
589 DRMPanelMode panel_mode;
590 bool is_primary;
591 // Valid only if DRMPanelMode is VIDEO
592 bool dynamic_fps;
593 // FourCC format enum and modifier
594 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
595 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
596 uint32_t max_linewidth;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700597 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700598 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700599 uint32_t transfer_time_us;
Srikanth Rajagopalance0f7cb2017-06-12 15:14:26 -0700600 drm_msm_ext_hdr_properties ext_hdr_prop;
Sushil Chauhan8f514a52018-02-27 17:35:44 -0800601 bool qsync_support;
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530602 // Connection status of this connector
603 bool is_connected;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700604};
605
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530606// All DRM Connectors as map<Connector_id , connector_info>
607typedef std::map<uint32_t, DRMConnectorInfo> DRMConnectorsInfo;
608
609/* Per Encoder Info */
610struct DRMEncoderInfo {
611 uint32_t type;
612};
613
614// All DRM Encoders as map<Encoder_id , encoder_info>
615typedef std::map<uint32_t, DRMEncoderInfo> DRMEncodersInfo;
616
Saurabh Shah66c941b2016-07-06 17:34:05 -0700617/* Identifier token for a display */
618struct DRMDisplayToken {
619 uint32_t conn_id;
620 uint32_t crtc_id;
Saurabh Shahf8226712018-02-05 15:51:53 -0800621 uint32_t crtc_index;
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530622 uint32_t encoder_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700623};
624
Ping Li281f48d2017-01-16 12:45:40 -0800625enum DRMPPFeatureID {
626 kFeaturePcc,
627 kFeatureIgc,
628 kFeaturePgc,
629 kFeatureMixerGc,
630 kFeaturePaV2,
631 kFeatureDither,
632 kFeatureGamut,
633 kFeaturePADither,
Rajesh Yadavd30b0cc2017-09-22 00:26:54 +0530634 kFeaturePAHsic,
635 kFeaturePASixZone,
Rajesh Yadav99535ac2017-08-28 16:33:04 +0530636 kFeaturePAMemColSkin,
637 kFeaturePAMemColSky,
638 kFeaturePAMemColFoliage,
639 kFeaturePAMemColProt,
Rajesh Yadavc4f67b82017-11-15 20:37:13 +0530640 kFeatureDgmIgc,
641 kFeatureDgmGc,
642 kFeatureVigIgc,
643 kFeatureVigGamut,
Ping Li281f48d2017-01-16 12:45:40 -0800644 kPPFeaturesMax,
645};
646
647enum DRMPPPropType {
648 kPropEnum,
649 kPropRange,
650 kPropBlob,
651 kPropTypeMax,
652};
653
654struct DRMPPFeatureInfo {
655 DRMPPFeatureID id;
656 DRMPPPropType type;
657 uint32_t version;
658 uint32_t payload_size;
659 void *payload;
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700660 uint32_t object_type;
Ping Li281f48d2017-01-16 12:45:40 -0800661};
662
Xu Yang32e58c22017-11-20 09:58:11 +0800663enum DRMDPPSFeatureID {
664 // Ad4 properties
665 kFeatureAd4Mode,
666 kFeatureAd4Init,
667 kFeatureAd4Cfg,
668 kFeatureAd4Input,
669 kFeatureAd4Backlight,
670 kFeatureAd4Assertiveness,
671 kFeatureAd4ManualStrength,
672 // ABA properties
673 kFeatureAbaHistCtrl,
674 kFeatureAbaHistIRQ,
675 kFeatureAbaLut,
676 // BL scale properties
677 kFeatureAd4BlScale,
678 kFeatureBacklightScale,
679 // Events
680 kFeaturePowerEvent,
681 kFeatureAbaHistEvent,
682 kFeatureBackLightEvent,
683 kFeatureAdAttBlEvent,
684 // Insert features above
685 kDppsFeaturesMax,
686};
687
Ping Li6a74d892018-05-02 15:54:58 -0700688struct DppsFeaturePayload {
689 uint32_t object_type;
690 uint32_t feature_id;
691 uint64_t value;
692};
693
Xu Yang32e58c22017-11-20 09:58:11 +0800694struct DRMDppsFeatureInfo {
695 DRMDPPSFeatureID id;
696 uint32_t version;
697};
698
699enum AD4Modes {
700 kAd4Off,
701 kAd4AutoStrength,
702 kAd4Calibration,
703 kAd4Manual,
704 kAd4ModeMax,
705};
706
707enum HistModes {
708 kHistDisabled,
709 kHistEnabled,
710};
711
712struct DRMDppsEventInfo {
713 uint32_t object_type;
714 uint32_t event_type;
715 int drm_fd;
716 bool enable;
717};
718
Ping Li8d6dd622017-07-03 12:05:15 -0700719enum DRMCscType {
720 kCscYuv2Rgb601L,
721 kCscYuv2Rgb601FR,
722 kCscYuv2Rgb709L,
723 kCscYuv2Rgb2020L,
724 kCscYuv2Rgb2020FR,
725 kCscTypeMax,
726};
727
Saurabh Shah0ffee302016-11-22 10:42:11 -0800728struct DRMScalerLUTInfo {
729 uint32_t dir_lut_size = 0;
730 uint32_t cir_lut_size = 0;
731 uint32_t sep_lut_size = 0;
732 uint64_t dir_lut = 0;
733 uint64_t cir_lut = 0;
734 uint64_t sep_lut = 0;
735};
736
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700737enum struct DRMSecureMode {
738 NON_SECURE,
739 SECURE,
740 NON_SECURE_DIR_TRANSLATION,
741 SECURE_DIR_TRANSLATION,
742};
743
744enum struct DRMSecurityLevel {
745 SECURE_NON_SECURE,
746 SECURE_ONLY,
747};
748
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800749enum struct DRMMultiRectMode {
750 NONE = 0,
751 PARALLEL = 1,
752 SERIAL = 2,
753};
754
Sushil Chauhan741ac312018-04-02 12:22:16 -0700755enum struct DRMCWbCaptureMode {
756 MIXER_OUT = 0,
757 DSPP_OUT = 1,
758};
759
Sushil Chauhan8f514a52018-02-27 17:35:44 -0800760enum struct DRMQsyncMode {
761 NONE = 0,
762 CONTINUOUS,
763};
764
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700765struct DRMSolidfillStage {
Xu Yang32e58c22017-11-20 09:58:11 +0800766 DRMRect bounding_rect {};
767 bool is_exclusion_rect = false;
768 uint32_t color = 0xff000000; // in 8bit argb
769 uint32_t red = 0;
770 uint32_t blue = 0;
771 uint32_t green = 0;
772 uint32_t alpha = 0xff;
773 uint32_t color_bit_depth = 0;
774 uint32_t z_order = 0;
775 uint32_t plane_alpha = 0xff;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700776};
777
Saurabh Shah66c941b2016-07-06 17:34:05 -0700778/* DRM Atomic Request Property Set.
779 *
780 * Helper class to create and populate atomic properties of DRM components
781 * when rendered in DRM atomic mode */
782class DRMAtomicReqInterface {
783 public:
784 virtual ~DRMAtomicReqInterface() {}
785 /* Perform request operation.
786 *
787 * [input]: opcode: operation code from DRMOps list.
Saurabh Shah1abcdf62017-11-21 14:03:22 -0800788 * obj_id: Relevant crtc, connector, plane id
Saurabh Shah66c941b2016-07-06 17:34:05 -0700789 * var_arg: arguments for DRMOps's can differ in number and
790 * data type. Refer above DRMOps to details.
791 * [return]: Error code if the API fails, 0 on success.
792 */
Saurabh Shah1abcdf62017-11-21 14:03:22 -0800793 virtual int Perform(DRMOps opcode, uint32_t obj_id, ...) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700794
795 /*
796 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
797 * called every frame.
798 * [input]: synchronous: Determines if the call should block until a h/w flip
Saurabh Shaha917aa72017-09-15 13:27:24 -0700799 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming
800 * planes but still need the previously staged ones to not be unstaged
Saurabh Shah66c941b2016-07-06 17:34:05 -0700801 * [return]: Error code if the API fails, 0 on success.
802 */
Saurabh Shaha917aa72017-09-15 13:27:24 -0700803 virtual int Commit(bool synchronous, bool retain_planes) = 0;
Varun Arorabaa16472018-08-16 16:19:59 -0700804
Saurabh Shah66c941b2016-07-06 17:34:05 -0700805 /*
806 * Validate the params set via Perform().
807 * [return]: Error code if the API fails, 0 on success.
808 */
809 virtual int Validate() = 0;
810};
811
812class DRMManagerInterface;
813
814/* Populates a singleton instance of DRMManager */
815typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
816
817/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800818typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700819
820/*
821 * DRM Manager Interface - Any class which plans to implement helper function for vendor
822 * specific DRM driver implementation must implement the below interface routines to work
823 * with SDM.
824 */
825
826class DRMManagerInterface {
827 public:
828 virtual ~DRMManagerInterface() {}
829
830 /*
831 * Since SDM completely manages the planes. GetPlanesInfo will provide all
832 * the plane information.
833 * [output]: DRMPlanesInfo: Resource Info for planes.
834 */
835 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
836
837 /*
838 * Will provide all the information of a selected crtc.
839 * [input]: Use crtc id 0 to obtain system wide info
840 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
Mathew Joseph Karimpanal43c9d692018-06-14 13:45:27 +0530841 * [return]: 0 on success, a negative error value otherwise.
Saurabh Shah66c941b2016-07-06 17:34:05 -0700842 */
Mathew Joseph Karimpanal43c9d692018-06-14 13:45:27 +0530843 virtual int GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700844
845 /*
846 * Will provide all the information of a selected connector.
847 * [output]: DRMConnectorInfo: Resource Info for the given connector id
Mathew Joseph Karimpanal43c9d692018-06-14 13:45:27 +0530848 * [return]: 0 on success, a negative error value otherwise.
Saurabh Shah66c941b2016-07-06 17:34:05 -0700849 */
Mathew Joseph Karimpanal43c9d692018-06-14 13:45:27 +0530850 virtual int GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700851
852 /*
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530853 * Provides information on all connectors.
854 * [output]: DRMConnectorsInfo: Resource info for connectors.
855 * [return]: 0 on success, a negative error value otherwise.
856 */
857 virtual int GetConnectorsInfo(DRMConnectorsInfo *info) = 0;
858
859 /*
860 * Provides information on a selected encoder.
861 * [output]: DRMEncoderInfo: Resource info for the given encoder id.
862 * [return]: 0 on success, a negative error value otherwise.
863 */
864 virtual int GetEncoderInfo(uint32_t encoder_id, DRMEncoderInfo *info) = 0;
865
866 /*
867 * Provides information on all encoders.
868 * [output]: DRMEncodersInfo: Resource info for encoders.
869 * [return]: 0 on success, a negative error value otherwise.
870 */
871 virtual int GetEncodersInfo(DRMEncodersInfo *info) = 0;
872
873 /*
Ping Li281f48d2017-01-16 12:45:40 -0800874 * Will query post propcessing feature info of a CRTC.
875 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
876 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530877 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0;
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530878
Ping Li281f48d2017-01-16 12:45:40 -0800879 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700880 * Register a logical display to receive a token.
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530881 * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect
882 * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the
883 * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here
884 * onwards, Client should use this token to represent the display for any Perform operations if
Saurabh Shah66c941b2016-07-06 17:34:05 -0700885 * needed.
886 *
887 * [input]: disp_type - Peripheral / TV / Virtual
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530888 * [output]: DRMDisplayToken - CRTC and Connector IDs for the display.
889 * [return]: 0 on success, a negative error value otherwise.
Saurabh Shah66c941b2016-07-06 17:34:05 -0700890 */
891 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
892
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530893 /*
894 * Register a logical display to receive a token.
895 * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect
896 * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the
897 * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here
898 * onwards, Client should use this token to represent the display for any Perform operations if
899 * needed.
900 *
901 * [input]: display_id - Connector ID
902 * [output]: DRMDisplayToken - CRTC and Connector id's for the display.
903 * [return]: 0 on success, a negative error value otherwise.
904 */
905 virtual int RegisterDisplay(int32_t display_id, DRMDisplayToken *tok) = 0;
906
Saurabh Shah66c941b2016-07-06 17:34:05 -0700907 /* Client should invoke this interface on display disconnect.
908 * [input]: DRMDisplayToken - identifier for the display.
909 */
910 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
911
912 /*
913 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
914 * returned as part of RegisterDisplay API. Needs to be called per display.
915 * [input]: DRMDisplayToken that identifies a display pipeline
916 * [output]: Pointer to an instance of DRMAtomicReqInterface.
917 * [return]: Error code if the API fails, 0 on success.
918 */
919 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
920
921 /*
922 * Destroys the instance of DRMAtomicReqInterface
923 * [input]: Pointer to a DRMAtomicReqInterface
924 * [return]: Error code if the API fails, 0 on success.
925 */
926 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Varun Arorabaa16472018-08-16 16:19:59 -0700927
Saurabh Shah0ffee302016-11-22 10:42:11 -0800928 /*
929 * Sets the global scaler LUT
930 * [input]: LUT Info
931 * [return]: Error code if the API fails, 0 on success.
932 */
933 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Xu Yang32e58c22017-11-20 09:58:11 +0800934
935 /*
Varun Arorabaa16472018-08-16 16:19:59 -0700936 * Unsets the global scaler LUT
937 * [input]: None
938 * [return]: Error code if the API fails, 0 on success.
939 */
940 virtual int UnsetScalerLUT() = 0;
941
942 /*
Xu Yang32e58c22017-11-20 09:58:11 +0800943 * Get the DPPS feature info
944 * [input]: Dpps feature id, info->id
945 * [output]: Dpps feature version, info->version
946 */
947 virtual void GetDppsFeatureInfo(DRMDppsFeatureInfo *info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700948};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800949
Saurabh Shah66c941b2016-07-06 17:34:05 -0700950} // namespace sde_drm
951#endif // __DRM_INTERFACE_H__