blob: 0070fa1dc706f97a0c50862692b8ce87bc72dce4 [file] [log] [blame]
Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Mansoor Aftabe9912a62014-07-15 01:40:26 -07002 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -070038#include "qd_utils.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070039#include <qdMetaData.h>
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -070040#include <utils/Singleton.h>
41#include <utils/Mutex.h>
42
Iliyan Malchev202a77d2012-06-11 14:41:12 -070043
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080044#ifdef VENUS_COLOR_FORMAT
45#include <media/msm_media_info.h>
46#else
47#define VENUS_Y_STRIDE(args...) 0
48#define VENUS_Y_SCANLINES(args...) 0
49#define VENUS_BUFFER_SIZE(args...) 0
50#endif
51
Naseer Ahmed63326f42013-12-18 02:45:48 -050052#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050053
Shalaj Jain3c490412015-04-22 16:52:03 -070054#ifndef ION_FLAG_CP_PIXEL
Shalaj Jain1f9725a2015-03-04 17:53:49 -080055#define ION_FLAG_CP_PIXEL 0
Shalaj Jain1f9725a2015-03-04 17:53:49 -080056#endif
57
58#ifndef ION_FLAG_ALLOW_NON_CONTIG
59#define ION_FLAG_ALLOW_NON_CONTIG 0
60#endif
61
Shalaj Jain3c490412015-04-22 16:52:03 -070062#ifdef MASTER_SIDE_CP
63#define CP_HEAP_ID ION_SECURE_HEAP_ID
Arun Kumar K.R7f0b24b2015-07-05 21:20:57 -070064#define SD_HEAP_ID ION_SECURE_DISPLAY_HEAP_ID
Shalaj Jain3c490412015-04-22 16:52:03 -070065#define ION_CP_FLAGS (ION_SECURE | ION_FLAG_CP_PIXEL)
Arun Kumar K.R7f0b24b2015-07-05 21:20:57 -070066#define ION_SD_FLAGS (ION_SECURE | ION_FLAG_CP_SEC_DISPLAY)
Shalaj Jain3c490412015-04-22 16:52:03 -070067#else // SLAVE_SIDE_CP
68#define CP_HEAP_ID ION_CP_MM_HEAP_ID
69#define SD_HEAP_ID CP_HEAP_ID
70#define ION_CP_FLAGS (ION_SECURE | ION_FLAG_ALLOW_NON_CONTIG)
71#define ION_SD_FLAGS ION_SECURE
72#endif
73
Iliyan Malchev202a77d2012-06-11 14:41:12 -070074using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070075using namespace qdutils;
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -070076using namespace android;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070077
Naomi Luisa44100c2013-02-08 12:42:03 -080078ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
79
Sushil Chauhan65e26302015-01-14 10:48:57 -080080static void getUBwcWidthAndHeight(int, int, int, int&, int&);
81static unsigned int getUBwcSize(int, int, int, const int, const int);
82
Iliyan Malchev202a77d2012-06-11 14:41:12 -070083//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070084
Saurabh Shah1adcafe2014-12-19 10:05:41 -080085/* The default policy is to return cached buffers unless the client explicity
86 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
87 * read or written in software. Any combination with a _RARELY_ flag will be
88 * treated as uncached. */
89static bool useUncached(const int& usage) {
90 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
91 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
92 GRALLOC_USAGE_SW_WRITE_RARELY) or
93 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
94 GRALLOC_USAGE_SW_READ_RARELY))
95 return true;
96
97 return false;
98}
99
Naomi Luisa44100c2013-02-08 12:42:03 -0800100//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800101AdrenoMemInfo::AdrenoMemInfo()
102{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800103 LINK_adreno_compute_aligned_width_and_height = NULL;
104 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700105 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800106 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800107 LINK_adreno_isUBWCSupportedByGpu = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800108
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800109 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
110 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800111 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700112 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
113 *(void **)&LINK_adreno_compute_padding =
114 ::dlsym(libadreno_utils, "compute_surface_padding");
115 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
116 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800117 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
118 ::dlsym(libadreno_utils,
119 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800120 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
121 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800122 }
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700123
124 // Check if the overriding property debug.gralloc.gfx_ubwc_disable
125 // that disables UBWC allocations for the graphics stack is set
126 gfx_ubwc_disable = 0;
127 char property[PROPERTY_VALUE_MAX];
128 property_get("debug.gralloc.gfx_ubwc_disable", property, "0");
129 if(!(strncmp(property, "1", PROPERTY_VALUE_MAX)) ||
130 !(strncmp(property, "true", PROPERTY_VALUE_MAX))) {
131 gfx_ubwc_disable = 1;
132 }
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800133}
134
135AdrenoMemInfo::~AdrenoMemInfo()
136{
137 if (libadreno_utils) {
138 ::dlclose(libadreno_utils);
139 }
140}
141
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700142int AdrenoMemInfo::isMacroTilingSupportedByGPU()
143{
144 if ((libadreno_utils)) {
145 if(LINK_adreno_isMacroTilingSupportedByGpu) {
146 return LINK_adreno_isMacroTilingSupportedByGpu();
147 }
148 }
149 return 0;
150}
151
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700152void AdrenoMemInfo::getAlignedWidthAndHeight(const private_handle_t *hnd, int& aligned_w,
153 int& aligned_h) {
154 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
155 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
156 int w = metadata->bufferDim.sliceWidth;
157 int h = metadata->bufferDim.sliceHeight;
158 int f = hnd->format;
159 int usage = 0;
160
161 if (hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED) {
162 usage = GRALLOC_USAGE_PRIVATE_ALLOC_UBWC;
163 }
164
165 getAlignedWidthAndHeight(w, h, f, usage, aligned_w, aligned_h);
166 } else {
167 aligned_w = hnd->width;
168 aligned_h = hnd->height;
169 }
170
171}
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700172
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800173void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800174 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800175{
Sushil Chauhane61fac52015-04-30 17:14:37 -0700176 bool ubwc_enabled = isUBwcEnabled(format, usage);
177
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800178 // Currently surface padding is only computed for RGB* surfaces.
Ajay Dudani4dc06492015-03-26 07:28:11 -0700179 if (format <= HAL_PIXEL_FORMAT_BGRA_8888) {
Sushil Chauhane61fac52015-04-30 17:14:37 -0700180 int tileEnabled = ubwc_enabled || isMacroTileEnabled(format, usage);
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700181 getGpuAlignedWidthHeight(width, height, format, tileEnabled, aligned_w, aligned_h);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800182 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800183 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800184
Sushil Chauhane61fac52015-04-30 17:14:37 -0700185 if (ubwc_enabled) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800186 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
187 return;
188 }
189
190 aligned_w = width;
191 aligned_h = height;
192 switch (format)
193 {
194 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
195 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800196 aligned_w = ALIGN(width, 32);
197 break;
Ajay Dudani4dc06492015-03-26 07:28:11 -0700198 case HAL_PIXEL_FORMAT_RAW16:
Shuzhen Wang2a000b22014-08-20 00:15:51 -0700199 aligned_w = ALIGN(width, 16);
200 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700201 case HAL_PIXEL_FORMAT_RAW10:
202 aligned_w = ALIGN(width * 10 /8, 16);
203 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800204 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
205 aligned_w = ALIGN(width, 128);
206 break;
207 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
208 case HAL_PIXEL_FORMAT_YV12:
209 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
210 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
211 case HAL_PIXEL_FORMAT_YCbCr_422_I:
212 case HAL_PIXEL_FORMAT_YCrCb_422_I:
213 aligned_w = ALIGN(width, 16);
214 break;
215 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
216 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
217 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
218 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
219 break;
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530220 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
221 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV21, width);
222 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV21, height);
223 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800224 case HAL_PIXEL_FORMAT_BLOB:
225 break;
226 case HAL_PIXEL_FORMAT_NV21_ZSL:
227 aligned_w = ALIGN(width, 64);
228 aligned_h = ALIGN(height, 64);
229 break;
230 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
231 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
232 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
233 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
234 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
235 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
236 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
237 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
238 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
239 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
240 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
241 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
242 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
243 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
244 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
245 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
246 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
247 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
248 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
249 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
250 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
251 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
252 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
253 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
254 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
255 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
256 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
257 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
258 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
259 int bytesPerPixel = 0;
260 int raster_mode = 0; //Adreno unknown raster mode.
261 int padding_threshold = 512; //Threshold for padding
262 //surfaces.
263
264 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
265 width, height, format, 0,raster_mode, padding_threshold,
266 &aligned_w, &aligned_h, &bytesPerPixel);
267 } else {
268 ALOGW("%s: Warning!! Symbols" \
269 " compute_compressedfmt_aligned_width_and_height" \
270 " not found", __FUNCTION__);
271 }
272 break;
273 default: break;
274 }
275}
276
277void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
278 int tile_enabled, int& aligned_w, int& aligned_h)
279{
280 aligned_w = ALIGN(width, 32);
281 aligned_h = ALIGN(height, 32);
282
283 // Don't add any additional padding if debug.gralloc.map_fb_memory
284 // is enabled
285 char property[PROPERTY_VALUE_MAX];
286 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
287 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
288 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
289 return;
290 }
291
292 int bpp = 4;
293 switch(format)
294 {
295 case HAL_PIXEL_FORMAT_RGB_888:
296 bpp = 3;
297 break;
298 case HAL_PIXEL_FORMAT_RGB_565:
299 case HAL_PIXEL_FORMAT_RGBA_5551:
300 case HAL_PIXEL_FORMAT_RGBA_4444:
301 bpp = 2;
302 break;
303 default: break;
304 }
305
306 if (libadreno_utils) {
307 int raster_mode = 0; // Adreno unknown raster mode.
308 int padding_threshold = 512; // Threshold for padding surfaces.
309 // the function below computes aligned width and aligned height
310 // based on linear or macro tile mode selected.
311 if(LINK_adreno_compute_aligned_width_and_height) {
312 LINK_adreno_compute_aligned_width_and_height(width,
313 height, bpp, tile_enabled,
314 raster_mode, padding_threshold,
315 &aligned_w, &aligned_h);
316
317 } else if(LINK_adreno_compute_padding) {
318 int surface_tile_height = 1; // Linear surface
319 aligned_w = LINK_adreno_compute_padding(width, bpp,
320 surface_tile_height, raster_mode,
321 padding_threshold);
322 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
323 __FUNCTION__);
324 } else {
325 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
326 "compute_aligned_width_and_height not found", __FUNCTION__);
327 }
328 }
329}
330
331int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
332{
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700333 if (!gfx_ubwc_disable && libadreno_utils) {
Sushil Chauhan082acd62015-01-14 16:49:29 -0800334 if (LINK_adreno_isUBWCSupportedByGpu) {
335 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
336 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
337 }
338 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800339 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800340}
341
Sushil Chauhan082acd62015-01-14 16:49:29 -0800342ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
343{
344 switch (hal_format) {
345 case HAL_PIXEL_FORMAT_RGBA_8888:
346 return ADRENO_PIXELFORMAT_R8G8B8A8;
Sushil Chauhan6686c802015-04-15 11:30:39 -0700347 case HAL_PIXEL_FORMAT_RGBX_8888:
348 return ADRENO_PIXELFORMAT_R8G8B8X8;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800349 case HAL_PIXEL_FORMAT_RGB_565:
350 return ADRENO_PIXELFORMAT_B5G6R5;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800351 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800352 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800353 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
354 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800355 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800356 default:
357 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
358 break;
359 }
360 return ADRENO_PIXELFORMAT_UNKNOWN;
361}
362
Naomi Luisa44100c2013-02-08 12:42:03 -0800363//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700364IAllocController* IAllocController::sController = NULL;
365IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700366{
367 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700368 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700369 }
370 return sController;
371}
372
373
374//-------------- IonController-----------------------//
375IonController::IonController()
376{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530377 allocateIonMem();
378}
379
380void IonController::allocateIonMem()
381{
382 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700383}
384
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700385int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700386{
387 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500388 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700389 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700390
391 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700392 data.allocType = 0;
393
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530394 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530395 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800396 if (usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY) {
Shalaj Jain3c490412015-04-22 16:52:03 -0700397 ionHeapId = ION_HEAP(SD_HEAP_ID);
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800398 /*
399 * There is currently no flag in ION for Secure Display
Shalaj Jain3c490412015-04-22 16:52:03 -0700400 * VM. Please add it to the define once available.
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800401 */
Shalaj Jain3c490412015-04-22 16:52:03 -0700402 ionFlags |= ION_SD_FLAGS;
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800403 } else {
Shalaj Jain3c490412015-04-22 16:52:03 -0700404 ionHeapId = ION_HEAP(CP_HEAP_ID);
405 ionFlags |= ION_CP_FLAGS;
Shalaj Jain13cdf812014-12-02 16:20:54 -0800406 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530407 } else {
408 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500409 // do not set ion secure flag & MM heap. Fallback to system heap.
410 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530411 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500412 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530413 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
414 //MM Heap is exclusively a secure heap.
415 //If it is used for non secure cases, fallback to IOMMU heap
416 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
417 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500418 trying to use system heap instead !!");
419 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500420 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700421
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700422 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500423 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700424
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700425 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500426 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700427
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530428 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500429 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700430
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500431 // if no ion heap flags are set, default to system heap
432 if(!ionHeapId)
433 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700434
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500435 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700436 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500437 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700438 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700439
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700440 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700441 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500442 } else {
443 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
444 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700445 }
446
447 return ret;
448}
449
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700450IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700451{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700452 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700453 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
454 memalloc = mIonAlloc;
455 } else {
456 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
457 }
458
459 return memalloc;
460}
461
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700462bool isMacroTileEnabled(int format, int usage)
463{
464 bool tileEnabled = false;
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -0700465 int isMacroTileSupportedByMDP = 0;
466
467 qdutils::querySDEInfo(HAS_MACRO_TILE, &isMacroTileSupportedByMDP);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700468
469 // Check whether GPU & MDSS supports MacroTiling feature
470 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -0700471 isMacroTileSupportedByMDP)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700472 {
473 // check the format
474 switch(format)
475 {
476 case HAL_PIXEL_FORMAT_RGBA_8888:
477 case HAL_PIXEL_FORMAT_RGBX_8888:
478 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800479 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700480 {
481 tileEnabled = true;
482 // check the usage flags
483 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
484 GRALLOC_USAGE_SW_WRITE_MASK)) {
485 // Application intends to use CPU for rendering
486 tileEnabled = false;
487 }
488 break;
489 }
490 default:
491 break;
492 }
493 }
494 return tileEnabled;
495}
496
497// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800498unsigned int getSize(int format, int width, int height, int usage,
499 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700500
Sushil Chauhan65e26302015-01-14 10:48:57 -0800501 if (isUBwcEnabled(format, usage)) {
502 return getUBwcSize(width, height, format, alignedw, alignedh);
503 }
504
505 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700506 switch (format) {
507 case HAL_PIXEL_FORMAT_RGBA_8888:
508 case HAL_PIXEL_FORMAT_RGBX_8888:
509 case HAL_PIXEL_FORMAT_BGRA_8888:
510 size = alignedw * alignedh * 4;
511 break;
512 case HAL_PIXEL_FORMAT_RGB_888:
513 size = alignedw * alignedh * 3;
514 break;
515 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700516 case HAL_PIXEL_FORMAT_RGBA_5551:
517 case HAL_PIXEL_FORMAT_RGBA_4444:
Ajay Dudani4dc06492015-03-26 07:28:11 -0700518 case HAL_PIXEL_FORMAT_RAW16:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700519 size = alignedw * alignedh * 2;
520 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700521 case HAL_PIXEL_FORMAT_RAW10:
522 size = ALIGN(alignedw * alignedh, 4096);
523 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700524
525 // adreno formats
526 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
527 size = ALIGN(alignedw*alignedh, 4096);
528 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
529 break;
530 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
531 // The chroma plane is subsampled,
532 // but the pitch in bytes is unchanged
533 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700534 size = ALIGN( alignedw * alignedh, 8192);
535 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
536 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700537 case HAL_PIXEL_FORMAT_YV12:
538 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
539 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800540 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700541 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400542 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700543 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700544 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700545 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800546 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
547 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400548 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800549 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700550 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
551 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700552 case HAL_PIXEL_FORMAT_YCbCr_422_I:
553 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700554 if(width & 1) {
555 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800556 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700557 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700558 size = ALIGN(alignedw * alignedh * 2, 4096);
559 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700560 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400561 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700562 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700563 break;
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530564 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
565 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV21, width, height);
566 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400567 case HAL_PIXEL_FORMAT_BLOB:
568 if(height != 1) {
569 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
570 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800571 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400572 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400573 size = width;
574 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700575 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700576 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
577 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500578 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
579 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
580 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
581 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
582 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
583 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
584 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
585 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
586 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
587 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
588 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
589 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
590 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
591 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
592 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
593 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
594 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
595 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
596 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
597 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
598 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
599 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
600 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
601 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
602 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
603 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
604 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800605 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500606 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
607 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700608 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800609 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800610 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700611 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700612 return size;
613}
614
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700615unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700616 int& alignedw, int &alignedh)
617{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700618 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700619
620 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
621 height,
622 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800623 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700624 alignedw,
625 alignedh);
626
Sushil Chauhan65e26302015-01-14 10:48:57 -0800627 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700628
629 return size;
630}
631
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700632
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700633unsigned int getBufferSizeAndDimensions(int width, int height, int format,
634 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700635{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700636 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700637
638 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
639 height,
640 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800641 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700642 alignedw,
643 alignedh);
644
Sushil Chauhan65e26302015-01-14 10:48:57 -0800645 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700646
647 return size;
648}
649
650
651void getBufferAttributes(int width, int height, int format, int usage,
Sushil Chauhane61fac52015-04-30 17:14:37 -0700652 int& alignedw, int &alignedh, int& tiled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700653{
Sushil Chauhane61fac52015-04-30 17:14:37 -0700654 tiled = isUBwcEnabled(format, usage) || isMacroTileEnabled(format, usage);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700655
656 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
657 height,
658 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800659 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700660 alignedw,
661 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800662 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700663}
664
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400665int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
666{
667 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700668 int width = hnd->width;
669 int height = hnd->height;
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700670 int format = hnd->format;
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700671
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700672 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800673 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700674
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400675 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700676 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
677
678 // Check if UBWC buffer has been rendered in linear format.
679 if (metadata && (metadata->operation & LINEAR_FORMAT)) {
680 format = metadata->linearFormat;
681 }
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400682
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700683 // Check metadata if the geometry has been updated.
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700684 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700685 int usage = 0;
686
687 if (hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED) {
688 usage = GRALLOC_USAGE_PRIVATE_ALLOC_UBWC;
689 }
690
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700691 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700692 metadata->bufferDim.sliceHeight, format, usage, width, height);
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700693 }
694
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400695 // Get the chroma offsets from the handle width/height. We take advantage
696 // of the fact the width _is_ the stride
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700697 switch (format) {
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400698 //Semiplanar
699 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
700 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
701 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
702 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700703 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400704 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700705 ycbcr->cb = (void*)(hnd->base + ystride * height);
706 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400707 ycbcr->ystride = ystride;
708 ycbcr->cstride = cstride;
709 ycbcr->chroma_step = 2;
710 break;
711
Sushil Chauhan4686c972015-02-20 15:44:52 -0800712 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
713 // NV12_UBWC buffer has these 4 planes in the following sequence:
714 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
715 unsigned int y_meta_stride, y_meta_height, y_meta_size;
716 unsigned int y_stride, y_height, y_size;
717 unsigned int c_meta_stride, c_meta_height, c_meta_size;
718
719 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
720 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
721 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
722
723 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
724 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
725 y_size = ALIGN((y_stride * y_height), alignment);
726
727 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
728 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
729 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
730
731 ycbcr->y = (void*)(hnd->base + y_meta_size);
732 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
733 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
734 c_meta_size + 1);
735 ycbcr->ystride = y_stride;
736 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
737 ycbcr->chroma_step = 2;
738 break;
739
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400740 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
741 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
742 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530743 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400744 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ajay Dudani4dc06492015-03-26 07:28:11 -0700745 case HAL_PIXEL_FORMAT_RAW16:
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700746 case HAL_PIXEL_FORMAT_RAW10:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700747 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400748 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700749 ycbcr->cr = (void*)(hnd->base + ystride * height);
750 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400751 ycbcr->ystride = ystride;
752 ycbcr->cstride = cstride;
753 ycbcr->chroma_step = 2;
754 break;
755
756 //Planar
757 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700758 ystride = width;
759 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400760 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700761 ycbcr->cr = (void*)(hnd->base + ystride * height);
762 ycbcr->cb = (void*)(hnd->base + ystride * height +
763 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400764 ycbcr->ystride = ystride;
765 ycbcr->cstride = cstride;
766 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400767 break;
768 //Unsupported formats
769 case HAL_PIXEL_FORMAT_YCbCr_422_I:
770 case HAL_PIXEL_FORMAT_YCrCb_422_I:
771 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
772 default:
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700773 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__, format);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400774 err = -EINVAL;
775 }
776 return err;
777
778}
779
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700780
781
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700782// Allocate buffer from width, height and format into a
783// private_handle_t. It is the responsibility of the caller
784// to free the buffer using the free_buffer function
785int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
786{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700787 alloc_data data;
788 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700789 gralloc::IAllocController* sAlloc =
790 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700791 data.base = 0;
792 data.fd = -1;
793 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700794 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
795 alignedh);
796
Naseer Ahmed29a26812012-06-14 00:56:20 -0700797 data.align = getpagesize();
798 data.uncached = useUncached(usage);
799 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700800
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700801 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700802 if (0 != err) {
803 ALOGE("%s: allocate failed", __FUNCTION__);
804 return -ENOMEM;
805 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700806
Naseer Ahmed29a26812012-06-14 00:56:20 -0700807 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700808 data.allocType, 0, format,
809 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700810 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700811 hnd->offset = data.offset;
812 hnd->gpuaddr = 0;
813 *pHnd = hnd;
814 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700815}
816
817void free_buffer(private_handle_t *hnd)
818{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700819 gralloc::IAllocController* sAlloc =
820 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700821 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700822 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700823 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
824 }
825 if(hnd)
826 delete hnd;
827
828}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800829
830// UBWC helper functions
831static bool isUBwcFormat(int format)
832{
833 // Explicitly defined UBWC formats
834 switch(format)
835 {
836 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
837 return true;
838 default:
839 return false;
840 }
841}
842
843static bool isUBwcSupported(int format)
844{
845 // Existing HAL formats with UBWC support
846 switch(format)
847 {
848 case HAL_PIXEL_FORMAT_RGB_565:
849 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -0700850 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800851 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
852 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
853 return true;
854 default:
855 return false;
856 }
857}
858
859bool isUBwcEnabled(int format, int usage)
860{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800861 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
862 if (isUBwcFormat(format))
863 return true;
864
865 // Allow UBWC, if client sets UBWC gralloc usage flag & GPU supports format.
866 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format) &&
867 AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format)) {
868 // Allow UBWC, only if CPU usage flags are not set
869 if (!(usage & (GRALLOC_USAGE_SW_READ_MASK |
Sushil Chauhan65e26302015-01-14 10:48:57 -0800870 GRALLOC_USAGE_SW_WRITE_MASK))) {
871 return true;
872 }
873 }
874 return false;
875}
876
877static void getUBwcWidthAndHeight(int width, int height, int format,
878 int& aligned_w, int& aligned_h)
879{
880 switch (format)
881 {
882 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
883 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
884 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
885 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
886 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
887 break;
888 default:
889 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
890 aligned_w = 0;
891 aligned_h = 0;
892 break;
893 }
894}
895
896static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
897{
898 block_width = 0;
899 block_height = 0;
900
901 switch(bpp)
902 {
903 case 2:
904 case 4:
905 block_width = 16;
906 block_height = 4;
907 break;
908 case 8:
909 block_width = 8;
910 block_height = 4;
911 break;
912 case 16:
913 block_width = 4;
914 block_height = 4;
915 break;
916 default:
917 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
918 break;
919 }
920}
921
922static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
923{
924 unsigned int size = 0;
925 int meta_width, meta_height;
926 int block_width, block_height;
927
928 getUBwcBlockSize(bpp, block_width, block_height);
929
930 if (!block_width || !block_height) {
931 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
932 return size;
933 }
934
935 // Align meta buffer height to 16 blocks
936 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
937
938 // Align meta buffer width to 64 blocks
939 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
940
941 // Align meta buffer size to 4K
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700942 size = ALIGN((meta_width * meta_height), 4096);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800943 return size;
944}
945
946static unsigned int getUBwcSize(int width, int height, int format,
947 const int alignedw, const int alignedh) {
948
949 unsigned int size = 0;
950 switch (format) {
951 case HAL_PIXEL_FORMAT_RGB_565:
952 size = alignedw * alignedh * 2;
953 size += getUBwcMetaBufferSize(width, height, 2);
954 break;
955 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -0700956 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800957 size = alignedw * alignedh * 4;
958 size += getUBwcMetaBufferSize(width, height, 4);
959 break;
960 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
961 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
962 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
963 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
964 break;
965 default:
966 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
967 break;
968 }
969 return size;
970}
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700971
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700972int getRgbDataAddress(private_handle_t* hnd, void** rgb_data)
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700973{
974 int err = 0;
975
976 // This api is for RGB* formats
Ajay Dudani4dc06492015-03-26 07:28:11 -0700977 if (hnd->format > HAL_PIXEL_FORMAT_BGRA_8888) {
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700978 return -EINVAL;
979 }
980
981 // linear buffer
982 if (!(hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED)) {
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700983 *rgb_data = (void*)hnd->base;
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700984 return err;
985 }
986
987 unsigned int meta_size = 0;
988 switch (hnd->format) {
989 case HAL_PIXEL_FORMAT_RGB_565:
990 meta_size = getUBwcMetaBufferSize(hnd->width, hnd->height, 2);
991 break;
992 case HAL_PIXEL_FORMAT_RGBA_8888:
993 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700994 meta_size = getUBwcMetaBufferSize(hnd->width, hnd->height, 4);
995 break;
996 default:
997 ALOGE("%s:Unsupported RGB format: 0x%x", __FUNCTION__, hnd->format);
998 err = -EINVAL;
999 break;
1000 }
1001
Sushil Chauhanc85b65b2015-04-30 11:05:36 -07001002 *rgb_data = (void*)(hnd->base + meta_size);
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001003 return err;
1004}