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Saurabh Shah66c941b2016-07-06 17:34:05 -07001/*
Rohit Kulkarni21649ef2018-02-08 14:39:40 -08002* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
Saurabh Shah66c941b2016-07-06 17:34:05 -07003*
4* Redistribution and use in source and binary forms, with or without
5* modification, are permitted provided that the following conditions are
6* met:
7* * Redistributions of source code must retain the above copyright
8* notice, this list of conditions and the following disclaimer.
9* * Redistributions in binary form must reproduce the above
10* copyright notice, this list of conditions and the following
11* disclaimer in the documentation and/or other materials provided
12* with the distribution.
13* * Neither the name of The Linux Foundation nor the names of its
14* contributors may be used to endorse or promote products derived
15* from this software without specific prior written permission.
16*
17* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28*/
29
30#ifndef __DRM_INTERFACE_H__
31#define __DRM_INTERFACE_H__
32
33#include <map>
34#include <string>
35#include <utility>
36#include <vector>
37
38#include "xf86drm.h"
39#include "xf86drmMode.h"
Sushil Chauhan80e58432017-07-06 11:39:17 -070040#include <drm/msm_drm.h>
Yuchao Ma577f0f72018-07-09 11:20:00 +080041#include <drm/msm_drm_pp.h>
Saurabh Shah66c941b2016-07-06 17:34:05 -070042
43namespace sde_drm {
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -080044
45typedef std::map<std::pair<uint32_t, uint64_t>, float> CompRatioMap;
46
Saurabh Shah66c941b2016-07-06 17:34:05 -070047/*
48 * Drm Atomic Operation Codes
49 */
50enum struct DRMOps {
51 /*
52 * Op: Sets plane source crop
53 * Arg: uint32_t - Plane ID
54 * DRMRect - Source Rectangle
55 */
56 PLANE_SET_SRC_RECT,
57 /*
58 * Op: Sets plane destination rect
59 * Arg: uint32_t - Plane ID
60 * DRMRect - Dst Rectangle
61 */
62 PLANE_SET_DST_RECT,
63 /*
Namit Solanki6d0d8062017-11-30 17:29:48 +053064 * Op: Sets plane exclusion rect
65 * Arg: uint32_t - Plane ID
66 * drm_clip_rect - Exclusion Rectangle
67 */
68 PLANE_SET_EXCL_RECT,
69 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -070070 * Op: Sets plane zorder
71 * Arg: uint32_t - Plane ID
72 * uint32_t - zorder
73 */
74 PLANE_SET_ZORDER,
75 /*
76 * Op: Sets plane rotation flags
77 * Arg: uint32_t - Plane ID
78 * uint32_t - bit mask of rotation flags (See drm_mode.h for enums)
79 */
80 PLANE_SET_ROTATION,
81 /*
82 * Op: Sets plane alpha
83 * Arg: uint32_t - Plane ID
84 * uint32_t - alpha value
85 */
86 PLANE_SET_ALPHA,
87 /*
88 * Op: Sets the blend type
89 * Arg: uint32_t - Plane ID
90 * uint32_t - blend type (see DRMBlendType)
91 */
92 PLANE_SET_BLEND_TYPE,
93 /*
94 * Op: Sets horizontal decimation
95 * Arg: uint32_t - Plane ID
96 * uint32_t - decimation factor
97 */
98 PLANE_SET_H_DECIMATION,
99 /*
100 * Op: Sets vertical decimation
101 * Arg: uint32_t - Plane ID
102 * uint32_t - decimation factor
103 */
104 PLANE_SET_V_DECIMATION,
105 /*
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800106 * Op: Sets source config flags
107 * Arg: uint32_t - Plane ID
108 * uint32_t - flags to enable or disable a specific op. E.g. deinterlacing
109 */
110 PLANE_SET_SRC_CONFIG,
111 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700112 * Op: Sets frame buffer ID for plane. Set together with CRTC.
113 * Arg: uint32_t - Plane ID
114 * uint32_t - Framebuffer ID
115 */
116 PLANE_SET_FB_ID,
117 /*
118 * Op: Sets the crtc for this plane. Set together with FB_ID.
119 * Arg: uint32_t - Plane ID
120 * uint32_t - CRTC ID
121 */
122 PLANE_SET_CRTC,
123 /*
124 * Op: Sets acquire fence for this plane's buffer. Set together with FB_ID, CRTC.
125 * Arg: uint32_t - Plane ID
126 * uint32_t - Input fence
127 */
128 PLANE_SET_INPUT_FENCE,
129 /*
Saurabh Shah0ffee302016-11-22 10:42:11 -0800130 * Op: Sets scaler config on this plane.
131 * Arg: uint32_t - Plane ID
132 * uint64_t - Address of the scaler config object (version based)
133 */
134 PLANE_SET_SCALER_CONFIG,
135 /*
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800136 * Op: Sets plane rotation destination rect
137 * Arg: uint32_t - Plane ID
138 * DRMRect - rotator dst Rectangle
139 */
140 PLANE_SET_ROTATION_DST_RECT,
141 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700142 * Op: Sets FB Secure mode for this plane.
143 * Arg: uint32_t - Plane ID
144 * uint32_t - Value of the FB Secure mode.
145 */
146 PLANE_SET_FB_SECURE_MODE,
147 /*
Ping Li8d6dd622017-07-03 12:05:15 -0700148 * Op: Sets csc config on this plane.
149 * Arg: uint32_t - Plane ID
150 * uint32_t* - pointer to csc type
151 */
152 PLANE_SET_CSC_CONFIG,
153 /*
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800154 * Op: Sets multirect mode on this plane.
155 * Arg: uint32_t - Plane ID
156 * uint32_t - multirect mode
157 */
158 PLANE_SET_MULTIRECT_MODE,
159 /*
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800160 * Op: Sets rotator output frame buffer ID for plane.
161 * Arg: uint32_t - Plane ID
162 * uint32_t - Framebuffer ID
163 */
164 PLANE_SET_ROT_FB_ID,
165 /*
Arun Kumar K.R5d30ab52017-12-28 09:05:36 +0530166 * Op: Sets inverse pma mode on this plane.
167 * Arg: uint32_t - Plane ID
168 * uint32_t - enable/disable inverse pma.
169 */
170 PLANE_SET_INVERSE_PMA,
171 /*
172 * Op: Sets csc config on this plane.
173 * Arg: uint32_t - Plane ID
174 * uint64_t - Address of the csc config object(version based)
175 */
176 PLANE_SET_DGM_CSC_CONFIG,
177 /*
178 * Op: Sets SSPP Feature
179 * Arg: uint32_t - Plane ID
180 * DRMPPFeatureInfo * - PP feature data pointer
181 */
182 PLANE_SET_POST_PROC,
183 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700184 * Op: Activate or deactivate a CRTC
185 * Arg: uint32_t - CRTC ID
186 * uint32_t - 1 to enable, 0 to disable
187 */
188 CRTC_SET_ACTIVE,
189 /*
190 * Op: Sets display mode
191 * Arg: uint32_t - CRTC ID
192 * drmModeModeInfo* - Pointer to display mode
193 */
194 CRTC_SET_MODE,
195 /*
196 * Op: Sets an offset indicating when a release fence should be signalled.
197 * Arg: uint32_t - offset
198 * 0: non-speculative, default
199 * 1: speculative
200 */
201 CRTC_SET_OUTPUT_FENCE_OFFSET,
202 /*
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800203 * Op: Sets overall SDE core clock
204 * Arg: uint32_t - CRTC ID
205 * uint32_t - core_clk
206 */
207 CRTC_SET_CORE_CLK,
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700208 /*
209 * Op: Sets MNOC bus average bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800210 * Arg: uint32_t - CRTC ID
211 * uint32_t - core_ab
212 */
213 CRTC_SET_CORE_AB,
214 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700215 * Op: Sets MNOC bus instantaneous bandwidth
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800216 * Arg: uint32_t - CRTC ID
217 * uint32_t - core_ib
218 */
219 CRTC_SET_CORE_IB,
220 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700221 * Op: Sets LLCC Bus average bandwidth
222 * Arg: uint32_t - CRTC ID
223 * uint32_t - llcc_ab
224 */
225 CRTC_SET_LLCC_AB,
226 /*
227 * Op: Sets LLCC Bus instantaneous bandwidth
228 * Arg: uint32_t - CRTC ID
229 * uint32_t - llcc_ib
230 */
231 CRTC_SET_LLCC_IB,
232 /*
233 * Op: Sets DRAM bus average bandwidth
234 * Arg: uint32_t - CRTC ID
235 * uint32_t - dram_ab
236 */
237 CRTC_SET_DRAM_AB,
238 /*
239 * Op: Sets DRAM bus instantaneous bandwidth
240 * Arg: uint32_t - CRTC ID
241 * uint32_t - dram_ib
242 */
243 CRTC_SET_DRAM_IB,
244 /*
Ramkumar Radhakrishnanb7910442017-12-11 13:32:47 -0800245 * Op: Sets Rotator BW for inline rotation
246 * Arg: uint32_t - CRTC ID
247 * uint32_t - rot_bw
248 */
249 CRTC_SET_ROT_PREFILL_BW,
250 /*
Ramkumar Radhakrishnan3c4de112017-05-24 22:38:30 -0700251 * Op: Sets rotator clock for inline rotation
252 * Arg: uint32_t - CRTC ID
253 * uint32_t - rot_clk
254 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530255 CRTC_SET_ROT_CLK,
256 /*
257 * Op: Sets destination scalar data
258 * Arg: uint32_t - CRTC ID
259 * uint64_t - Pointer to destination scalar data
260 */
261 CRTC_SET_DEST_SCALER_CONFIG,
262 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700263 * Op: Returns release fence for this frame. Should be called after Commit() on
264 * DRMAtomicReqInterface.
265 * Arg: uint32_t - CRTC ID
266 * int * - Pointer to an integer that will hold the returned fence
267 */
268 CRTC_GET_RELEASE_FENCE,
269 /*
Ping Li281f48d2017-01-16 12:45:40 -0800270 * Op: Sets PP feature
271 * Arg: uint32_t - CRTC ID
272 * DRMPPFeatureInfo * - PP feature data pointer
273 */
274 CRTC_SET_POST_PROC,
275 /*
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800276 * Op: Sets CRTC ROIs.
277 * Arg: uint32_t - CRTC ID
278 * uint32_t - number of ROIs
279 * DRMRect * - Array of CRTC ROIs
280 */
281 CRTC_SET_ROI,
282 /*
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700283 * Op: Sets Security level for CRTC.
284 * Arg: uint32_t - CRTC ID
285 * uint32_t - Security level
286 */
287 CRTC_SET_SECURITY_LEVEL,
288 /*
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700289 * Op: sets solid fill stages
290 * Arg: uint32_t - CRTC ID
291 * Vector of DRMSolidfillStage
292 */
293 CRTC_SET_SOLIDFILL_STAGES,
294 /*
Anjaneya Prasad Musunurie8c67f22017-07-01 16:16:13 +0530295 * Op: Sets idle timeout.
296 * Arg: uint32_t - CRTC ID
297 * uint32_t - idle timeout in ms
298 */
299 CRTC_SET_IDLE_TIMEOUT,
300 /*
Sushil Chauhan741ac312018-04-02 12:22:16 -0700301 * Op: Sets Capture mode for Concurrent Writeback feature.
302 * Arg: uint32_t - CRTC ID
303 * uint32_t - Capture mode
304 */
305 CRTC_SET_CAPTURE_MODE,
306 /*
Ramkumar Radhakrishnanf985d482018-07-23 18:10:41 -0700307 * Op: Sets Idle PC state for CRTC.
308 * Arg: uint32_t - CRTC ID
309 * uint32_t - idle pc state
310 */
311 CRTC_SET_IDLE_PC_STATE,
312 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700313 * Op: Returns retire fence for this commit. Should be called after Commit() on
314 * DRMAtomicReqInterface.
315 * Arg: uint32_t - Connector ID
316 * int * - Pointer to an integer that will hold the returned fence
317 */
318 CONNECTOR_GET_RETIRE_FENCE,
319 /*
320 * Op: Sets writeback connector destination rect
321 * Arg: uint32_t - Connector ID
322 * DRMRect - Dst Rectangle
323 */
324 CONNECTOR_SET_OUTPUT_RECT,
325 /*
326 * Op: Sets frame buffer ID for writeback connector.
327 * Arg: uint32_t - Connector ID
328 * uint32_t - Framebuffer ID
329 */
330 CONNECTOR_SET_OUTPUT_FB_ID,
Sushil Chauhan3396e202017-04-14 18:34:22 -0700331 /*
332 * Op: Sets power mode for connector.
333 * Arg: uint32_t - Connector ID
334 * uint32_t - Power Mode
335 */
336 CONNECTOR_SET_POWER_MODE,
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800337 /*
338 * Op: Sets panel ROIs.
339 * Arg: uint32_t - Connector ID
340 * uint32_t - number of ROIs
341 * DRMRect * - Array of Connector ROIs
342 */
343 CONNECTOR_SET_ROI,
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700344 /*
Saurabh Shahf3635952017-10-16 17:08:18 -0700345 * Op: Sets the connector to autorefresh mode.
346 * Arg: uint32_t - Connector ID
347 * uint32_t - Enable-1, Disable-0
348 */
349 CONNECTOR_SET_AUTOREFRESH,
350 /*
Sushil Chauhane2f89c92017-08-23 11:30:34 -0700351 * Op: Set FB secure mode for Writeback connector.
352 * Arg: uint32_t - Connector ID
353 * uint32_t - FB Secure mode
354 */
355 CONNECTOR_SET_FB_SECURE_MODE,
Saurabh Shah82b06f42017-09-06 16:43:49 -0700356 /*
357 * Op: Sets a crtc id to this connector
358 * Arg: uint32_t - Connector ID
359 * uint32_t - CRTC ID
360 */
361 CONNECTOR_SET_CRTC,
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700362 /*
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700363 * Op: Sets PP feature
364 * Arg: uint32_t - Connector ID
365 * DRMPPFeatureInfo * - PP feature data pointer
366 */
Xu Yang32e58c22017-11-20 09:58:11 +0800367 CONNECTOR_SET_POST_PROC,
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700368 /*
Srikanth Rajagopalan7a09b2e2017-06-19 18:41:03 -0700369 * Op: Sets connector hdr metadata
370 * Arg: uint32_t - Connector ID
371 * drm_msm_ext_hdr_metadata - hdr_metadata
372 */
373 CONNECTOR_SET_HDR_METADATA,
Xu Yang32e58c22017-11-20 09:58:11 +0800374 /*
375 * Op: Cache Dpps features.
376 * Arg: uint32_t - Object ID
377 uint32_t - Feature ID
378 * uint64_t - Pointer to feature config data
379 */
380 DPPS_CACHE_FEATURE,
Xu Yangda642222018-06-12 10:32:33 +0800381 /*
382 * Op: Commit Dpps features.
383 * Arg: drmModeAtomicReq - Atomic request
384 */
385 DPPS_COMMIT_FEATURE,
Sushil Chauhan8f514a52018-02-27 17:35:44 -0800386 /*
387 * Op: Sets qsync mode on connector
388 * Arg: uint32_t - Connector ID
389 * uint32_t - qsync mode
390 */
391 CONNECTOR_SET_QSYNC_MODE,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700392};
393
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700394enum struct DRMRotation {
395 FLIP_H = 0x1,
396 FLIP_V = 0x2,
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700397 ROT_180 = FLIP_H | FLIP_V,
Saurabh Shahf9266ee2017-04-19 15:25:46 -0700398 ROT_90 = 0x4,
399};
400
Sushil Chauhan3396e202017-04-14 18:34:22 -0700401enum struct DRMPowerMode {
402 ON,
403 DOZE,
404 DOZE_SUSPEND,
405 OFF,
406};
407
Saurabh Shah66c941b2016-07-06 17:34:05 -0700408enum struct DRMBlendType {
409 UNDEFINED = 0,
410 OPAQUE = 1,
411 PREMULTIPLIED = 2,
412 COVERAGE = 3,
413};
414
Prabhanjan Kandula585aa652017-01-26 18:39:11 -0800415enum struct DRMSrcConfig {
416 DEINTERLACE = 0,
417};
418
Ramkumar Radhakrishnanf985d482018-07-23 18:10:41 -0700419enum struct DRMIdlePCState {
420 NONE,
421 ENABLE,
422 DISABLE,
423};
424
425
Saurabh Shah66c941b2016-07-06 17:34:05 -0700426/* Display type to identify a suitable connector */
427enum struct DRMDisplayType {
428 PERIPHERAL,
429 TV,
430 VIRTUAL,
431};
432
433struct DRMRect {
434 uint32_t left; // Left-most pixel coordinate.
435 uint32_t top; // Top-most pixel coordinate.
436 uint32_t right; // Right-most pixel coordinate.
437 uint32_t bottom; // Bottom-most pixel coordinate.
438};
439
440//------------------------------------------------------------------------
441// DRM Info Query Types
442//------------------------------------------------------------------------
443
444enum struct QSEEDVersion {
445 V1,
446 V2,
447 V3,
Ramakant Singh1ba882f2018-06-06 10:23:21 +0530448 V3LITE,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700449};
450
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700451/* QSEED3 Step version */
452enum struct QSEEDStepVersion {
453 V2,
454 V3,
455 V4,
Ramakant Singh1ba882f2018-06-06 10:23:21 +0530456 V3LITE_V4,
457 V3LITE_V5,
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700458};
459
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700460enum struct SmartDMARevision {
461 V1,
462 V2,
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530463 V2p5
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700464};
465
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800466/* Inline Rotation version */
467enum struct InlineRotationVersion {
468 UNKNOWN,
469 V1,
470 V1p1, // Rotator FB ID needs to be set
471};
472
Saurabh Shah66c941b2016-07-06 17:34:05 -0700473/* Per CRTC Resource Info*/
474struct DRMCrtcInfo {
475 bool has_src_split;
Srikanth Rajagopalan49380782017-07-06 15:23:12 -0700476 bool has_hdr;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700477 uint32_t max_blend_stages;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700478 uint32_t max_solidfill_stages;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700479 QSEEDVersion qseed_version;
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700480 SmartDMARevision smart_dma_rev;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800481 float ib_fudge_factor;
482 float clk_fudge_factor;
483 uint32_t dest_scale_prefill_lines;
484 uint32_t undersized_prefill_lines;
485 uint32_t macrotile_prefill_lines;
486 uint32_t nv12_prefill_lines;
487 uint32_t linear_prefill_lines;
488 uint32_t downscale_prefill_lines;
489 uint32_t extra_prefill_lines;
490 uint32_t amortized_threshold;
491 uint64_t max_bandwidth_low;
492 uint64_t max_bandwidth_high;
493 uint32_t max_sde_clk;
494 CompRatioMap comp_ratio_rt_map;
495 CompRatioMap comp_ratio_nrt_map;
Gopikrishnaiah Anandan76815522017-06-27 15:18:04 -0700496 uint32_t hw_version;
Namit Solanki24921ab2017-05-23 20:16:25 +0530497 uint32_t dest_scaler_count = 0;
498 uint32_t max_dest_scaler_input_width = 0;
499 uint32_t max_dest_scaler_output_width = 0;
500 uint32_t max_dest_scale_up = 1;
Pullakavi Srinivas3e2c0402017-12-05 17:50:15 +0530501 uint32_t min_prefill_lines = 0;
Ramkumar Radhakrishnana38b7602018-03-15 14:49:52 -0700502 int secure_disp_blend_stage = -1;
Sushil Chauhanc75358e2018-04-24 14:36:38 -0700503 bool concurrent_writeback = false;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700504};
505
506enum struct DRMPlaneType {
507 // Has CSC and scaling capability
508 VIG = 0,
509 // Has scaling capability but no CSC
510 RGB,
511 // No scaling support
512 DMA,
513 // Supports a small dimension and doesn't use a CRTC stage
514 CURSOR,
515 MAX,
516};
517
Arun Kumar K.R5d30ab52017-12-28 09:05:36 +0530518enum struct DRMTonemapLutType {
519 DMA_1D_GC,
520 DMA_1D_IGC,
521 VIG_1D_IGC,
522 VIG_3D_GAMUT,
523};
524
Saurabh Shah66c941b2016-07-06 17:34:05 -0700525struct DRMPlaneTypeInfo {
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700526 DRMPlaneType type;
527 uint32_t master_plane_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700528 // FourCC format enum and modifier
529 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
530 uint32_t max_linewidth;
Mathew Joseph Karimpanal1f8a21c2017-10-20 20:47:42 +0530531 uint32_t max_scaler_linewidth;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700532 uint32_t max_upscale;
533 uint32_t max_downscale;
534 uint32_t max_horizontal_deci;
535 uint32_t max_vertical_deci;
Ramkumar Radhakrishnan9ed1fd82017-03-09 18:46:41 -0800536 uint64_t max_pipe_bandwidth;
Rohit Kulkarni8622e362017-01-30 18:14:10 -0800537 uint32_t cache_size; // cache size in bytes for inline rotation support.
Namit Solanki6d0d8062017-11-30 17:29:48 +0530538 bool has_excl_rect = false;
Rohit Kulkarnibfa855c2017-06-29 17:52:10 -0700539 QSEEDStepVersion qseed3_version;
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800540 bool multirect_prop_present = false;
Rohit Kulkarni2d7151c2017-12-14 22:17:49 -0800541 InlineRotationVersion inrot_version; // inline rotation version
Arun Kumar K.R5d30ab52017-12-28 09:05:36 +0530542 bool inverse_pma = false;
543 uint32_t dgm_csc_version = 0; // csc used with DMA
544 std::map<DRMTonemapLutType, uint32_t> tonemap_lut_version_map = {};
Ramkumar Radhakrishnan4a269752018-03-08 14:53:15 -0800545 bool block_sec_ui = false;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700546};
547
Prabhanjan Kandulae6dfab92017-03-14 11:02:49 -0700548// All DRM Planes as map<Plane_id , plane_type_info> listed from highest to lowest priority
549typedef std::vector<std::pair<uint32_t, DRMPlaneTypeInfo>> DRMPlanesInfo;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700550
551enum struct DRMTopology {
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700552 UNKNOWN, // To be compat with driver defs in sde_rm.h
Saurabh Shah66c941b2016-07-06 17:34:05 -0700553 SINGLE_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700554 SINGLE_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700555 DUAL_LM,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700556 DUAL_LM_DSC,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700557 DUAL_LM_MERGE,
Rohit Kulkarni2faa91c2017-06-05 15:43:48 -0700558 DUAL_LM_MERGE_DSC,
559 DUAL_LM_DSCMERGE,
560 PPSPLIT,
Saurabh Shah66c941b2016-07-06 17:34:05 -0700561};
562
563enum struct DRMPanelMode {
564 VIDEO,
565 COMMAND,
566};
567
Saurabh Shah7e16c932017-11-03 17:55:36 -0700568/* Per mode info */
569struct DRMModeInfo {
570 drmModeModeInfo mode;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700571 DRMTopology topology;
Saurabh Shahe9f55d72017-03-03 15:14:13 -0800572 // Valid only if mode is command
573 int num_roi;
574 int xstart;
575 int ystart;
576 int walign;
577 int halign;
578 int wmin;
579 int hmin;
580 bool roi_merge;
Saurabh Shah7e16c932017-11-03 17:55:36 -0700581};
582
583/* Per Connector Info*/
584struct DRMConnectorInfo {
585 uint32_t mmWidth;
586 uint32_t mmHeight;
587 uint32_t type;
588 std::vector<DRMModeInfo> modes;
589 std::string panel_name;
590 DRMPanelMode panel_mode;
591 bool is_primary;
592 // Valid only if DRMPanelMode is VIDEO
593 bool dynamic_fps;
594 // FourCC format enum and modifier
595 std::vector<std::pair<uint32_t, uint64_t>> formats_supported;
596 // Valid only if type is DRM_MODE_CONNECTOR_VIRTUAL
597 uint32_t max_linewidth;
Prabhanjan Kandula5bc7f8b2017-05-23 12:24:57 -0700598 DRMRotation panel_orientation;
Sushil Chauhan80e58432017-07-06 11:39:17 -0700599 drm_panel_hdr_properties panel_hdr_prop;
Ramkumar Radhakrishnan5c94f052017-07-06 11:59:14 -0700600 uint32_t transfer_time_us;
Srikanth Rajagopalance0f7cb2017-06-12 15:14:26 -0700601 drm_msm_ext_hdr_properties ext_hdr_prop;
Sushil Chauhan8f514a52018-02-27 17:35:44 -0800602 bool qsync_support;
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530603 // Connection status of this connector
604 bool is_connected;
Ramakant Singhdbe738a2018-08-23 23:57:07 +0530605 bool is_wb_ubwc_supported;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700606};
607
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530608// All DRM Connectors as map<Connector_id , connector_info>
609typedef std::map<uint32_t, DRMConnectorInfo> DRMConnectorsInfo;
610
611/* Per Encoder Info */
612struct DRMEncoderInfo {
613 uint32_t type;
614};
615
616// All DRM Encoders as map<Encoder_id , encoder_info>
617typedef std::map<uint32_t, DRMEncoderInfo> DRMEncodersInfo;
618
Saurabh Shah66c941b2016-07-06 17:34:05 -0700619/* Identifier token for a display */
620struct DRMDisplayToken {
621 uint32_t conn_id;
622 uint32_t crtc_id;
Saurabh Shahf8226712018-02-05 15:51:53 -0800623 uint32_t crtc_index;
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530624 uint32_t encoder_id;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700625};
626
Ping Li281f48d2017-01-16 12:45:40 -0800627enum DRMPPFeatureID {
628 kFeaturePcc,
629 kFeatureIgc,
630 kFeaturePgc,
631 kFeatureMixerGc,
632 kFeaturePaV2,
633 kFeatureDither,
634 kFeatureGamut,
635 kFeaturePADither,
Rajesh Yadavd30b0cc2017-09-22 00:26:54 +0530636 kFeaturePAHsic,
637 kFeaturePASixZone,
Rajesh Yadav99535ac2017-08-28 16:33:04 +0530638 kFeaturePAMemColSkin,
639 kFeaturePAMemColSky,
640 kFeaturePAMemColFoliage,
641 kFeaturePAMemColProt,
Rajesh Yadavc4f67b82017-11-15 20:37:13 +0530642 kFeatureDgmIgc,
643 kFeatureDgmGc,
644 kFeatureVigIgc,
645 kFeatureVigGamut,
Ping Li281f48d2017-01-16 12:45:40 -0800646 kPPFeaturesMax,
647};
648
649enum DRMPPPropType {
650 kPropEnum,
651 kPropRange,
652 kPropBlob,
653 kPropTypeMax,
654};
655
656struct DRMPPFeatureInfo {
657 DRMPPFeatureID id;
658 DRMPPPropType type;
659 uint32_t version;
660 uint32_t payload_size;
661 void *payload;
Gopikrishnaiah Anandan739faf92017-07-21 12:32:00 -0700662 uint32_t object_type;
Ping Li281f48d2017-01-16 12:45:40 -0800663};
664
Xu Yang32e58c22017-11-20 09:58:11 +0800665enum DRMDPPSFeatureID {
666 // Ad4 properties
667 kFeatureAd4Mode,
668 kFeatureAd4Init,
669 kFeatureAd4Cfg,
670 kFeatureAd4Input,
Yuchao Ma577f0f72018-07-09 11:20:00 +0800671 kFeatureAd4Roi,
Xu Yang32e58c22017-11-20 09:58:11 +0800672 kFeatureAd4Backlight,
673 kFeatureAd4Assertiveness,
674 kFeatureAd4ManualStrength,
675 // ABA properties
676 kFeatureAbaHistCtrl,
677 kFeatureAbaHistIRQ,
678 kFeatureAbaLut,
679 // BL scale properties
680 kFeatureAd4BlScale,
681 kFeatureBacklightScale,
682 // Events
683 kFeaturePowerEvent,
684 kFeatureAbaHistEvent,
685 kFeatureBackLightEvent,
686 kFeatureAdAttBlEvent,
687 // Insert features above
688 kDppsFeaturesMax,
689};
690
Ping Li6a74d892018-05-02 15:54:58 -0700691struct DppsFeaturePayload {
692 uint32_t object_type;
693 uint32_t feature_id;
694 uint64_t value;
695};
696
Xu Yang32e58c22017-11-20 09:58:11 +0800697struct DRMDppsFeatureInfo {
698 DRMDPPSFeatureID id;
699 uint32_t version;
700};
701
702enum AD4Modes {
703 kAd4Off,
704 kAd4AutoStrength,
705 kAd4Calibration,
706 kAd4Manual,
707 kAd4ModeMax,
708};
709
710enum HistModes {
711 kHistDisabled,
712 kHistEnabled,
713};
714
715struct DRMDppsEventInfo {
716 uint32_t object_type;
717 uint32_t event_type;
718 int drm_fd;
719 bool enable;
720};
721
Ping Li8d6dd622017-07-03 12:05:15 -0700722enum DRMCscType {
723 kCscYuv2Rgb601L,
724 kCscYuv2Rgb601FR,
725 kCscYuv2Rgb709L,
726 kCscYuv2Rgb2020L,
727 kCscYuv2Rgb2020FR,
728 kCscTypeMax,
729};
730
Saurabh Shah0ffee302016-11-22 10:42:11 -0800731struct DRMScalerLUTInfo {
732 uint32_t dir_lut_size = 0;
733 uint32_t cir_lut_size = 0;
734 uint32_t sep_lut_size = 0;
735 uint64_t dir_lut = 0;
736 uint64_t cir_lut = 0;
737 uint64_t sep_lut = 0;
738};
739
Sushil Chauhan1021cc02017-05-03 15:11:43 -0700740enum struct DRMSecureMode {
741 NON_SECURE,
742 SECURE,
743 NON_SECURE_DIR_TRANSLATION,
744 SECURE_DIR_TRANSLATION,
745};
746
747enum struct DRMSecurityLevel {
748 SECURE_NON_SECURE,
749 SECURE_ONLY,
750};
751
Ramkumar Radhakrishnan07254302017-11-13 16:18:22 -0800752enum struct DRMMultiRectMode {
753 NONE = 0,
754 PARALLEL = 1,
755 SERIAL = 2,
756};
757
Sushil Chauhan741ac312018-04-02 12:22:16 -0700758enum struct DRMCWbCaptureMode {
759 MIXER_OUT = 0,
760 DSPP_OUT = 1,
761};
762
Sushil Chauhan8f514a52018-02-27 17:35:44 -0800763enum struct DRMQsyncMode {
764 NONE = 0,
765 CONTINUOUS,
766};
767
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700768struct DRMSolidfillStage {
Xu Yang32e58c22017-11-20 09:58:11 +0800769 DRMRect bounding_rect {};
770 bool is_exclusion_rect = false;
771 uint32_t color = 0xff000000; // in 8bit argb
772 uint32_t red = 0;
773 uint32_t blue = 0;
774 uint32_t green = 0;
775 uint32_t alpha = 0xff;
776 uint32_t color_bit_depth = 0;
777 uint32_t z_order = 0;
778 uint32_t plane_alpha = 0xff;
Prabhanjan Kanduladbc8aed2017-03-24 14:43:16 -0700779};
780
Saurabh Shah66c941b2016-07-06 17:34:05 -0700781/* DRM Atomic Request Property Set.
782 *
783 * Helper class to create and populate atomic properties of DRM components
784 * when rendered in DRM atomic mode */
785class DRMAtomicReqInterface {
786 public:
787 virtual ~DRMAtomicReqInterface() {}
788 /* Perform request operation.
789 *
790 * [input]: opcode: operation code from DRMOps list.
Saurabh Shah1abcdf62017-11-21 14:03:22 -0800791 * obj_id: Relevant crtc, connector, plane id
Saurabh Shah66c941b2016-07-06 17:34:05 -0700792 * var_arg: arguments for DRMOps's can differ in number and
793 * data type. Refer above DRMOps to details.
794 * [return]: Error code if the API fails, 0 on success.
795 */
Saurabh Shah1abcdf62017-11-21 14:03:22 -0800796 virtual int Perform(DRMOps opcode, uint32_t obj_id, ...) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700797
798 /*
799 * Commit the params set via Perform(). Also resets the properties after commit. Needs to be
800 * called every frame.
801 * [input]: synchronous: Determines if the call should block until a h/w flip
Saurabh Shaha917aa72017-09-15 13:27:24 -0700802 * [input]: retain_planes: Retains already staged planes. Useful when not explicitly programming
803 * planes but still need the previously staged ones to not be unstaged
Saurabh Shah66c941b2016-07-06 17:34:05 -0700804 * [return]: Error code if the API fails, 0 on success.
805 */
Saurabh Shaha917aa72017-09-15 13:27:24 -0700806 virtual int Commit(bool synchronous, bool retain_planes) = 0;
Varun Arorabaa16472018-08-16 16:19:59 -0700807
Saurabh Shah66c941b2016-07-06 17:34:05 -0700808 /*
809 * Validate the params set via Perform().
810 * [return]: Error code if the API fails, 0 on success.
811 */
812 virtual int Validate() = 0;
813};
814
815class DRMManagerInterface;
816
817/* Populates a singleton instance of DRMManager */
818typedef int (*GetDRMManager)(int fd, DRMManagerInterface **intf);
819
820/* Destroy DRMManager instance */
Saurabh Shahab7807c2017-02-08 15:41:08 -0800821typedef int (*DestroyDRMManager)();
Saurabh Shah66c941b2016-07-06 17:34:05 -0700822
823/*
824 * DRM Manager Interface - Any class which plans to implement helper function for vendor
825 * specific DRM driver implementation must implement the below interface routines to work
826 * with SDM.
827 */
828
829class DRMManagerInterface {
830 public:
831 virtual ~DRMManagerInterface() {}
832
833 /*
834 * Since SDM completely manages the planes. GetPlanesInfo will provide all
835 * the plane information.
836 * [output]: DRMPlanesInfo: Resource Info for planes.
837 */
838 virtual void GetPlanesInfo(DRMPlanesInfo *info) = 0;
839
840 /*
841 * Will provide all the information of a selected crtc.
842 * [input]: Use crtc id 0 to obtain system wide info
843 * [output]: DRMCrtcInfo: Resource Info for the given CRTC id.
Mathew Joseph Karimpanal43c9d692018-06-14 13:45:27 +0530844 * [return]: 0 on success, a negative error value otherwise.
Saurabh Shah66c941b2016-07-06 17:34:05 -0700845 */
Mathew Joseph Karimpanal43c9d692018-06-14 13:45:27 +0530846 virtual int GetCrtcInfo(uint32_t crtc_id, DRMCrtcInfo *info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700847
848 /*
849 * Will provide all the information of a selected connector.
850 * [output]: DRMConnectorInfo: Resource Info for the given connector id
Mathew Joseph Karimpanal43c9d692018-06-14 13:45:27 +0530851 * [return]: 0 on success, a negative error value otherwise.
Saurabh Shah66c941b2016-07-06 17:34:05 -0700852 */
Mathew Joseph Karimpanal43c9d692018-06-14 13:45:27 +0530853 virtual int GetConnectorInfo(uint32_t conn_id, DRMConnectorInfo *info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700854
855 /*
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530856 * Provides information on all connectors.
857 * [output]: DRMConnectorsInfo: Resource info for connectors.
858 * [return]: 0 on success, a negative error value otherwise.
859 */
860 virtual int GetConnectorsInfo(DRMConnectorsInfo *info) = 0;
861
862 /*
863 * Provides information on a selected encoder.
864 * [output]: DRMEncoderInfo: Resource info for the given encoder id.
865 * [return]: 0 on success, a negative error value otherwise.
866 */
867 virtual int GetEncoderInfo(uint32_t encoder_id, DRMEncoderInfo *info) = 0;
868
869 /*
870 * Provides information on all encoders.
871 * [output]: DRMEncodersInfo: Resource info for encoders.
872 * [return]: 0 on success, a negative error value otherwise.
873 */
874 virtual int GetEncodersInfo(DRMEncodersInfo *info) = 0;
875
876 /*
Ping Li281f48d2017-01-16 12:45:40 -0800877 * Will query post propcessing feature info of a CRTC.
878 * [output]: DRMPPFeatureInfo: CRTC post processing feature info
879 */
Namit Solanki24921ab2017-05-23 20:16:25 +0530880 virtual void GetCrtcPPInfo(uint32_t crtc_id, DRMPPFeatureInfo *info) = 0;
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530881
Ping Li281f48d2017-01-16 12:45:40 -0800882 /*
Saurabh Shah66c941b2016-07-06 17:34:05 -0700883 * Register a logical display to receive a token.
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530884 * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect
885 * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the
886 * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here
887 * onwards, Client should use this token to represent the display for any Perform operations if
Saurabh Shah66c941b2016-07-06 17:34:05 -0700888 * needed.
889 *
890 * [input]: disp_type - Peripheral / TV / Virtual
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530891 * [output]: DRMDisplayToken - CRTC and Connector IDs for the display.
892 * [return]: 0 on success, a negative error value otherwise.
Saurabh Shah66c941b2016-07-06 17:34:05 -0700893 */
894 virtual int RegisterDisplay(DRMDisplayType disp_type, DRMDisplayToken *tok) = 0;
895
Mathew Joseph Karimpanal731bc932017-11-22 10:04:56 +0530896 /*
897 * Register a logical display to receive a token.
898 * Each display pipeline in DRM is identified by its CRTC and Connector(s). On display connect
899 * (bootup or hotplug), clients should invoke this interface to establish the pipeline for the
900 * display and should get a DisplayToken populated with crtc, encoder and connnector(s) id's. Here
901 * onwards, Client should use this token to represent the display for any Perform operations if
902 * needed.
903 *
904 * [input]: display_id - Connector ID
905 * [output]: DRMDisplayToken - CRTC and Connector id's for the display.
906 * [return]: 0 on success, a negative error value otherwise.
907 */
908 virtual int RegisterDisplay(int32_t display_id, DRMDisplayToken *tok) = 0;
909
Saurabh Shah66c941b2016-07-06 17:34:05 -0700910 /* Client should invoke this interface on display disconnect.
911 * [input]: DRMDisplayToken - identifier for the display.
912 */
913 virtual void UnregisterDisplay(const DRMDisplayToken &token) = 0;
914
915 /*
916 * Creates and returns an instance of DRMAtomicReqInterface corresponding to a display token
917 * returned as part of RegisterDisplay API. Needs to be called per display.
918 * [input]: DRMDisplayToken that identifies a display pipeline
919 * [output]: Pointer to an instance of DRMAtomicReqInterface.
920 * [return]: Error code if the API fails, 0 on success.
921 */
922 virtual int CreateAtomicReq(const DRMDisplayToken &token, DRMAtomicReqInterface **intf) = 0;
923
924 /*
925 * Destroys the instance of DRMAtomicReqInterface
926 * [input]: Pointer to a DRMAtomicReqInterface
927 * [return]: Error code if the API fails, 0 on success.
928 */
929 virtual int DestroyAtomicReq(DRMAtomicReqInterface *intf) = 0;
Varun Arorabaa16472018-08-16 16:19:59 -0700930
Saurabh Shah0ffee302016-11-22 10:42:11 -0800931 /*
932 * Sets the global scaler LUT
933 * [input]: LUT Info
934 * [return]: Error code if the API fails, 0 on success.
935 */
936 virtual int SetScalerLUT(const DRMScalerLUTInfo &lut_info) = 0;
Xu Yang32e58c22017-11-20 09:58:11 +0800937
938 /*
Varun Arorabaa16472018-08-16 16:19:59 -0700939 * Unsets the global scaler LUT
940 * [input]: None
941 * [return]: Error code if the API fails, 0 on success.
942 */
943 virtual int UnsetScalerLUT() = 0;
944
945 /*
Xu Yang32e58c22017-11-20 09:58:11 +0800946 * Get the DPPS feature info
947 * [input]: Dpps feature id, info->id
948 * [output]: Dpps feature version, info->version
949 */
950 virtual void GetDppsFeatureInfo(DRMDppsFeatureInfo *info) = 0;
Saurabh Shah66c941b2016-07-06 17:34:05 -0700951};
Saurabh Shah0ffee302016-11-22 10:42:11 -0800952
Saurabh Shah66c941b2016-07-06 17:34:05 -0700953} // namespace sde_drm
954#endif // __DRM_INTERFACE_H__