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Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Mansoor Aftabe9912a62014-07-15 01:40:26 -07002 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -070038#include "qd_utils.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070039#include <qdMetaData.h>
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -070040#include <utils/Singleton.h>
41#include <utils/Mutex.h>
42
Iliyan Malchev202a77d2012-06-11 14:41:12 -070043
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080044#ifdef VENUS_COLOR_FORMAT
45#include <media/msm_media_info.h>
46#else
47#define VENUS_Y_STRIDE(args...) 0
48#define VENUS_Y_SCANLINES(args...) 0
49#define VENUS_BUFFER_SIZE(args...) 0
50#endif
51
Naseer Ahmed63326f42013-12-18 02:45:48 -050052#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050053
Shalaj Jain3c490412015-04-22 16:52:03 -070054#ifndef ION_FLAG_CP_PIXEL
Shalaj Jain1f9725a2015-03-04 17:53:49 -080055#define ION_FLAG_CP_PIXEL 0
Shalaj Jain1f9725a2015-03-04 17:53:49 -080056#endif
57
58#ifndef ION_FLAG_ALLOW_NON_CONTIG
59#define ION_FLAG_ALLOW_NON_CONTIG 0
60#endif
61
Shalaj Jain3c490412015-04-22 16:52:03 -070062#ifdef MASTER_SIDE_CP
63#define CP_HEAP_ID ION_SECURE_HEAP_ID
Arun Kumar K.R7f0b24b2015-07-05 21:20:57 -070064#define SD_HEAP_ID ION_SECURE_DISPLAY_HEAP_ID
Shalaj Jain3c490412015-04-22 16:52:03 -070065#define ION_CP_FLAGS (ION_SECURE | ION_FLAG_CP_PIXEL)
Arun Kumar K.R7f0b24b2015-07-05 21:20:57 -070066#define ION_SD_FLAGS (ION_SECURE | ION_FLAG_CP_SEC_DISPLAY)
Shalaj Jain3c490412015-04-22 16:52:03 -070067#else // SLAVE_SIDE_CP
68#define CP_HEAP_ID ION_CP_MM_HEAP_ID
69#define SD_HEAP_ID CP_HEAP_ID
70#define ION_CP_FLAGS (ION_SECURE | ION_FLAG_ALLOW_NON_CONTIG)
71#define ION_SD_FLAGS ION_SECURE
72#endif
73
Iliyan Malchev202a77d2012-06-11 14:41:12 -070074using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070075using namespace qdutils;
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -070076using namespace android;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070077
Naomi Luisa44100c2013-02-08 12:42:03 -080078ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
79
Sushil Chauhan65e26302015-01-14 10:48:57 -080080static void getUBwcWidthAndHeight(int, int, int, int&, int&);
81static unsigned int getUBwcSize(int, int, int, const int, const int);
82
Iliyan Malchev202a77d2012-06-11 14:41:12 -070083//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070084
Saurabh Shah1adcafe2014-12-19 10:05:41 -080085/* The default policy is to return cached buffers unless the client explicity
86 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
87 * read or written in software. Any combination with a _RARELY_ flag will be
88 * treated as uncached. */
89static bool useUncached(const int& usage) {
90 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
91 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
92 GRALLOC_USAGE_SW_WRITE_RARELY) or
93 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
94 GRALLOC_USAGE_SW_READ_RARELY))
95 return true;
96
97 return false;
98}
99
Naomi Luisa44100c2013-02-08 12:42:03 -0800100//-------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800101AdrenoMemInfo::AdrenoMemInfo()
102{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800103 LINK_adreno_compute_aligned_width_and_height = NULL;
104 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700105 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800106 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800107 LINK_adreno_isUBWCSupportedByGpu = NULL;
Sushil Chauhan521ce352015-08-28 11:33:30 -0700108 LINK_adreno_get_gpu_pixel_alignment = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800109
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800110 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
111 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800112 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700113 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
114 *(void **)&LINK_adreno_compute_padding =
115 ::dlsym(libadreno_utils, "compute_surface_padding");
116 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
117 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800118 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
119 ::dlsym(libadreno_utils,
120 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800121 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
122 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Sushil Chauhan521ce352015-08-28 11:33:30 -0700123 *(void **)&LINK_adreno_get_gpu_pixel_alignment =
124 ::dlsym(libadreno_utils, "get_gpu_pixel_alignment");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800125 }
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700126
127 // Check if the overriding property debug.gralloc.gfx_ubwc_disable
128 // that disables UBWC allocations for the graphics stack is set
129 gfx_ubwc_disable = 0;
130 char property[PROPERTY_VALUE_MAX];
131 property_get("debug.gralloc.gfx_ubwc_disable", property, "0");
132 if(!(strncmp(property, "1", PROPERTY_VALUE_MAX)) ||
133 !(strncmp(property, "true", PROPERTY_VALUE_MAX))) {
134 gfx_ubwc_disable = 1;
135 }
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800136}
137
138AdrenoMemInfo::~AdrenoMemInfo()
139{
140 if (libadreno_utils) {
141 ::dlclose(libadreno_utils);
142 }
143}
144
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700145int AdrenoMemInfo::isMacroTilingSupportedByGPU()
146{
147 if ((libadreno_utils)) {
148 if(LINK_adreno_isMacroTilingSupportedByGpu) {
149 return LINK_adreno_isMacroTilingSupportedByGpu();
150 }
151 }
152 return 0;
153}
154
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700155void AdrenoMemInfo::getAlignedWidthAndHeight(const private_handle_t *hnd, int& aligned_w,
156 int& aligned_h) {
157 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
158 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
159 int w = metadata->bufferDim.sliceWidth;
160 int h = metadata->bufferDim.sliceHeight;
161 int f = hnd->format;
162 int usage = 0;
163
164 if (hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED) {
165 usage = GRALLOC_USAGE_PRIVATE_ALLOC_UBWC;
166 }
167
168 getAlignedWidthAndHeight(w, h, f, usage, aligned_w, aligned_h);
169 } else {
170 aligned_w = hnd->width;
171 aligned_h = hnd->height;
172 }
173
174}
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700175
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800176void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800177 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800178{
Sushil Chauhane61fac52015-04-30 17:14:37 -0700179 bool ubwc_enabled = isUBwcEnabled(format, usage);
180
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800181 // Currently surface padding is only computed for RGB* surfaces.
Ajay Dudani4dc06492015-03-26 07:28:11 -0700182 if (format <= HAL_PIXEL_FORMAT_BGRA_8888) {
Sushil Chauhane61fac52015-04-30 17:14:37 -0700183 int tileEnabled = ubwc_enabled || isMacroTileEnabled(format, usage);
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700184 getGpuAlignedWidthHeight(width, height, format, tileEnabled, aligned_w, aligned_h);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800185 return;
Naomi Luisa44100c2013-02-08 12:42:03 -0800186 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800187
Sushil Chauhane61fac52015-04-30 17:14:37 -0700188 if (ubwc_enabled) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800189 getUBwcWidthAndHeight(width, height, format, aligned_w, aligned_h);
190 return;
191 }
192
193 aligned_w = width;
194 aligned_h = height;
Sushil Chauhan521ce352015-08-28 11:33:30 -0700195 int alignment = 32;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800196 switch (format)
197 {
198 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Sushil Chauhan521ce352015-08-28 11:33:30 -0700199 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
200 if (LINK_adreno_get_gpu_pixel_alignment) {
201 alignment = LINK_adreno_get_gpu_pixel_alignment();
202 }
203 aligned_w = ALIGN(width, alignment);
204 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800205 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
Sushil Chauhan521ce352015-08-28 11:33:30 -0700206 aligned_w = ALIGN(width, alignment);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800207 break;
Ajay Dudani4dc06492015-03-26 07:28:11 -0700208 case HAL_PIXEL_FORMAT_RAW16:
Shuzhen Wang2a000b22014-08-20 00:15:51 -0700209 aligned_w = ALIGN(width, 16);
210 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700211 case HAL_PIXEL_FORMAT_RAW10:
212 aligned_w = ALIGN(width * 10 /8, 16);
213 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800214 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
215 aligned_w = ALIGN(width, 128);
216 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800217 case HAL_PIXEL_FORMAT_YV12:
218 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
219 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
220 case HAL_PIXEL_FORMAT_YCbCr_422_I:
221 case HAL_PIXEL_FORMAT_YCrCb_422_I:
222 aligned_w = ALIGN(width, 16);
223 break;
224 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
225 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
226 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
227 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
228 break;
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530229 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
230 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV21, width);
231 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV21, height);
232 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800233 case HAL_PIXEL_FORMAT_BLOB:
234 break;
235 case HAL_PIXEL_FORMAT_NV21_ZSL:
236 aligned_w = ALIGN(width, 64);
237 aligned_h = ALIGN(height, 64);
238 break;
239 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
240 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
241 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
242 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
243 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
244 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
245 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
246 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
247 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
248 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
249 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
250 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
251 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
252 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
253 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
254 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
255 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
256 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
257 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
258 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
259 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
260 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
261 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
262 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
263 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
264 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
265 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
266 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
267 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
268 int bytesPerPixel = 0;
269 int raster_mode = 0; //Adreno unknown raster mode.
270 int padding_threshold = 512; //Threshold for padding
271 //surfaces.
272
273 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
274 width, height, format, 0,raster_mode, padding_threshold,
275 &aligned_w, &aligned_h, &bytesPerPixel);
276 } else {
277 ALOGW("%s: Warning!! Symbols" \
278 " compute_compressedfmt_aligned_width_and_height" \
279 " not found", __FUNCTION__);
280 }
281 break;
282 default: break;
283 }
284}
285
286void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
287 int tile_enabled, int& aligned_w, int& aligned_h)
288{
289 aligned_w = ALIGN(width, 32);
290 aligned_h = ALIGN(height, 32);
291
292 // Don't add any additional padding if debug.gralloc.map_fb_memory
293 // is enabled
294 char property[PROPERTY_VALUE_MAX];
295 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
296 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
297 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
298 return;
299 }
300
301 int bpp = 4;
302 switch(format)
303 {
304 case HAL_PIXEL_FORMAT_RGB_888:
305 bpp = 3;
306 break;
307 case HAL_PIXEL_FORMAT_RGB_565:
308 case HAL_PIXEL_FORMAT_RGBA_5551:
309 case HAL_PIXEL_FORMAT_RGBA_4444:
310 bpp = 2;
311 break;
312 default: break;
313 }
314
315 if (libadreno_utils) {
316 int raster_mode = 0; // Adreno unknown raster mode.
317 int padding_threshold = 512; // Threshold for padding surfaces.
318 // the function below computes aligned width and aligned height
319 // based on linear or macro tile mode selected.
320 if(LINK_adreno_compute_aligned_width_and_height) {
321 LINK_adreno_compute_aligned_width_and_height(width,
322 height, bpp, tile_enabled,
323 raster_mode, padding_threshold,
324 &aligned_w, &aligned_h);
325
326 } else if(LINK_adreno_compute_padding) {
327 int surface_tile_height = 1; // Linear surface
328 aligned_w = LINK_adreno_compute_padding(width, bpp,
329 surface_tile_height, raster_mode,
330 padding_threshold);
331 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
332 __FUNCTION__);
333 } else {
334 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
335 "compute_aligned_width_and_height not found", __FUNCTION__);
336 }
337 }
338}
339
340int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
341{
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700342 if (!gfx_ubwc_disable && libadreno_utils) {
Sushil Chauhan082acd62015-01-14 16:49:29 -0800343 if (LINK_adreno_isUBWCSupportedByGpu) {
344 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
345 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
346 }
347 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800348 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800349}
350
Sushil Chauhan082acd62015-01-14 16:49:29 -0800351ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
352{
353 switch (hal_format) {
354 case HAL_PIXEL_FORMAT_RGBA_8888:
355 return ADRENO_PIXELFORMAT_R8G8B8A8;
Sushil Chauhan6686c802015-04-15 11:30:39 -0700356 case HAL_PIXEL_FORMAT_RGBX_8888:
357 return ADRENO_PIXELFORMAT_R8G8B8X8;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800358 case HAL_PIXEL_FORMAT_RGB_565:
359 return ADRENO_PIXELFORMAT_B5G6R5;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800360 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800361 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800362 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
363 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800364 return ADRENO_PIXELFORMAT_NV12_EXT;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800365 default:
366 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
367 break;
368 }
369 return ADRENO_PIXELFORMAT_UNKNOWN;
370}
371
Naomi Luisa44100c2013-02-08 12:42:03 -0800372//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700373IAllocController* IAllocController::sController = NULL;
374IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700375{
376 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700377 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700378 }
379 return sController;
380}
381
382
383//-------------- IonController-----------------------//
384IonController::IonController()
385{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530386 allocateIonMem();
387}
388
389void IonController::allocateIonMem()
390{
391 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700392}
393
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700394int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700395{
396 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500397 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700398 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700399
400 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700401 data.allocType = 0;
402
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530403 if(usage & GRALLOC_USAGE_PROTECTED) {
Prabhanjan Kandulae8f4bec2013-10-24 16:32:51 +0530404 if (usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800405 if (usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY) {
Shalaj Jain3c490412015-04-22 16:52:03 -0700406 ionHeapId = ION_HEAP(SD_HEAP_ID);
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800407 /*
408 * There is currently no flag in ION for Secure Display
Shalaj Jain3c490412015-04-22 16:52:03 -0700409 * VM. Please add it to the define once available.
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800410 */
Shalaj Jain3c490412015-04-22 16:52:03 -0700411 ionFlags |= ION_SD_FLAGS;
Shalaj Jain1f9725a2015-03-04 17:53:49 -0800412 } else {
Shalaj Jain3c490412015-04-22 16:52:03 -0700413 ionHeapId = ION_HEAP(CP_HEAP_ID);
414 ionFlags |= ION_CP_FLAGS;
Shalaj Jain13cdf812014-12-02 16:20:54 -0800415 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530416 } else {
417 // for targets/OEMs which do not need HW level protection
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500418 // do not set ion secure flag & MM heap. Fallback to system heap.
419 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Justin Philipd6166602014-08-12 13:42:21 +0530420 data.allocType |= private_handle_t::PRIV_FLAGS_PROTECTED_BUFFER;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500421 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530422 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
423 //MM Heap is exclusively a secure heap.
424 //If it is used for non secure cases, fallback to IOMMU heap
425 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
426 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500427 trying to use system heap instead !!");
428 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500429 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700430
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700431 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500432 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700433
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700434 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500435 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700436
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530437 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500438 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700439
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500440 // if no ion heap flags are set, default to system heap
441 if(!ionHeapId)
442 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700443
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500444 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700445 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500446 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700447 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700448
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700449 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700450 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500451 } else {
452 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
453 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700454 }
455
456 return ret;
457}
458
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700459IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700460{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700461 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700462 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
463 memalloc = mIonAlloc;
464 } else {
465 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
466 }
467
468 return memalloc;
469}
470
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700471bool isMacroTileEnabled(int format, int usage)
472{
473 bool tileEnabled = false;
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -0700474 int isMacroTileSupportedByMDP = 0;
475
476 qdutils::querySDEInfo(HAS_MACRO_TILE, &isMacroTileSupportedByMDP);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700477
478 // Check whether GPU & MDSS supports MacroTiling feature
479 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -0700480 isMacroTileSupportedByMDP)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700481 {
482 // check the format
483 switch(format)
484 {
485 case HAL_PIXEL_FORMAT_RGBA_8888:
486 case HAL_PIXEL_FORMAT_RGBX_8888:
487 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800488 case HAL_PIXEL_FORMAT_RGB_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700489 {
490 tileEnabled = true;
491 // check the usage flags
492 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
493 GRALLOC_USAGE_SW_WRITE_MASK)) {
494 // Application intends to use CPU for rendering
495 tileEnabled = false;
496 }
497 break;
498 }
499 default:
500 break;
501 }
502 }
503 return tileEnabled;
504}
505
506// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800507unsigned int getSize(int format, int width, int height, int usage,
508 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700509
Sushil Chauhan65e26302015-01-14 10:48:57 -0800510 if (isUBwcEnabled(format, usage)) {
511 return getUBwcSize(width, height, format, alignedw, alignedh);
512 }
513
514 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700515 switch (format) {
516 case HAL_PIXEL_FORMAT_RGBA_8888:
517 case HAL_PIXEL_FORMAT_RGBX_8888:
518 case HAL_PIXEL_FORMAT_BGRA_8888:
519 size = alignedw * alignedh * 4;
520 break;
521 case HAL_PIXEL_FORMAT_RGB_888:
522 size = alignedw * alignedh * 3;
523 break;
524 case HAL_PIXEL_FORMAT_RGB_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700525 case HAL_PIXEL_FORMAT_RGBA_5551:
526 case HAL_PIXEL_FORMAT_RGBA_4444:
Ajay Dudani4dc06492015-03-26 07:28:11 -0700527 case HAL_PIXEL_FORMAT_RAW16:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700528 size = alignedw * alignedh * 2;
529 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700530 case HAL_PIXEL_FORMAT_RAW10:
531 size = ALIGN(alignedw * alignedh, 4096);
532 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700533
534 // adreno formats
535 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
536 size = ALIGN(alignedw*alignedh, 4096);
537 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
538 break;
539 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
540 // The chroma plane is subsampled,
541 // but the pitch in bytes is unchanged
542 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700543 size = ALIGN( alignedw * alignedh, 8192);
544 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
545 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700546 case HAL_PIXEL_FORMAT_YV12:
547 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
548 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800549 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700550 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400551 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700552 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700553 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700554 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800555 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
556 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400557 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800558 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700559 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
560 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700561 case HAL_PIXEL_FORMAT_YCbCr_422_I:
562 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700563 if(width & 1) {
564 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800565 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700566 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700567 size = ALIGN(alignedw * alignedh * 2, 4096);
568 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700569 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400570 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700571 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700572 break;
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530573 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
574 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV21, width, height);
575 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400576 case HAL_PIXEL_FORMAT_BLOB:
577 if(height != 1) {
578 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
579 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800580 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400581 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400582 size = width;
583 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700584 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700585 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
586 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500587 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
588 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
589 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
590 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
591 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
592 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
593 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
594 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
595 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
596 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
597 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
598 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
599 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
600 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
601 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
602 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
603 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
604 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
605 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
606 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
607 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
608 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
609 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
610 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
611 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
612 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
613 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800614 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500615 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
616 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700617 default:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800618 ALOGE("Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800619 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700620 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700621 return size;
622}
623
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700624unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700625 int& alignedw, int &alignedh)
626{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700627 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700628
629 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
630 height,
631 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800632 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700633 alignedw,
634 alignedh);
635
Sushil Chauhan65e26302015-01-14 10:48:57 -0800636 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700637
638 return size;
639}
640
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700641
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700642unsigned int getBufferSizeAndDimensions(int width, int height, int format,
643 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700644{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700645 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700646
647 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
648 height,
649 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800650 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700651 alignedw,
652 alignedh);
653
Sushil Chauhan65e26302015-01-14 10:48:57 -0800654 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700655
656 return size;
657}
658
659
660void getBufferAttributes(int width, int height, int format, int usage,
Sushil Chauhane61fac52015-04-30 17:14:37 -0700661 int& alignedw, int &alignedh, int& tiled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700662{
Sushil Chauhane61fac52015-04-30 17:14:37 -0700663 tiled = isUBwcEnabled(format, usage) || isMacroTileEnabled(format, usage);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700664
665 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
666 height,
667 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800668 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700669 alignedw,
670 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800671 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700672}
673
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400674int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
675{
676 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700677 int width = hnd->width;
678 int height = hnd->height;
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700679 int format = hnd->format;
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700680
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700681 unsigned int ystride, cstride;
Sushil Chauhan4686c972015-02-20 15:44:52 -0800682 unsigned int alignment = 4096;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700683
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400684 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700685 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
686
687 // Check if UBWC buffer has been rendered in linear format.
688 if (metadata && (metadata->operation & LINEAR_FORMAT)) {
689 format = metadata->linearFormat;
690 }
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400691
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700692 // Check metadata if the geometry has been updated.
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700693 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700694 int usage = 0;
695
696 if (hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED) {
697 usage = GRALLOC_USAGE_PRIVATE_ALLOC_UBWC;
698 }
699
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700700 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700701 metadata->bufferDim.sliceHeight, format, usage, width, height);
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700702 }
703
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400704 // Get the chroma offsets from the handle width/height. We take advantage
705 // of the fact the width _is_ the stride
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700706 switch (format) {
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400707 //Semiplanar
708 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
709 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
710 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
711 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700712 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400713 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700714 ycbcr->cb = (void*)(hnd->base + ystride * height);
715 ycbcr->cr = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400716 ycbcr->ystride = ystride;
717 ycbcr->cstride = cstride;
718 ycbcr->chroma_step = 2;
719 break;
720
Sushil Chauhan4686c972015-02-20 15:44:52 -0800721 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
722 // NV12_UBWC buffer has these 4 planes in the following sequence:
723 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
724 unsigned int y_meta_stride, y_meta_height, y_meta_size;
725 unsigned int y_stride, y_height, y_size;
726 unsigned int c_meta_stride, c_meta_height, c_meta_size;
727
728 y_meta_stride = VENUS_Y_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
729 y_meta_height = VENUS_Y_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
730 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
731
732 y_stride = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
733 y_height = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
734 y_size = ALIGN((y_stride * y_height), alignment);
735
736 c_meta_stride = VENUS_UV_META_STRIDE(COLOR_FMT_NV12_UBWC, width);
737 c_meta_height = VENUS_UV_META_SCANLINES(COLOR_FMT_NV12_UBWC, height);
738 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
739
740 ycbcr->y = (void*)(hnd->base + y_meta_size);
741 ycbcr->cb = (void*)(hnd->base + y_meta_size + y_size + c_meta_size);
742 ycbcr->cr = (void*)(hnd->base + y_meta_size + y_size +
743 c_meta_size + 1);
744 ycbcr->ystride = y_stride;
745 ycbcr->cstride = VENUS_UV_STRIDE(COLOR_FMT_NV12_UBWC, width);
746 ycbcr->chroma_step = 2;
747 break;
748
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400749 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
750 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
751 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530752 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400753 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ajay Dudani4dc06492015-03-26 07:28:11 -0700754 case HAL_PIXEL_FORMAT_RAW16:
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700755 case HAL_PIXEL_FORMAT_RAW10:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700756 ystride = cstride = width;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400757 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700758 ycbcr->cr = (void*)(hnd->base + ystride * height);
759 ycbcr->cb = (void*)(hnd->base + ystride * height + 1);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400760 ycbcr->ystride = ystride;
761 ycbcr->cstride = cstride;
762 ycbcr->chroma_step = 2;
763 break;
764
765 //Planar
766 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700767 ystride = width;
768 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400769 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700770 ycbcr->cr = (void*)(hnd->base + ystride * height);
771 ycbcr->cb = (void*)(hnd->base + ystride * height +
772 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400773 ycbcr->ystride = ystride;
774 ycbcr->cstride = cstride;
775 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400776 break;
777 //Unsupported formats
778 case HAL_PIXEL_FORMAT_YCbCr_422_I:
779 case HAL_PIXEL_FORMAT_YCrCb_422_I:
780 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
781 default:
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700782 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__, format);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400783 err = -EINVAL;
784 }
785 return err;
786
787}
788
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700789
790
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700791// Allocate buffer from width, height and format into a
792// private_handle_t. It is the responsibility of the caller
793// to free the buffer using the free_buffer function
794int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
795{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700796 alloc_data data;
797 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700798 gralloc::IAllocController* sAlloc =
799 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700800 data.base = 0;
801 data.fd = -1;
802 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700803 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
804 alignedh);
805
Naseer Ahmed29a26812012-06-14 00:56:20 -0700806 data.align = getpagesize();
807 data.uncached = useUncached(usage);
808 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700809
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700810 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700811 if (0 != err) {
812 ALOGE("%s: allocate failed", __FUNCTION__);
813 return -ENOMEM;
814 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700815
Naseer Ahmed29a26812012-06-14 00:56:20 -0700816 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700817 data.allocType, 0, format,
818 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700819 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700820 hnd->offset = data.offset;
821 hnd->gpuaddr = 0;
822 *pHnd = hnd;
823 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700824}
825
826void free_buffer(private_handle_t *hnd)
827{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700828 gralloc::IAllocController* sAlloc =
829 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700830 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700831 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700832 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
833 }
834 if(hnd)
835 delete hnd;
836
837}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800838
839// UBWC helper functions
840static bool isUBwcFormat(int format)
841{
842 // Explicitly defined UBWC formats
843 switch(format)
844 {
845 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
846 return true;
847 default:
848 return false;
849 }
850}
851
852static bool isUBwcSupported(int format)
853{
854 // Existing HAL formats with UBWC support
855 switch(format)
856 {
857 case HAL_PIXEL_FORMAT_RGB_565:
858 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -0700859 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800860 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
861 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
862 return true;
863 default:
864 return false;
865 }
866}
867
868bool isUBwcEnabled(int format, int usage)
869{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800870 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
871 if (isUBwcFormat(format))
872 return true;
873
Sushil Chauhan7807d192015-08-13 10:10:48 -0700874 // Allow UBWC, if an OpenGL client sets UBWC usage flag and GPU plus MDP
875 // support the format. OR if a non-OpenGL client like Rotator, sets UBWC
876 // usage flag and MDP supports the format.
877 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format)) {
878 bool enable = true;
879 // Query GPU for UBWC only if buffer is intended to be used by GPU.
880 if (usage & (GRALLOC_USAGE_HW_TEXTURE | GRALLOC_USAGE_HW_RENDER)) {
881 enable = AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format);
882 }
Sushil Chauhan81594f62015-01-26 16:00:51 -0800883 // Allow UBWC, only if CPU usage flags are not set
Sushil Chauhan7807d192015-08-13 10:10:48 -0700884 if (enable && !(usage & (GRALLOC_USAGE_SW_READ_MASK |
885 GRALLOC_USAGE_SW_WRITE_MASK))) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800886 return true;
887 }
888 }
889 return false;
890}
891
892static void getUBwcWidthAndHeight(int width, int height, int format,
893 int& aligned_w, int& aligned_h)
894{
895 switch (format)
896 {
897 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
898 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
899 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
900 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
901 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
902 break;
903 default:
904 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
905 aligned_w = 0;
906 aligned_h = 0;
907 break;
908 }
909}
910
911static void getUBwcBlockSize(int bpp, int& block_width, int& block_height)
912{
913 block_width = 0;
914 block_height = 0;
915
916 switch(bpp)
917 {
918 case 2:
919 case 4:
920 block_width = 16;
921 block_height = 4;
922 break;
923 case 8:
924 block_width = 8;
925 block_height = 4;
926 break;
927 case 16:
928 block_width = 4;
929 block_height = 4;
930 break;
931 default:
932 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
933 break;
934 }
935}
936
937static unsigned int getUBwcMetaBufferSize(int width, int height, int bpp)
938{
939 unsigned int size = 0;
940 int meta_width, meta_height;
941 int block_width, block_height;
942
943 getUBwcBlockSize(bpp, block_width, block_height);
944
945 if (!block_width || !block_height) {
946 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
947 return size;
948 }
949
950 // Align meta buffer height to 16 blocks
951 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
952
953 // Align meta buffer width to 64 blocks
954 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
955
956 // Align meta buffer size to 4K
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700957 size = ALIGN((meta_width * meta_height), 4096);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800958 return size;
959}
960
961static unsigned int getUBwcSize(int width, int height, int format,
962 const int alignedw, const int alignedh) {
963
964 unsigned int size = 0;
965 switch (format) {
966 case HAL_PIXEL_FORMAT_RGB_565:
967 size = alignedw * alignedh * 2;
968 size += getUBwcMetaBufferSize(width, height, 2);
969 break;
970 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -0700971 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800972 size = alignedw * alignedh * 4;
973 size += getUBwcMetaBufferSize(width, height, 4);
974 break;
975 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
976 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
977 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
978 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
979 break;
980 default:
981 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
982 break;
983 }
984 return size;
985}
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700986
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700987int getRgbDataAddress(private_handle_t* hnd, void** rgb_data)
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700988{
989 int err = 0;
990
991 // This api is for RGB* formats
Ajay Dudani4dc06492015-03-26 07:28:11 -0700992 if (hnd->format > HAL_PIXEL_FORMAT_BGRA_8888) {
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700993 return -EINVAL;
994 }
995
996 // linear buffer
997 if (!(hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED)) {
Sushil Chauhanc85b65b2015-04-30 11:05:36 -0700998 *rgb_data = (void*)hnd->base;
Sushil Chauhan7dd3a432015-04-08 15:54:42 -0700999 return err;
1000 }
1001
1002 unsigned int meta_size = 0;
1003 switch (hnd->format) {
1004 case HAL_PIXEL_FORMAT_RGB_565:
1005 meta_size = getUBwcMetaBufferSize(hnd->width, hnd->height, 2);
1006 break;
1007 case HAL_PIXEL_FORMAT_RGBA_8888:
1008 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001009 meta_size = getUBwcMetaBufferSize(hnd->width, hnd->height, 4);
1010 break;
1011 default:
1012 ALOGE("%s:Unsupported RGB format: 0x%x", __FUNCTION__, hnd->format);
1013 err = -EINVAL;
1014 break;
1015 }
1016
Sushil Chauhanc85b65b2015-04-30 11:05:36 -07001017 *rgb_data = (void*)(hnd->base + meta_size);
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001018 return err;
1019}